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[official-gcc.git] / libgcc / config / mips / vr4120-div.S
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1 /* Support file for -mfix-vr4120.
2    Copyright (C) 2002-2018 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
14 for more details.
16 Under Section 7 of GPL version 3, you are granted additional
17 permissions described in the GCC Runtime Library Exception, version
18 3.1, as published by the Free Software Foundation.
20 You should have received a copy of the GNU General Public License and
21 a copy of the GCC Runtime Library Exception along with this program;
22 see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
23 <http://www.gnu.org/licenses/>.  */
25 /* This file contains functions which implement divsi3 and modsi3 for
26    -mfix-vr4120.  div and ddiv do not give the correct result when one
27    of the operands is negative.  */
29         .set    nomips16
31 #define DIV                                                             \
32         xor     $3,$4,$5        /* t = x ^ y */ ;                       \
33         li      $2,0x80000000;                                          \
34         .set    noreorder;                                              \
35         bgez    $4,1f           /* x >= 0 */;                           \
36         and     $3,$3,$2        /* t = (x ^ y) & 0x80000000 in delay slot */ ;\
37         .set    reorder;                                                \
38         subu    $4,$0,$4        /* x = -x */ ;                          \
39 1:;                                                                     \
40         .set    noreorder;                                              \
41         bgez    $5,2f           /* y >= 0 */ ;                          \
42         nop;                                                            \
43         subu    $5,$0,$5        /* y = -y */ ;                          \
44         .set    reorder;                                                \
45 2:;                                                                     \
46         divu    $0,$4,$5;       /* we use divu because of INT_MIN */    \
47         .set    noreorder;                                              \
48         bne     $5,$0,3f;                                               \
49         nop;                                                            \
50         break   7               /* division on zero y */ ;              \
51 3:;                                                                     \
52         .set    reorder;                                                \
53         mflo    $2              /* r = x / y */ ;                       \
54         .set    noreorder;                                              \
55         beq     $3,$0,4f        /* t == 0 */ ;                          \
56         nop;                                                            \
57         subu    $2,$0,$2        /* r = -r */ ;                          \
58         .set    reorder;                                                \
61         .globl  __vr4120_divsi3
62         .ent    __vr4120_divsi3
63 __vr4120_divsi3:
64         DIV
65         j       $31
66         .end    __vr4120_divsi3
68         .globl  __vr4120_modsi3
69         .ent    __vr4120_modsi3
70 __vr4120_modsi3:
71         move    $6,$4           # x1 = x
72         move    $7,$5           # y1 = y
73         DIV
74         mult    $2,$7           # r = r * y1
75         mflo    $2
76         .set    noreorder
77         j       $31
78         subu    $2,$6,$2        # r = x1 - r  in delay slot
79         .end    __vr4120_modsi3