gcc/reload.h

   1 /* Communication between reload.c, reload1.c and the rest of compiler.
   2    Copyright (C) 1987-2013 Free Software Foundation, Inc.
   3
   4 This file is part of GCC.
   5
   6 GCC is free software; you can redistribute it and/or modify it under
   7 the terms of the GNU General Public License as published by the Free
   8 Software Foundation; either version 3, or (at your option) any later
   9 version.
  10
  11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14 for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with GCC; see the file COPYING3.  If not see
  18 <http://www.gnu.org/licenses/>.  */
  19
  20
  21 /* If secondary reloads are the same for inputs and outputs, define those
  22    macros here.  */
  23
  24 #ifdef SECONDARY_RELOAD_CLASS
  25 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
  26   SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
  27 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
  28   SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
  29 #endif
  30
  31 extern int register_move_cost (enum machine_mode, reg_class_t, reg_class_t);
  32 extern int memory_move_cost (enum machine_mode, reg_class_t, bool);
  33 extern int memory_move_secondary_cost (enum machine_mode, reg_class_t, bool);
  34
  35 /* Maximum number of reloads we can need.  */
  36 #define MAX_RELOADS (2 * MAX_RECOG_OPERANDS * (MAX_REGS_PER_ADDRESS + 1))
  37
  38 /* Encode the usage of a reload.  The following codes are supported:
  39
  40    RELOAD_FOR_INPUT             reload of an input operand
  41    RELOAD_FOR_OUTPUT            likewise, for output
  42    RELOAD_FOR_INSN              a reload that must not conflict with anything
  43                                 used in the insn, but may conflict with
  44                                 something used before or after the insn
  45    RELOAD_FOR_INPUT_ADDRESS     reload for parts of the address of an object
  46                                 that is an input reload
  47    RELOAD_FOR_INPADDR_ADDRESS   reload needed for RELOAD_FOR_INPUT_ADDRESS
  48    RELOAD_FOR_OUTPUT_ADDRESS    like RELOAD_FOR INPUT_ADDRESS, for output
  49    RELOAD_FOR_OUTADDR_ADDRESS   reload needed for RELOAD_FOR_OUTPUT_ADDRESS
  50    RELOAD_FOR_OPERAND_ADDRESS   reload for the address of a non-reloaded
  51                                 operand; these don't conflict with
  52                                 any other addresses.
  53    RELOAD_FOR_OPADDR_ADDR       reload needed for RELOAD_FOR_OPERAND_ADDRESS
  54                                 reloads; usually secondary reloads
  55    RELOAD_OTHER                 none of the above, usually multiple uses
  56    RELOAD_FOR_OTHER_ADDRESS     reload for part of the address of an input
  57                                 that is marked RELOAD_OTHER.
  58
  59    This used to be "enum reload_when_needed" but some debuggers have trouble
  60    with an enum tag and variable of the same name.  */
  61
  62 enum reload_type
  63 {
  64   RELOAD_FOR_INPUT, RELOAD_FOR_OUTPUT, RELOAD_FOR_INSN,
  65   RELOAD_FOR_INPUT_ADDRESS, RELOAD_FOR_INPADDR_ADDRESS,
  66   RELOAD_FOR_OUTPUT_ADDRESS, RELOAD_FOR_OUTADDR_ADDRESS,
  67   RELOAD_FOR_OPERAND_ADDRESS, RELOAD_FOR_OPADDR_ADDR,
  68   RELOAD_OTHER, RELOAD_FOR_OTHER_ADDRESS
  69 };
  70
  71 #ifdef GCC_INSN_CODES_H
  72 /* Each reload is recorded with a structure like this.  */
  73 struct reload
  74 {
  75   /* The value to reload from */
  76   rtx in;
  77   /* Where to store reload-reg afterward if nec (often the same as
  78      reload_in)  */
  79   rtx out;
  80
  81   /* The class of registers to reload into.  */
  82   enum reg_class rclass;
  83
  84   /* The mode this operand should have when reloaded, on input.  */
  85   enum machine_mode inmode;
  86   /* The mode this operand should have when reloaded, on output.  */
  87   enum machine_mode outmode;
  88
  89   /* The mode of the reload register.  */
  90   enum machine_mode mode;
  91
  92   /* the largest number of registers this reload will require.  */
  93   unsigned int nregs;
  94
  95   /* Positive amount to increment or decrement by if
  96      reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
  97      Ignored otherwise (don't assume it is zero).  */
  98   int inc;
  99   /* A reg for which reload_in is the equivalent.
 100      If reload_in is a symbol_ref which came from
 101      reg_equiv_constant, then this is the pseudo
 102      which has that symbol_ref as equivalent.  */
 103   rtx in_reg;
 104   rtx out_reg;
 105
 106   /* Used in find_reload_regs to record the allocated register.  */
 107   int regno;
 108   /* This is the register to reload into.  If it is zero when `find_reloads'
 109      returns, you must find a suitable register in the class specified by
 110      reload_reg_class, and store here an rtx for that register with mode from
 111      reload_inmode or reload_outmode.  */
 112   rtx reg_rtx;
 113   /* The operand number being reloaded.  This is used to group related reloads
 114      and need not always be equal to the actual operand number in the insn,
 115      though it current will be; for in-out operands, it is one of the two
 116      operand numbers.  */
 117   int opnum;
 118
 119   /* Gives the reload number of a secondary input reload, when needed;
 120      otherwise -1.  */
 121   int secondary_in_reload;
 122   /* Gives the reload number of a secondary output reload, when needed;
 123      otherwise -1.  */
 124   int secondary_out_reload;
 125   /* If a secondary input reload is required, gives the INSN_CODE that uses the
 126      secondary reload as a scratch register, or CODE_FOR_nothing if the
 127      secondary reload register is to be an intermediate register.  */
 128   enum insn_code secondary_in_icode;
 129   /* Likewise, for a secondary output reload.  */
 130   enum insn_code secondary_out_icode;
 131
 132   /* Classifies reload as needed either for addressing an input reload,
 133      addressing an output, for addressing a non-reloaded mem ref, or for
 134      unspecified purposes (i.e., more than one of the above).  */
 135   enum reload_type when_needed;
 136
 137   /* Nonzero for an optional reload.  Optional reloads are ignored unless the
 138      value is already sitting in a register.  */
 139   unsigned int optional:1;
 140   /* nonzero if this reload shouldn't be combined with another reload.  */
 141   unsigned int nocombine:1;
 142   /* Nonzero if this is a secondary register for one or more reloads.  */
 143   unsigned int secondary_p:1;
 144   /* Nonzero if this reload must use a register not already allocated to a
 145      group.  */
 146   unsigned int nongroup:1;
 147 };
 148
 149 extern struct reload rld[MAX_RELOADS];
 150 extern int n_reloads;
 151 #endif
 152
 153 /* Target-dependent globals.  */
 154 struct target_reload {
 155   /* Nonzero if indirect addressing is supported when the innermost MEM is
 156      of the form (MEM (SYMBOL_REF sym)).  It is assumed that the level to
 157      which these are valid is the same as spill_indirect_levels, above.  */
 158   bool x_indirect_symref_ok;
 159
 160   /* Nonzero if an address (plus (reg frame_pointer) (reg ...)) is valid.  */
 161   bool x_double_reg_address_ok;
 162
 163   /* Nonzero if indirect addressing is supported on the machine; this means
 164      that spilling (REG n) does not require reloading it into a register in
 165      order to do (MEM (REG n)) or (MEM (PLUS (REG n) (CONST_INT c))).  The
 166      value indicates the level of indirect addressing supported, e.g., two
 167      means that (MEM (MEM (REG n))) is also valid if (REG n) does not get
 168      a hard register.  */
 169   bool x_spill_indirect_levels;
 170
 171   /* True if caller-save has been reinitialized.  */
 172   bool x_caller_save_initialized_p;
 173
 174   /* Modes for each hard register that we can save.  The smallest mode is wide
 175      enough to save the entire contents of the register.  When saving the
 176      register because it is live we first try to save in multi-register modes.
 177      If that is not possible the save is done one register at a time.  */
 178   enum machine_mode (x_regno_save_mode
 179                      [FIRST_PSEUDO_REGISTER]
 180                      [MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]);
 181
 182   /* We will only make a register eligible for caller-save if it can be
 183      saved in its widest mode with a simple SET insn as long as the memory
 184      address is valid.  We record the INSN_CODE is those insns here since
 185      when we emit them, the addresses might not be valid, so they might not
 186      be recognized.  */
 187   int x_cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
 188   int x_cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
 189 };
 190
 191 extern struct target_reload default_target_reload;
 192 #if SWITCHABLE_TARGET
 193 extern struct target_reload *this_target_reload;
 194 #else
 195 #define this_target_reload (&default_target_reload)
 196 #endif
 197
 198 #define indirect_symref_ok \
 199   (this_target_reload->x_indirect_symref_ok)
 200 #define double_reg_address_ok \
 201   (this_target_reload->x_double_reg_address_ok)
 202 #define caller_save_initialized_p \
 203   (this_target_reload->x_caller_save_initialized_p)
 204
 205 /* Register equivalences.  Indexed by register number.  */
 206 typedef struct reg_equivs
 207 {
 208   /* The constant value to which pseudo reg N is equivalent,
 209      or zero if pseudo reg N is not equivalent to a constant.
 210      find_reloads looks at this in order to replace pseudo reg N
 211      with the constant it stands for.  */
 212   rtx constant;
 213
 214   /* An invariant value to which pseudo reg N is equivalent.
 215      eliminate_regs_in_insn uses this to replace pseudos in particular
 216      contexts.  */
 217   rtx invariant;
 218
 219   /* A memory location to which pseudo reg N is equivalent,
 220      prior to any register elimination (such as frame pointer to stack
 221      pointer).  Depending on whether or not it is a valid address, this value
 222      is transferred to either equiv_address or equiv_mem.  */
 223   rtx memory_loc;
 224
 225   /* The address of stack slot to which pseudo reg N is equivalent.
 226      This is used when the address is not valid as a memory address
 227      (because its displacement is too big for the machine.)  */
 228   rtx address;
 229
 230   /* The memory slot to which pseudo reg N is equivalent,
 231      or zero if pseudo reg N is not equivalent to a memory slot.  */
 232   rtx mem;
 233
 234   /* An EXPR_LIST of REG_EQUIVs containing MEMs with
 235      alternate representations of the location of pseudo reg N.  */
 236   rtx alt_mem_list;
 237
 238   /* The list of insns that initialized reg N from its equivalent
 239      constant or memory slot.  */
 240   rtx init;
 241 } reg_equivs_t;
 242
 243 #define reg_equiv_constant(ELT) \
 244   (*reg_equivs)[(ELT)].constant
 245 #define reg_equiv_invariant(ELT) \
 246   (*reg_equivs)[(ELT)].invariant
 247 #define reg_equiv_memory_loc(ELT) \
 248   (*reg_equivs)[(ELT)].memory_loc
 249 #define reg_equiv_address(ELT) \
 250   (*reg_equivs)[(ELT)].address
 251 #define reg_equiv_mem(ELT) \
 252   (*reg_equivs)[(ELT)].mem
 253 #define reg_equiv_alt_mem_list(ELT) \
 254   (*reg_equivs)[(ELT)].alt_mem_list
 255 #define reg_equiv_init(ELT) \
 256   (*reg_equivs)[(ELT)].init
 257
 258 extern vec<reg_equivs_t, va_gc> *reg_equivs;
 259
 260 /* All the "earlyclobber" operands of the current insn
 261    are recorded here.  */
 262 extern int n_earlyclobbers;
 263 extern rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
 264
 265 /* Save the number of operands.  */
 266 extern int reload_n_operands;
 267
 268 /* First uid used by insns created by reload in this function.
 269    Used in find_equiv_reg.  */
 270 extern int reload_first_uid;
 271
 272 extern int num_not_at_initial_offset;
 273
 274 #if defined SET_HARD_REG_BIT && defined CLEAR_REG_SET
 275 /* This structure describes instructions which are relevant for reload.
 276    Apart from all regular insns, this also includes CODE_LABELs, since they
 277    must be examined for register elimination.  */
 278 struct insn_chain
 279 {
 280   /* Links to the neighbor instructions.  */
 281   struct insn_chain *next, *prev;
 282
 283   /* Link through a chains set up by calculate_needs_all_insns, containing
 284      all insns that need reloading.  */
 285   struct insn_chain *next_need_reload;
 286
 287   /* The rtx of the insn.  */
 288   rtx insn;
 289
 290   /* The basic block this insn is in.  */
 291   int block;
 292
 293   /* Nonzero if find_reloads said the insn requires reloading.  */
 294   unsigned int need_reload:1;
 295   /* Nonzero if find_reloads needs to be run during reload_as_needed to
 296      perform modifications on any operands.  */
 297   unsigned int need_operand_change:1;
 298   /* Nonzero if eliminate_regs_in_insn said it requires eliminations.  */
 299   unsigned int need_elim:1;
 300   /* Nonzero if this insn was inserted by perform_caller_saves.  */
 301   unsigned int is_caller_save_insn:1;
 302
 303   /* Register life information: record all live hard registers, and
 304      all live pseudos that have a hard register.  This set also
 305      contains pseudos spilled by IRA.  */
 306   bitmap_head live_throughout;
 307   bitmap_head dead_or_set;
 308
 309   /* Copies of the global variables computed by find_reloads.  */
 310   struct reload *rld;
 311   int n_reloads;
 312
 313   /* Indicates which registers have already been used for spills.  */
 314   HARD_REG_SET used_spill_regs;
 315 };
 316
 317 /* A chain of insn_chain structures to describe all non-note insns in
 318    a function.  */
 319 extern struct insn_chain *reload_insn_chain;
 320
 321 /* Allocate a new insn_chain structure.  */
 322 extern struct insn_chain *new_insn_chain (void);
 323 #endif
 324
 325 #if defined SET_HARD_REG_BIT
 326 extern void compute_use_by_pseudos (HARD_REG_SET *, bitmap);
 327 #endif
 328
 329 /* Functions from reload.c:  */
 330
 331 extern reg_class_t secondary_reload_class (bool, reg_class_t,
 332                                            enum machine_mode, rtx);
 333
 334 #ifdef GCC_INSN_CODES_H
 335 extern enum reg_class scratch_reload_class (enum insn_code);
 336 #endif
 337
 338 /* Return a memory location that will be used to copy X in mode MODE.
 339    If we haven't already made a location for this mode in this insn,
 340    call find_reloads_address on the location being returned.  */
 341 extern rtx get_secondary_mem (rtx, enum machine_mode, int, enum reload_type);
 342
 343 /* Clear any secondary memory locations we've made.  */
 344 extern void clear_secondary_mem (void);
 345
 346 /* Transfer all replacements that used to be in reload FROM to be in
 347    reload TO.  */
 348 extern void transfer_replacements (int, int);
 349
 350 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
 351    or a subpart of it.  If we have any replacements registered for IN_RTX,
 352    cancel the reloads that were supposed to load them.
 353    Return nonzero if we canceled any reloads.  */
 354 extern int remove_address_replacements (rtx in_rtx);
 355
 356 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
 357    if they are the same hard reg, and has special hacks for
 358    autoincrement and autodecrement.  */
 359 extern int operands_match_p (rtx, rtx);
 360
 361 /* Return 1 if altering OP will not modify the value of CLOBBER.  */
 362 extern int safe_from_earlyclobber (rtx, rtx);
 363
 364 /* Search the body of INSN for values that need reloading and record them
 365    with push_reload.  REPLACE nonzero means record also where the values occur
 366    so that subst_reloads can be used.  */
 367 extern int find_reloads (rtx, int, int, int, short *);
 368
 369 /* Compute the sum of X and Y, making canonicalizations assumed in an
 370    address, namely: sum constant integers, surround the sum of two
 371    constants with a CONST, put the constant as the second operand, and
 372    group the constant on the outermost sum.  */
 373 extern rtx form_sum (enum machine_mode, rtx, rtx);
 374
 375 /* Substitute into the current INSN the registers into which we have reloaded
 376    the things that need reloading.  */
 377 extern void subst_reloads (rtx);
 378
 379 /* Make a copy of any replacements being done into X and move those copies
 380    to locations in Y, a copy of X.  We only look at the highest level of
 381    the RTL.  */
 382 extern void copy_replacements (rtx, rtx);
 383
 384 /* Change any replacements being done to *X to be done to *Y */
 385 extern void move_replacements (rtx *x, rtx *y);
 386
 387 /* If LOC was scheduled to be replaced by something, return the replacement.
 388    Otherwise, return *LOC.  */
 389 extern rtx find_replacement (rtx *);
 390
 391 /* Nonzero if modifying X will affect IN.  */
 392 extern int reg_overlap_mentioned_for_reload_p (rtx, rtx);
 393
 394 /* Check the insns before INSN to see if there is a suitable register
 395    containing the same value as GOAL.  */
 396 extern rtx find_equiv_reg (rtx, rtx, enum reg_class, int, short *,
 397                            int, enum machine_mode);
 398
 399 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.  */
 400 extern int regno_clobbered_p (unsigned int, rtx, enum machine_mode, int);
 401
 402 /* Return 1 if X is an operand of an insn that is being earlyclobbered.  */
 403 extern int earlyclobber_operand_p (rtx);
 404
 405 /* Record one reload that needs to be performed.  */
 406 extern int push_reload (rtx, rtx, rtx *, rtx *, enum reg_class,
 407                         enum machine_mode, enum machine_mode,
 408                         int, int, int, enum reload_type);
 409
 410 /* Functions in reload1.c:  */
 411
 412 /* Initialize the reload pass once per compilation.  */
 413 extern void init_reload (void);
 414
 415 /* The reload pass itself.  */
 416 extern bool reload (rtx, int);
 417
 418 /* Mark the slots in regs_ever_live for the hard regs
 419    used by pseudo-reg number REGNO.  */
 420 extern void mark_home_live (int);
 421
 422 /* Scan X and replace any eliminable registers (such as fp) with a
 423    replacement (such as sp), plus an offset.  */
 424 extern rtx eliminate_regs (rtx, enum machine_mode, rtx);
 425 extern bool elimination_target_reg_p (rtx);
 426
 427 /* Called from the register allocator to estimate costs of eliminating
 428    invariant registers.  */
 429 extern void calculate_elim_costs_all_insns (void);
 430
 431 /* Deallocate the reload register used by reload number R.  */
 432 extern void deallocate_reload_reg (int r);
 433
 434 /* Functions in caller-save.c:  */
 435
 436 /* Initialize for caller-save.  */
 437 extern void init_caller_save (void);
 438
 439 /* Initialize save areas by showing that we haven't allocated any yet.  */
 440 extern void init_save_areas (void);
 441
 442 /* Allocate save areas for any hard registers that might need saving.  */
 443 extern void setup_save_areas (void);
 444
 445 /* Find the places where hard regs are live across calls and save them.  */
 446 extern void save_call_clobbered_regs (void);
 447
 448 /* Replace (subreg (reg)) with the appropriate (reg) for any operands.  */
 449 extern void cleanup_subreg_operands (rtx);
 450
 451 /* Debugging support.  */
 452 extern void debug_reload_to_stream (FILE *);
 453 extern void debug_reload (void);
 454
 455 /* Compute the actual register we should reload to, in case we're
 456    reloading to/from a register that is wider than a word.  */
 457 extern rtx reload_adjust_reg_for_mode (rtx, enum machine_mode);
 458
 459 /* Allocate or grow the reg_equiv tables, initializing new entries to 0.  */
 460 extern void grow_reg_equivs (void);