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[official-gcc.git] / gcc / cse.c
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1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "rtl.h"
25 #include "tm_p.h"
26 #include "hard-reg-set.h"
27 #include "regs.h"
28 #include "basic-block.h"
29 #include "flags.h"
30 #include "insn-config.h"
31 #include "recog.h"
32 #include "function.h"
33 #include "expr.h"
34 #include "diagnostic-core.h"
35 #include "toplev.h"
36 #include "ggc.h"
37 #include "except.h"
38 #include "target.h"
39 #include "params.h"
40 #include "rtlhooks-def.h"
41 #include "tree-pass.h"
42 #include "df.h"
43 #include "dbgcnt.h"
44 #include "hash-set.h"
45 #include "rtl-iter.h"
47 /* The basic idea of common subexpression elimination is to go
48 through the code, keeping a record of expressions that would
49 have the same value at the current scan point, and replacing
50 expressions encountered with the cheapest equivalent expression.
52 It is too complicated to keep track of the different possibilities
53 when control paths merge in this code; so, at each label, we forget all
54 that is known and start fresh. This can be described as processing each
55 extended basic block separately. We have a separate pass to perform
56 global CSE.
58 Note CSE can turn a conditional or computed jump into a nop or
59 an unconditional jump. When this occurs we arrange to run the jump
60 optimizer after CSE to delete the unreachable code.
62 We use two data structures to record the equivalent expressions:
63 a hash table for most expressions, and a vector of "quantity
64 numbers" to record equivalent (pseudo) registers.
66 The use of the special data structure for registers is desirable
67 because it is faster. It is possible because registers references
68 contain a fairly small number, the register number, taken from
69 a contiguously allocated series, and two register references are
70 identical if they have the same number. General expressions
71 do not have any such thing, so the only way to retrieve the
72 information recorded on an expression other than a register
73 is to keep it in a hash table.
75 Registers and "quantity numbers":
77 At the start of each basic block, all of the (hardware and pseudo)
78 registers used in the function are given distinct quantity
79 numbers to indicate their contents. During scan, when the code
80 copies one register into another, we copy the quantity number.
81 When a register is loaded in any other way, we allocate a new
82 quantity number to describe the value generated by this operation.
83 `REG_QTY (N)' records what quantity register N is currently thought
84 of as containing.
86 All real quantity numbers are greater than or equal to zero.
87 If register N has not been assigned a quantity, `REG_QTY (N)' will
88 equal -N - 1, which is always negative.
90 Quantity numbers below zero do not exist and none of the `qty_table'
91 entries should be referenced with a negative index.
93 We also maintain a bidirectional chain of registers for each
94 quantity number. The `qty_table` members `first_reg' and `last_reg',
95 and `reg_eqv_table' members `next' and `prev' hold these chains.
97 The first register in a chain is the one whose lifespan is least local.
98 Among equals, it is the one that was seen first.
99 We replace any equivalent register with that one.
101 If two registers have the same quantity number, it must be true that
102 REG expressions with qty_table `mode' must be in the hash table for both
103 registers and must be in the same class.
105 The converse is not true. Since hard registers may be referenced in
106 any mode, two REG expressions might be equivalent in the hash table
107 but not have the same quantity number if the quantity number of one
108 of the registers is not the same mode as those expressions.
110 Constants and quantity numbers
112 When a quantity has a known constant value, that value is stored
113 in the appropriate qty_table `const_rtx'. This is in addition to
114 putting the constant in the hash table as is usual for non-regs.
116 Whether a reg or a constant is preferred is determined by the configuration
117 macro CONST_COSTS and will often depend on the constant value. In any
118 event, expressions containing constants can be simplified, by fold_rtx.
120 When a quantity has a known nearly constant value (such as an address
121 of a stack slot), that value is stored in the appropriate qty_table
122 `const_rtx'.
124 Integer constants don't have a machine mode. However, cse
125 determines the intended machine mode from the destination
126 of the instruction that moves the constant. The machine mode
127 is recorded in the hash table along with the actual RTL
128 constant expression so that different modes are kept separate.
130 Other expressions:
132 To record known equivalences among expressions in general
133 we use a hash table called `table'. It has a fixed number of buckets
134 that contain chains of `struct table_elt' elements for expressions.
135 These chains connect the elements whose expressions have the same
136 hash codes.
138 Other chains through the same elements connect the elements which
139 currently have equivalent values.
141 Register references in an expression are canonicalized before hashing
142 the expression. This is done using `reg_qty' and qty_table `first_reg'.
143 The hash code of a register reference is computed using the quantity
144 number, not the register number.
146 When the value of an expression changes, it is necessary to remove from the
147 hash table not just that expression but all expressions whose values
148 could be different as a result.
150 1. If the value changing is in memory, except in special cases
151 ANYTHING referring to memory could be changed. That is because
152 nobody knows where a pointer does not point.
153 The function `invalidate_memory' removes what is necessary.
155 The special cases are when the address is constant or is
156 a constant plus a fixed register such as the frame pointer
157 or a static chain pointer. When such addresses are stored in,
158 we can tell exactly which other such addresses must be invalidated
159 due to overlap. `invalidate' does this.
160 All expressions that refer to non-constant
161 memory addresses are also invalidated. `invalidate_memory' does this.
163 2. If the value changing is a register, all expressions
164 containing references to that register, and only those,
165 must be removed.
167 Because searching the entire hash table for expressions that contain
168 a register is very slow, we try to figure out when it isn't necessary.
169 Precisely, this is necessary only when expressions have been
170 entered in the hash table using this register, and then the value has
171 changed, and then another expression wants to be added to refer to
172 the register's new value. This sequence of circumstances is rare
173 within any one basic block.
175 `REG_TICK' and `REG_IN_TABLE', accessors for members of
176 cse_reg_info, are used to detect this case. REG_TICK (i) is
177 incremented whenever a value is stored in register i.
178 REG_IN_TABLE (i) holds -1 if no references to register i have been
179 entered in the table; otherwise, it contains the value REG_TICK (i)
180 had when the references were entered. If we want to enter a
181 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
182 remove old references. Until we want to enter a new entry, the
183 mere fact that the two vectors don't match makes the entries be
184 ignored if anyone tries to match them.
186 Registers themselves are entered in the hash table as well as in
187 the equivalent-register chains. However, `REG_TICK' and
188 `REG_IN_TABLE' do not apply to expressions which are simple
189 register references. These expressions are removed from the table
190 immediately when they become invalid, and this can be done even if
191 we do not immediately search for all the expressions that refer to
192 the register.
194 A CLOBBER rtx in an instruction invalidates its operand for further
195 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
196 invalidates everything that resides in memory.
198 Related expressions:
200 Constant expressions that differ only by an additive integer
201 are called related. When a constant expression is put in
202 the table, the related expression with no constant term
203 is also entered. These are made to point at each other
204 so that it is possible to find out if there exists any
205 register equivalent to an expression related to a given expression. */
207 /* Length of qty_table vector. We know in advance we will not need
208 a quantity number this big. */
210 static int max_qty;
212 /* Next quantity number to be allocated.
213 This is 1 + the largest number needed so far. */
215 static int next_qty;
217 /* Per-qty information tracking.
219 `first_reg' and `last_reg' track the head and tail of the
220 chain of registers which currently contain this quantity.
222 `mode' contains the machine mode of this quantity.
224 `const_rtx' holds the rtx of the constant value of this
225 quantity, if known. A summations of the frame/arg pointer
226 and a constant can also be entered here. When this holds
227 a known value, `const_insn' is the insn which stored the
228 constant value.
230 `comparison_{code,const,qty}' are used to track when a
231 comparison between a quantity and some constant or register has
232 been passed. In such a case, we know the results of the comparison
233 in case we see it again. These members record a comparison that
234 is known to be true. `comparison_code' holds the rtx code of such
235 a comparison, else it is set to UNKNOWN and the other two
236 comparison members are undefined. `comparison_const' holds
237 the constant being compared against, or zero if the comparison
238 is not against a constant. `comparison_qty' holds the quantity
239 being compared against when the result is known. If the comparison
240 is not with a register, `comparison_qty' is -1. */
242 struct qty_table_elem
244 rtx const_rtx;
245 rtx_insn *const_insn;
246 rtx comparison_const;
247 int comparison_qty;
248 unsigned int first_reg, last_reg;
249 /* The sizes of these fields should match the sizes of the
250 code and mode fields of struct rtx_def (see rtl.h). */
251 ENUM_BITFIELD(rtx_code) comparison_code : 16;
252 ENUM_BITFIELD(machine_mode) mode : 8;
255 /* The table of all qtys, indexed by qty number. */
256 static struct qty_table_elem *qty_table;
258 #ifdef HAVE_cc0
259 /* For machines that have a CC0, we do not record its value in the hash
260 table since its use is guaranteed to be the insn immediately following
261 its definition and any other insn is presumed to invalidate it.
263 Instead, we store below the current and last value assigned to CC0.
264 If it should happen to be a constant, it is stored in preference
265 to the actual assigned value. In case it is a constant, we store
266 the mode in which the constant should be interpreted. */
268 static rtx this_insn_cc0, prev_insn_cc0;
269 static enum machine_mode this_insn_cc0_mode, prev_insn_cc0_mode;
270 #endif
272 /* Insn being scanned. */
274 static rtx_insn *this_insn;
275 static bool optimize_this_for_speed_p;
277 /* Index by register number, gives the number of the next (or
278 previous) register in the chain of registers sharing the same
279 value.
281 Or -1 if this register is at the end of the chain.
283 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
285 /* Per-register equivalence chain. */
286 struct reg_eqv_elem
288 int next, prev;
291 /* The table of all register equivalence chains. */
292 static struct reg_eqv_elem *reg_eqv_table;
294 struct cse_reg_info
296 /* The timestamp at which this register is initialized. */
297 unsigned int timestamp;
299 /* The quantity number of the register's current contents. */
300 int reg_qty;
302 /* The number of times the register has been altered in the current
303 basic block. */
304 int reg_tick;
306 /* The REG_TICK value at which rtx's containing this register are
307 valid in the hash table. If this does not equal the current
308 reg_tick value, such expressions existing in the hash table are
309 invalid. */
310 int reg_in_table;
312 /* The SUBREG that was set when REG_TICK was last incremented. Set
313 to -1 if the last store was to the whole register, not a subreg. */
314 unsigned int subreg_ticked;
317 /* A table of cse_reg_info indexed by register numbers. */
318 static struct cse_reg_info *cse_reg_info_table;
320 /* The size of the above table. */
321 static unsigned int cse_reg_info_table_size;
323 /* The index of the first entry that has not been initialized. */
324 static unsigned int cse_reg_info_table_first_uninitialized;
326 /* The timestamp at the beginning of the current run of
327 cse_extended_basic_block. We increment this variable at the beginning of
328 the current run of cse_extended_basic_block. The timestamp field of a
329 cse_reg_info entry matches the value of this variable if and only
330 if the entry has been initialized during the current run of
331 cse_extended_basic_block. */
332 static unsigned int cse_reg_info_timestamp;
334 /* A HARD_REG_SET containing all the hard registers for which there is
335 currently a REG expression in the hash table. Note the difference
336 from the above variables, which indicate if the REG is mentioned in some
337 expression in the table. */
339 static HARD_REG_SET hard_regs_in_table;
341 /* True if CSE has altered the CFG. */
342 static bool cse_cfg_altered;
344 /* True if CSE has altered conditional jump insns in such a way
345 that jump optimization should be redone. */
346 static bool cse_jumps_altered;
348 /* True if we put a LABEL_REF into the hash table for an INSN
349 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
350 to put in the note. */
351 static bool recorded_label_ref;
353 /* canon_hash stores 1 in do_not_record
354 if it notices a reference to CC0, PC, or some other volatile
355 subexpression. */
357 static int do_not_record;
359 /* canon_hash stores 1 in hash_arg_in_memory
360 if it notices a reference to memory within the expression being hashed. */
362 static int hash_arg_in_memory;
364 /* The hash table contains buckets which are chains of `struct table_elt's,
365 each recording one expression's information.
366 That expression is in the `exp' field.
368 The canon_exp field contains a canonical (from the point of view of
369 alias analysis) version of the `exp' field.
371 Those elements with the same hash code are chained in both directions
372 through the `next_same_hash' and `prev_same_hash' fields.
374 Each set of expressions with equivalent values
375 are on a two-way chain through the `next_same_value'
376 and `prev_same_value' fields, and all point with
377 the `first_same_value' field at the first element in
378 that chain. The chain is in order of increasing cost.
379 Each element's cost value is in its `cost' field.
381 The `in_memory' field is nonzero for elements that
382 involve any reference to memory. These elements are removed
383 whenever a write is done to an unidentified location in memory.
384 To be safe, we assume that a memory address is unidentified unless
385 the address is either a symbol constant or a constant plus
386 the frame pointer or argument pointer.
388 The `related_value' field is used to connect related expressions
389 (that differ by adding an integer).
390 The related expressions are chained in a circular fashion.
391 `related_value' is zero for expressions for which this
392 chain is not useful.
394 The `cost' field stores the cost of this element's expression.
395 The `regcost' field stores the value returned by approx_reg_cost for
396 this element's expression.
398 The `is_const' flag is set if the element is a constant (including
399 a fixed address).
401 The `flag' field is used as a temporary during some search routines.
403 The `mode' field is usually the same as GET_MODE (`exp'), but
404 if `exp' is a CONST_INT and has no machine mode then the `mode'
405 field is the mode it was being used as. Each constant is
406 recorded separately for each mode it is used with. */
408 struct table_elt
410 rtx exp;
411 rtx canon_exp;
412 struct table_elt *next_same_hash;
413 struct table_elt *prev_same_hash;
414 struct table_elt *next_same_value;
415 struct table_elt *prev_same_value;
416 struct table_elt *first_same_value;
417 struct table_elt *related_value;
418 int cost;
419 int regcost;
420 /* The size of this field should match the size
421 of the mode field of struct rtx_def (see rtl.h). */
422 ENUM_BITFIELD(machine_mode) mode : 8;
423 char in_memory;
424 char is_const;
425 char flag;
428 /* We don't want a lot of buckets, because we rarely have very many
429 things stored in the hash table, and a lot of buckets slows
430 down a lot of loops that happen frequently. */
431 #define HASH_SHIFT 5
432 #define HASH_SIZE (1 << HASH_SHIFT)
433 #define HASH_MASK (HASH_SIZE - 1)
435 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
436 register (hard registers may require `do_not_record' to be set). */
438 #define HASH(X, M) \
439 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
440 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
441 : canon_hash (X, M)) & HASH_MASK)
443 /* Like HASH, but without side-effects. */
444 #define SAFE_HASH(X, M) \
445 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
446 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
447 : safe_hash (X, M)) & HASH_MASK)
449 /* Determine whether register number N is considered a fixed register for the
450 purpose of approximating register costs.
451 It is desirable to replace other regs with fixed regs, to reduce need for
452 non-fixed hard regs.
453 A reg wins if it is either the frame pointer or designated as fixed. */
454 #define FIXED_REGNO_P(N) \
455 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
456 || fixed_regs[N] || global_regs[N])
458 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
459 hard registers and pointers into the frame are the cheapest with a cost
460 of 0. Next come pseudos with a cost of one and other hard registers with
461 a cost of 2. Aside from these special cases, call `rtx_cost'. */
463 #define CHEAP_REGNO(N) \
464 (REGNO_PTR_FRAME_P (N) \
465 || (HARD_REGISTER_NUM_P (N) \
466 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
468 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET, 1))
469 #define COST_IN(X, OUTER, OPNO) (REG_P (X) ? 0 : notreg_cost (X, OUTER, OPNO))
471 /* Get the number of times this register has been updated in this
472 basic block. */
474 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
476 /* Get the point at which REG was recorded in the table. */
478 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
480 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
481 SUBREG). */
483 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
485 /* Get the quantity number for REG. */
487 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
489 /* Determine if the quantity number for register X represents a valid index
490 into the qty_table. */
492 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
494 /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
496 #define CHEAPER(X, Y) \
497 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
499 static struct table_elt *table[HASH_SIZE];
501 /* Chain of `struct table_elt's made so far for this function
502 but currently removed from the table. */
504 static struct table_elt *free_element_chain;
506 /* Set to the cost of a constant pool reference if one was found for a
507 symbolic constant. If this was found, it means we should try to
508 convert constants into constant pool entries if they don't fit in
509 the insn. */
511 static int constant_pool_entries_cost;
512 static int constant_pool_entries_regcost;
514 /* Trace a patch through the CFG. */
516 struct branch_path
518 /* The basic block for this path entry. */
519 basic_block bb;
522 /* This data describes a block that will be processed by
523 cse_extended_basic_block. */
525 struct cse_basic_block_data
527 /* Total number of SETs in block. */
528 int nsets;
529 /* Size of current branch path, if any. */
530 int path_size;
531 /* Current path, indicating which basic_blocks will be processed. */
532 struct branch_path *path;
536 /* Pointers to the live in/live out bitmaps for the boundaries of the
537 current EBB. */
538 static bitmap cse_ebb_live_in, cse_ebb_live_out;
540 /* A simple bitmap to track which basic blocks have been visited
541 already as part of an already processed extended basic block. */
542 static sbitmap cse_visited_basic_blocks;
544 static bool fixed_base_plus_p (rtx x);
545 static int notreg_cost (rtx, enum rtx_code, int);
546 static int preferable (int, int, int, int);
547 static void new_basic_block (void);
548 static void make_new_qty (unsigned int, enum machine_mode);
549 static void make_regs_eqv (unsigned int, unsigned int);
550 static void delete_reg_equiv (unsigned int);
551 static int mention_regs (rtx);
552 static int insert_regs (rtx, struct table_elt *, int);
553 static void remove_from_table (struct table_elt *, unsigned);
554 static void remove_pseudo_from_table (rtx, unsigned);
555 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
556 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
557 static rtx lookup_as_function (rtx, enum rtx_code);
558 static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned,
559 enum machine_mode, int, int);
560 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
561 enum machine_mode);
562 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
563 static void invalidate (rtx, enum machine_mode);
564 static void remove_invalid_refs (unsigned int);
565 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
566 enum machine_mode);
567 static void rehash_using_reg (rtx);
568 static void invalidate_memory (void);
569 static void invalidate_for_call (void);
570 static rtx use_related_value (rtx, struct table_elt *);
572 static inline unsigned canon_hash (rtx, enum machine_mode);
573 static inline unsigned safe_hash (rtx, enum machine_mode);
574 static inline unsigned hash_rtx_string (const char *);
576 static rtx canon_reg (rtx, rtx_insn *);
577 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
578 enum machine_mode *,
579 enum machine_mode *);
580 static rtx fold_rtx (rtx, rtx_insn *);
581 static rtx equiv_constant (rtx);
582 static void record_jump_equiv (rtx_insn *, bool);
583 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
584 int);
585 static void cse_insn (rtx_insn *);
586 static void cse_prescan_path (struct cse_basic_block_data *);
587 static void invalidate_from_clobbers (rtx_insn *);
588 static void invalidate_from_sets_and_clobbers (rtx_insn *);
589 static rtx cse_process_notes (rtx, rtx, bool *);
590 static void cse_extended_basic_block (struct cse_basic_block_data *);
591 extern void dump_class (struct table_elt*);
592 static void get_cse_reg_info_1 (unsigned int regno);
593 static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
595 static void flush_hash_table (void);
596 static bool insn_live_p (rtx_insn *, int *);
597 static bool set_live_p (rtx, rtx_insn *, int *);
598 static void cse_change_cc_mode_insn (rtx_insn *, rtx);
599 static void cse_change_cc_mode_insns (rtx_insn *, rtx_insn *, rtx);
600 static enum machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx,
601 bool);
604 #undef RTL_HOOKS_GEN_LOWPART
605 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
607 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
609 /* Nonzero if X has the form (PLUS frame-pointer integer). */
611 static bool
612 fixed_base_plus_p (rtx x)
614 switch (GET_CODE (x))
616 case REG:
617 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
618 return true;
619 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
620 return true;
621 return false;
623 case PLUS:
624 if (!CONST_INT_P (XEXP (x, 1)))
625 return false;
626 return fixed_base_plus_p (XEXP (x, 0));
628 default:
629 return false;
633 /* Dump the expressions in the equivalence class indicated by CLASSP.
634 This function is used only for debugging. */
635 DEBUG_FUNCTION void
636 dump_class (struct table_elt *classp)
638 struct table_elt *elt;
640 fprintf (stderr, "Equivalence chain for ");
641 print_rtl (stderr, classp->exp);
642 fprintf (stderr, ": \n");
644 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
646 print_rtl (stderr, elt->exp);
647 fprintf (stderr, "\n");
651 /* Return an estimate of the cost of the registers used in an rtx.
652 This is mostly the number of different REG expressions in the rtx;
653 however for some exceptions like fixed registers we use a cost of
654 0. If any other hard register reference occurs, return MAX_COST. */
656 static int
657 approx_reg_cost (const_rtx x)
659 int cost = 0;
660 subrtx_iterator::array_type array;
661 FOR_EACH_SUBRTX (iter, array, x, NONCONST)
663 const_rtx x = *iter;
664 if (REG_P (x))
666 unsigned int regno = REGNO (x);
667 if (!CHEAP_REGNO (regno))
669 if (regno < FIRST_PSEUDO_REGISTER)
671 if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
672 return MAX_COST;
673 cost += 2;
675 else
676 cost += 1;
680 return cost;
683 /* Return a negative value if an rtx A, whose costs are given by COST_A
684 and REGCOST_A, is more desirable than an rtx B.
685 Return a positive value if A is less desirable, or 0 if the two are
686 equally good. */
687 static int
688 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
690 /* First, get rid of cases involving expressions that are entirely
691 unwanted. */
692 if (cost_a != cost_b)
694 if (cost_a == MAX_COST)
695 return 1;
696 if (cost_b == MAX_COST)
697 return -1;
700 /* Avoid extending lifetimes of hardregs. */
701 if (regcost_a != regcost_b)
703 if (regcost_a == MAX_COST)
704 return 1;
705 if (regcost_b == MAX_COST)
706 return -1;
709 /* Normal operation costs take precedence. */
710 if (cost_a != cost_b)
711 return cost_a - cost_b;
712 /* Only if these are identical consider effects on register pressure. */
713 if (regcost_a != regcost_b)
714 return regcost_a - regcost_b;
715 return 0;
718 /* Internal function, to compute cost when X is not a register; called
719 from COST macro to keep it simple. */
721 static int
722 notreg_cost (rtx x, enum rtx_code outer, int opno)
724 return ((GET_CODE (x) == SUBREG
725 && REG_P (SUBREG_REG (x))
726 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
727 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
728 && (GET_MODE_SIZE (GET_MODE (x))
729 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
730 && subreg_lowpart_p (x)
731 && TRULY_NOOP_TRUNCATION_MODES_P (GET_MODE (x),
732 GET_MODE (SUBREG_REG (x))))
734 : rtx_cost (x, outer, opno, optimize_this_for_speed_p) * 2);
738 /* Initialize CSE_REG_INFO_TABLE. */
740 static void
741 init_cse_reg_info (unsigned int nregs)
743 /* Do we need to grow the table? */
744 if (nregs > cse_reg_info_table_size)
746 unsigned int new_size;
748 if (cse_reg_info_table_size < 2048)
750 /* Compute a new size that is a power of 2 and no smaller
751 than the large of NREGS and 64. */
752 new_size = (cse_reg_info_table_size
753 ? cse_reg_info_table_size : 64);
755 while (new_size < nregs)
756 new_size *= 2;
758 else
760 /* If we need a big table, allocate just enough to hold
761 NREGS registers. */
762 new_size = nregs;
765 /* Reallocate the table with NEW_SIZE entries. */
766 free (cse_reg_info_table);
767 cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
768 cse_reg_info_table_size = new_size;
769 cse_reg_info_table_first_uninitialized = 0;
772 /* Do we have all of the first NREGS entries initialized? */
773 if (cse_reg_info_table_first_uninitialized < nregs)
775 unsigned int old_timestamp = cse_reg_info_timestamp - 1;
776 unsigned int i;
778 /* Put the old timestamp on newly allocated entries so that they
779 will all be considered out of date. We do not touch those
780 entries beyond the first NREGS entries to be nice to the
781 virtual memory. */
782 for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
783 cse_reg_info_table[i].timestamp = old_timestamp;
785 cse_reg_info_table_first_uninitialized = nregs;
789 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
791 static void
792 get_cse_reg_info_1 (unsigned int regno)
794 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
795 entry will be considered to have been initialized. */
796 cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
798 /* Initialize the rest of the entry. */
799 cse_reg_info_table[regno].reg_tick = 1;
800 cse_reg_info_table[regno].reg_in_table = -1;
801 cse_reg_info_table[regno].subreg_ticked = -1;
802 cse_reg_info_table[regno].reg_qty = -regno - 1;
805 /* Find a cse_reg_info entry for REGNO. */
807 static inline struct cse_reg_info *
808 get_cse_reg_info (unsigned int regno)
810 struct cse_reg_info *p = &cse_reg_info_table[regno];
812 /* If this entry has not been initialized, go ahead and initialize
813 it. */
814 if (p->timestamp != cse_reg_info_timestamp)
815 get_cse_reg_info_1 (regno);
817 return p;
820 /* Clear the hash table and initialize each register with its own quantity,
821 for a new basic block. */
823 static void
824 new_basic_block (void)
826 int i;
828 next_qty = 0;
830 /* Invalidate cse_reg_info_table. */
831 cse_reg_info_timestamp++;
833 /* Clear out hash table state for this pass. */
834 CLEAR_HARD_REG_SET (hard_regs_in_table);
836 /* The per-quantity values used to be initialized here, but it is
837 much faster to initialize each as it is made in `make_new_qty'. */
839 for (i = 0; i < HASH_SIZE; i++)
841 struct table_elt *first;
843 first = table[i];
844 if (first != NULL)
846 struct table_elt *last = first;
848 table[i] = NULL;
850 while (last->next_same_hash != NULL)
851 last = last->next_same_hash;
853 /* Now relink this hash entire chain into
854 the free element list. */
856 last->next_same_hash = free_element_chain;
857 free_element_chain = first;
861 #ifdef HAVE_cc0
862 prev_insn_cc0 = 0;
863 #endif
866 /* Say that register REG contains a quantity in mode MODE not in any
867 register before and initialize that quantity. */
869 static void
870 make_new_qty (unsigned int reg, enum machine_mode mode)
872 int q;
873 struct qty_table_elem *ent;
874 struct reg_eqv_elem *eqv;
876 gcc_assert (next_qty < max_qty);
878 q = REG_QTY (reg) = next_qty++;
879 ent = &qty_table[q];
880 ent->first_reg = reg;
881 ent->last_reg = reg;
882 ent->mode = mode;
883 ent->const_rtx = ent->const_insn = NULL;
884 ent->comparison_code = UNKNOWN;
886 eqv = &reg_eqv_table[reg];
887 eqv->next = eqv->prev = -1;
890 /* Make reg NEW equivalent to reg OLD.
891 OLD is not changing; NEW is. */
893 static void
894 make_regs_eqv (unsigned int new_reg, unsigned int old_reg)
896 unsigned int lastr, firstr;
897 int q = REG_QTY (old_reg);
898 struct qty_table_elem *ent;
900 ent = &qty_table[q];
902 /* Nothing should become eqv until it has a "non-invalid" qty number. */
903 gcc_assert (REGNO_QTY_VALID_P (old_reg));
905 REG_QTY (new_reg) = q;
906 firstr = ent->first_reg;
907 lastr = ent->last_reg;
909 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
910 hard regs. Among pseudos, if NEW will live longer than any other reg
911 of the same qty, and that is beyond the current basic block,
912 make it the new canonical replacement for this qty. */
913 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
914 /* Certain fixed registers might be of the class NO_REGS. This means
915 that not only can they not be allocated by the compiler, but
916 they cannot be used in substitutions or canonicalizations
917 either. */
918 && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS)
919 && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg))
920 || (new_reg >= FIRST_PSEUDO_REGISTER
921 && (firstr < FIRST_PSEUDO_REGISTER
922 || (bitmap_bit_p (cse_ebb_live_out, new_reg)
923 && !bitmap_bit_p (cse_ebb_live_out, firstr))
924 || (bitmap_bit_p (cse_ebb_live_in, new_reg)
925 && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
927 reg_eqv_table[firstr].prev = new_reg;
928 reg_eqv_table[new_reg].next = firstr;
929 reg_eqv_table[new_reg].prev = -1;
930 ent->first_reg = new_reg;
932 else
934 /* If NEW is a hard reg (known to be non-fixed), insert at end.
935 Otherwise, insert before any non-fixed hard regs that are at the
936 end. Registers of class NO_REGS cannot be used as an
937 equivalent for anything. */
938 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
939 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
940 && new_reg >= FIRST_PSEUDO_REGISTER)
941 lastr = reg_eqv_table[lastr].prev;
942 reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next;
943 if (reg_eqv_table[lastr].next >= 0)
944 reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg;
945 else
946 qty_table[q].last_reg = new_reg;
947 reg_eqv_table[lastr].next = new_reg;
948 reg_eqv_table[new_reg].prev = lastr;
952 /* Remove REG from its equivalence class. */
954 static void
955 delete_reg_equiv (unsigned int reg)
957 struct qty_table_elem *ent;
958 int q = REG_QTY (reg);
959 int p, n;
961 /* If invalid, do nothing. */
962 if (! REGNO_QTY_VALID_P (reg))
963 return;
965 ent = &qty_table[q];
967 p = reg_eqv_table[reg].prev;
968 n = reg_eqv_table[reg].next;
970 if (n != -1)
971 reg_eqv_table[n].prev = p;
972 else
973 ent->last_reg = p;
974 if (p != -1)
975 reg_eqv_table[p].next = n;
976 else
977 ent->first_reg = n;
979 REG_QTY (reg) = -reg - 1;
982 /* Remove any invalid expressions from the hash table
983 that refer to any of the registers contained in expression X.
985 Make sure that newly inserted references to those registers
986 as subexpressions will be considered valid.
988 mention_regs is not called when a register itself
989 is being stored in the table.
991 Return 1 if we have done something that may have changed the hash code
992 of X. */
994 static int
995 mention_regs (rtx x)
997 enum rtx_code code;
998 int i, j;
999 const char *fmt;
1000 int changed = 0;
1002 if (x == 0)
1003 return 0;
1005 code = GET_CODE (x);
1006 if (code == REG)
1008 unsigned int regno = REGNO (x);
1009 unsigned int endregno = END_REGNO (x);
1010 unsigned int i;
1012 for (i = regno; i < endregno; i++)
1014 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1015 remove_invalid_refs (i);
1017 REG_IN_TABLE (i) = REG_TICK (i);
1018 SUBREG_TICKED (i) = -1;
1021 return 0;
1024 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1025 pseudo if they don't use overlapping words. We handle only pseudos
1026 here for simplicity. */
1027 if (code == SUBREG && REG_P (SUBREG_REG (x))
1028 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1030 unsigned int i = REGNO (SUBREG_REG (x));
1032 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1034 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1035 the last store to this register really stored into this
1036 subreg, then remove the memory of this subreg.
1037 Otherwise, remove any memory of the entire register and
1038 all its subregs from the table. */
1039 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1040 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1041 remove_invalid_refs (i);
1042 else
1043 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1046 REG_IN_TABLE (i) = REG_TICK (i);
1047 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1048 return 0;
1051 /* If X is a comparison or a COMPARE and either operand is a register
1052 that does not have a quantity, give it one. This is so that a later
1053 call to record_jump_equiv won't cause X to be assigned a different
1054 hash code and not found in the table after that call.
1056 It is not necessary to do this here, since rehash_using_reg can
1057 fix up the table later, but doing this here eliminates the need to
1058 call that expensive function in the most common case where the only
1059 use of the register is in the comparison. */
1061 if (code == COMPARE || COMPARISON_P (x))
1063 if (REG_P (XEXP (x, 0))
1064 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1065 if (insert_regs (XEXP (x, 0), NULL, 0))
1067 rehash_using_reg (XEXP (x, 0));
1068 changed = 1;
1071 if (REG_P (XEXP (x, 1))
1072 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1073 if (insert_regs (XEXP (x, 1), NULL, 0))
1075 rehash_using_reg (XEXP (x, 1));
1076 changed = 1;
1080 fmt = GET_RTX_FORMAT (code);
1081 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1082 if (fmt[i] == 'e')
1083 changed |= mention_regs (XEXP (x, i));
1084 else if (fmt[i] == 'E')
1085 for (j = 0; j < XVECLEN (x, i); j++)
1086 changed |= mention_regs (XVECEXP (x, i, j));
1088 return changed;
1091 /* Update the register quantities for inserting X into the hash table
1092 with a value equivalent to CLASSP.
1093 (If the class does not contain a REG, it is irrelevant.)
1094 If MODIFIED is nonzero, X is a destination; it is being modified.
1095 Note that delete_reg_equiv should be called on a register
1096 before insert_regs is done on that register with MODIFIED != 0.
1098 Nonzero value means that elements of reg_qty have changed
1099 so X's hash code may be different. */
1101 static int
1102 insert_regs (rtx x, struct table_elt *classp, int modified)
1104 if (REG_P (x))
1106 unsigned int regno = REGNO (x);
1107 int qty_valid;
1109 /* If REGNO is in the equivalence table already but is of the
1110 wrong mode for that equivalence, don't do anything here. */
1112 qty_valid = REGNO_QTY_VALID_P (regno);
1113 if (qty_valid)
1115 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1117 if (ent->mode != GET_MODE (x))
1118 return 0;
1121 if (modified || ! qty_valid)
1123 if (classp)
1124 for (classp = classp->first_same_value;
1125 classp != 0;
1126 classp = classp->next_same_value)
1127 if (REG_P (classp->exp)
1128 && GET_MODE (classp->exp) == GET_MODE (x))
1130 unsigned c_regno = REGNO (classp->exp);
1132 gcc_assert (REGNO_QTY_VALID_P (c_regno));
1134 /* Suppose that 5 is hard reg and 100 and 101 are
1135 pseudos. Consider
1137 (set (reg:si 100) (reg:si 5))
1138 (set (reg:si 5) (reg:si 100))
1139 (set (reg:di 101) (reg:di 5))
1141 We would now set REG_QTY (101) = REG_QTY (5), but the
1142 entry for 5 is in SImode. When we use this later in
1143 copy propagation, we get the register in wrong mode. */
1144 if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1145 continue;
1147 make_regs_eqv (regno, c_regno);
1148 return 1;
1151 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1152 than REG_IN_TABLE to find out if there was only a single preceding
1153 invalidation - for the SUBREG - or another one, which would be
1154 for the full register. However, if we find here that REG_TICK
1155 indicates that the register is invalid, it means that it has
1156 been invalidated in a separate operation. The SUBREG might be used
1157 now (then this is a recursive call), or we might use the full REG
1158 now and a SUBREG of it later. So bump up REG_TICK so that
1159 mention_regs will do the right thing. */
1160 if (! modified
1161 && REG_IN_TABLE (regno) >= 0
1162 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1163 REG_TICK (regno)++;
1164 make_new_qty (regno, GET_MODE (x));
1165 return 1;
1168 return 0;
1171 /* If X is a SUBREG, we will likely be inserting the inner register in the
1172 table. If that register doesn't have an assigned quantity number at
1173 this point but does later, the insertion that we will be doing now will
1174 not be accessible because its hash code will have changed. So assign
1175 a quantity number now. */
1177 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1178 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1180 insert_regs (SUBREG_REG (x), NULL, 0);
1181 mention_regs (x);
1182 return 1;
1184 else
1185 return mention_regs (x);
1189 /* Compute upper and lower anchors for CST. Also compute the offset of CST
1190 from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1191 CST is equal to an anchor. */
1193 static bool
1194 compute_const_anchors (rtx cst,
1195 HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs,
1196 HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs)
1198 HOST_WIDE_INT n = INTVAL (cst);
1200 *lower_base = n & ~(targetm.const_anchor - 1);
1201 if (*lower_base == n)
1202 return false;
1204 *upper_base =
1205 (n + (targetm.const_anchor - 1)) & ~(targetm.const_anchor - 1);
1206 *upper_offs = n - *upper_base;
1207 *lower_offs = n - *lower_base;
1208 return true;
1211 /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1213 static void
1214 insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs,
1215 enum machine_mode mode)
1217 struct table_elt *elt;
1218 unsigned hash;
1219 rtx anchor_exp;
1220 rtx exp;
1222 anchor_exp = GEN_INT (anchor);
1223 hash = HASH (anchor_exp, mode);
1224 elt = lookup (anchor_exp, hash, mode);
1225 if (!elt)
1226 elt = insert (anchor_exp, NULL, hash, mode);
1228 exp = plus_constant (mode, reg, offs);
1229 /* REG has just been inserted and the hash codes recomputed. */
1230 mention_regs (exp);
1231 hash = HASH (exp, mode);
1233 /* Use the cost of the register rather than the whole expression. When
1234 looking up constant anchors we will further offset the corresponding
1235 expression therefore it does not make sense to prefer REGs over
1236 reg-immediate additions. Prefer instead the oldest expression. Also
1237 don't prefer pseudos over hard regs so that we derive constants in
1238 argument registers from other argument registers rather than from the
1239 original pseudo that was used to synthesize the constant. */
1240 insert_with_costs (exp, elt, hash, mode, COST (reg), 1);
1243 /* The constant CST is equivalent to the register REG. Create
1244 equivalences between the two anchors of CST and the corresponding
1245 register-offset expressions using REG. */
1247 static void
1248 insert_const_anchors (rtx reg, rtx cst, enum machine_mode mode)
1250 HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1252 if (!compute_const_anchors (cst, &lower_base, &lower_offs,
1253 &upper_base, &upper_offs))
1254 return;
1256 /* Ignore anchors of value 0. Constants accessible from zero are
1257 simple. */
1258 if (lower_base != 0)
1259 insert_const_anchor (lower_base, reg, -lower_offs, mode);
1261 if (upper_base != 0)
1262 insert_const_anchor (upper_base, reg, -upper_offs, mode);
1265 /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1266 ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1267 valid expression. Return the cheapest and oldest of such expressions. In
1268 *OLD, return how old the resulting expression is compared to the other
1269 equivalent expressions. */
1271 static rtx
1272 find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs,
1273 unsigned *old)
1275 struct table_elt *elt;
1276 unsigned idx;
1277 struct table_elt *match_elt;
1278 rtx match;
1280 /* Find the cheapest and *oldest* expression to maximize the chance of
1281 reusing the same pseudo. */
1283 match_elt = NULL;
1284 match = NULL_RTX;
1285 for (elt = anchor_elt->first_same_value, idx = 0;
1286 elt;
1287 elt = elt->next_same_value, idx++)
1289 if (match_elt && CHEAPER (match_elt, elt))
1290 return match;
1292 if (REG_P (elt->exp)
1293 || (GET_CODE (elt->exp) == PLUS
1294 && REG_P (XEXP (elt->exp, 0))
1295 && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT))
1297 rtx x;
1299 /* Ignore expressions that are no longer valid. */
1300 if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false))
1301 continue;
1303 x = plus_constant (GET_MODE (elt->exp), elt->exp, offs);
1304 if (REG_P (x)
1305 || (GET_CODE (x) == PLUS
1306 && IN_RANGE (INTVAL (XEXP (x, 1)),
1307 -targetm.const_anchor,
1308 targetm.const_anchor - 1)))
1310 match = x;
1311 match_elt = elt;
1312 *old = idx;
1317 return match;
1320 /* Try to express the constant SRC_CONST using a register+offset expression
1321 derived from a constant anchor. Return it if successful or NULL_RTX,
1322 otherwise. */
1324 static rtx
1325 try_const_anchors (rtx src_const, enum machine_mode mode)
1327 struct table_elt *lower_elt, *upper_elt;
1328 HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1329 rtx lower_anchor_rtx, upper_anchor_rtx;
1330 rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX;
1331 unsigned lower_old, upper_old;
1333 /* CONST_INT is used for CC modes, but we should leave those alone. */
1334 if (GET_MODE_CLASS (mode) == MODE_CC)
1335 return NULL_RTX;
1337 gcc_assert (SCALAR_INT_MODE_P (mode));
1338 if (!compute_const_anchors (src_const, &lower_base, &lower_offs,
1339 &upper_base, &upper_offs))
1340 return NULL_RTX;
1342 lower_anchor_rtx = GEN_INT (lower_base);
1343 upper_anchor_rtx = GEN_INT (upper_base);
1344 lower_elt = lookup (lower_anchor_rtx, HASH (lower_anchor_rtx, mode), mode);
1345 upper_elt = lookup (upper_anchor_rtx, HASH (upper_anchor_rtx, mode), mode);
1347 if (lower_elt)
1348 lower_exp = find_reg_offset_for_const (lower_elt, lower_offs, &lower_old);
1349 if (upper_elt)
1350 upper_exp = find_reg_offset_for_const (upper_elt, upper_offs, &upper_old);
1352 if (!lower_exp)
1353 return upper_exp;
1354 if (!upper_exp)
1355 return lower_exp;
1357 /* Return the older expression. */
1358 return (upper_old > lower_old ? upper_exp : lower_exp);
1361 /* Look in or update the hash table. */
1363 /* Remove table element ELT from use in the table.
1364 HASH is its hash code, made using the HASH macro.
1365 It's an argument because often that is known in advance
1366 and we save much time not recomputing it. */
1368 static void
1369 remove_from_table (struct table_elt *elt, unsigned int hash)
1371 if (elt == 0)
1372 return;
1374 /* Mark this element as removed. See cse_insn. */
1375 elt->first_same_value = 0;
1377 /* Remove the table element from its equivalence class. */
1380 struct table_elt *prev = elt->prev_same_value;
1381 struct table_elt *next = elt->next_same_value;
1383 if (next)
1384 next->prev_same_value = prev;
1386 if (prev)
1387 prev->next_same_value = next;
1388 else
1390 struct table_elt *newfirst = next;
1391 while (next)
1393 next->first_same_value = newfirst;
1394 next = next->next_same_value;
1399 /* Remove the table element from its hash bucket. */
1402 struct table_elt *prev = elt->prev_same_hash;
1403 struct table_elt *next = elt->next_same_hash;
1405 if (next)
1406 next->prev_same_hash = prev;
1408 if (prev)
1409 prev->next_same_hash = next;
1410 else if (table[hash] == elt)
1411 table[hash] = next;
1412 else
1414 /* This entry is not in the proper hash bucket. This can happen
1415 when two classes were merged by `merge_equiv_classes'. Search
1416 for the hash bucket that it heads. This happens only very
1417 rarely, so the cost is acceptable. */
1418 for (hash = 0; hash < HASH_SIZE; hash++)
1419 if (table[hash] == elt)
1420 table[hash] = next;
1424 /* Remove the table element from its related-value circular chain. */
1426 if (elt->related_value != 0 && elt->related_value != elt)
1428 struct table_elt *p = elt->related_value;
1430 while (p->related_value != elt)
1431 p = p->related_value;
1432 p->related_value = elt->related_value;
1433 if (p->related_value == p)
1434 p->related_value = 0;
1437 /* Now add it to the free element chain. */
1438 elt->next_same_hash = free_element_chain;
1439 free_element_chain = elt;
1442 /* Same as above, but X is a pseudo-register. */
1444 static void
1445 remove_pseudo_from_table (rtx x, unsigned int hash)
1447 struct table_elt *elt;
1449 /* Because a pseudo-register can be referenced in more than one
1450 mode, we might have to remove more than one table entry. */
1451 while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1452 remove_from_table (elt, hash);
1455 /* Look up X in the hash table and return its table element,
1456 or 0 if X is not in the table.
1458 MODE is the machine-mode of X, or if X is an integer constant
1459 with VOIDmode then MODE is the mode with which X will be used.
1461 Here we are satisfied to find an expression whose tree structure
1462 looks like X. */
1464 static struct table_elt *
1465 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1467 struct table_elt *p;
1469 for (p = table[hash]; p; p = p->next_same_hash)
1470 if (mode == p->mode && ((x == p->exp && REG_P (x))
1471 || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1472 return p;
1474 return 0;
1477 /* Like `lookup' but don't care whether the table element uses invalid regs.
1478 Also ignore discrepancies in the machine mode of a register. */
1480 static struct table_elt *
1481 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1483 struct table_elt *p;
1485 if (REG_P (x))
1487 unsigned int regno = REGNO (x);
1489 /* Don't check the machine mode when comparing registers;
1490 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1491 for (p = table[hash]; p; p = p->next_same_hash)
1492 if (REG_P (p->exp)
1493 && REGNO (p->exp) == regno)
1494 return p;
1496 else
1498 for (p = table[hash]; p; p = p->next_same_hash)
1499 if (mode == p->mode
1500 && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1501 return p;
1504 return 0;
1507 /* Look for an expression equivalent to X and with code CODE.
1508 If one is found, return that expression. */
1510 static rtx
1511 lookup_as_function (rtx x, enum rtx_code code)
1513 struct table_elt *p
1514 = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1516 if (p == 0)
1517 return 0;
1519 for (p = p->first_same_value; p; p = p->next_same_value)
1520 if (GET_CODE (p->exp) == code
1521 /* Make sure this is a valid entry in the table. */
1522 && exp_equiv_p (p->exp, p->exp, 1, false))
1523 return p->exp;
1525 return 0;
1528 /* Insert X in the hash table, assuming HASH is its hash code and
1529 CLASSP is an element of the class it should go in (or 0 if a new
1530 class should be made). COST is the code of X and reg_cost is the
1531 cost of registers in X. It is inserted at the proper position to
1532 keep the class in the order cheapest first.
1534 MODE is the machine-mode of X, or if X is an integer constant
1535 with VOIDmode then MODE is the mode with which X will be used.
1537 For elements of equal cheapness, the most recent one
1538 goes in front, except that the first element in the list
1539 remains first unless a cheaper element is added. The order of
1540 pseudo-registers does not matter, as canon_reg will be called to
1541 find the cheapest when a register is retrieved from the table.
1543 The in_memory field in the hash table element is set to 0.
1544 The caller must set it nonzero if appropriate.
1546 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1547 and if insert_regs returns a nonzero value
1548 you must then recompute its hash code before calling here.
1550 If necessary, update table showing constant values of quantities. */
1552 static struct table_elt *
1553 insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash,
1554 enum machine_mode mode, int cost, int reg_cost)
1556 struct table_elt *elt;
1558 /* If X is a register and we haven't made a quantity for it,
1559 something is wrong. */
1560 gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1562 /* If X is a hard register, show it is being put in the table. */
1563 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1564 add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1566 /* Put an element for X into the right hash bucket. */
1568 elt = free_element_chain;
1569 if (elt)
1570 free_element_chain = elt->next_same_hash;
1571 else
1572 elt = XNEW (struct table_elt);
1574 elt->exp = x;
1575 elt->canon_exp = NULL_RTX;
1576 elt->cost = cost;
1577 elt->regcost = reg_cost;
1578 elt->next_same_value = 0;
1579 elt->prev_same_value = 0;
1580 elt->next_same_hash = table[hash];
1581 elt->prev_same_hash = 0;
1582 elt->related_value = 0;
1583 elt->in_memory = 0;
1584 elt->mode = mode;
1585 elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1587 if (table[hash])
1588 table[hash]->prev_same_hash = elt;
1589 table[hash] = elt;
1591 /* Put it into the proper value-class. */
1592 if (classp)
1594 classp = classp->first_same_value;
1595 if (CHEAPER (elt, classp))
1596 /* Insert at the head of the class. */
1598 struct table_elt *p;
1599 elt->next_same_value = classp;
1600 classp->prev_same_value = elt;
1601 elt->first_same_value = elt;
1603 for (p = classp; p; p = p->next_same_value)
1604 p->first_same_value = elt;
1606 else
1608 /* Insert not at head of the class. */
1609 /* Put it after the last element cheaper than X. */
1610 struct table_elt *p, *next;
1612 for (p = classp;
1613 (next = p->next_same_value) && CHEAPER (next, elt);
1614 p = next)
1617 /* Put it after P and before NEXT. */
1618 elt->next_same_value = next;
1619 if (next)
1620 next->prev_same_value = elt;
1622 elt->prev_same_value = p;
1623 p->next_same_value = elt;
1624 elt->first_same_value = classp;
1627 else
1628 elt->first_same_value = elt;
1630 /* If this is a constant being set equivalent to a register or a register
1631 being set equivalent to a constant, note the constant equivalence.
1633 If this is a constant, it cannot be equivalent to a different constant,
1634 and a constant is the only thing that can be cheaper than a register. So
1635 we know the register is the head of the class (before the constant was
1636 inserted).
1638 If this is a register that is not already known equivalent to a
1639 constant, we must check the entire class.
1641 If this is a register that is already known equivalent to an insn,
1642 update the qtys `const_insn' to show that `this_insn' is the latest
1643 insn making that quantity equivalent to the constant. */
1645 if (elt->is_const && classp && REG_P (classp->exp)
1646 && !REG_P (x))
1648 int exp_q = REG_QTY (REGNO (classp->exp));
1649 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1651 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1652 exp_ent->const_insn = this_insn;
1655 else if (REG_P (x)
1656 && classp
1657 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1658 && ! elt->is_const)
1660 struct table_elt *p;
1662 for (p = classp; p != 0; p = p->next_same_value)
1664 if (p->is_const && !REG_P (p->exp))
1666 int x_q = REG_QTY (REGNO (x));
1667 struct qty_table_elem *x_ent = &qty_table[x_q];
1669 x_ent->const_rtx
1670 = gen_lowpart (GET_MODE (x), p->exp);
1671 x_ent->const_insn = this_insn;
1672 break;
1677 else if (REG_P (x)
1678 && qty_table[REG_QTY (REGNO (x))].const_rtx
1679 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1680 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1682 /* If this is a constant with symbolic value,
1683 and it has a term with an explicit integer value,
1684 link it up with related expressions. */
1685 if (GET_CODE (x) == CONST)
1687 rtx subexp = get_related_value (x);
1688 unsigned subhash;
1689 struct table_elt *subelt, *subelt_prev;
1691 if (subexp != 0)
1693 /* Get the integer-free subexpression in the hash table. */
1694 subhash = SAFE_HASH (subexp, mode);
1695 subelt = lookup (subexp, subhash, mode);
1696 if (subelt == 0)
1697 subelt = insert (subexp, NULL, subhash, mode);
1698 /* Initialize SUBELT's circular chain if it has none. */
1699 if (subelt->related_value == 0)
1700 subelt->related_value = subelt;
1701 /* Find the element in the circular chain that precedes SUBELT. */
1702 subelt_prev = subelt;
1703 while (subelt_prev->related_value != subelt)
1704 subelt_prev = subelt_prev->related_value;
1705 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1706 This way the element that follows SUBELT is the oldest one. */
1707 elt->related_value = subelt_prev->related_value;
1708 subelt_prev->related_value = elt;
1712 return elt;
1715 /* Wrap insert_with_costs by passing the default costs. */
1717 static struct table_elt *
1718 insert (rtx x, struct table_elt *classp, unsigned int hash,
1719 enum machine_mode mode)
1721 return
1722 insert_with_costs (x, classp, hash, mode, COST (x), approx_reg_cost (x));
1726 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1727 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1728 the two classes equivalent.
1730 CLASS1 will be the surviving class; CLASS2 should not be used after this
1731 call.
1733 Any invalid entries in CLASS2 will not be copied. */
1735 static void
1736 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1738 struct table_elt *elt, *next, *new_elt;
1740 /* Ensure we start with the head of the classes. */
1741 class1 = class1->first_same_value;
1742 class2 = class2->first_same_value;
1744 /* If they were already equal, forget it. */
1745 if (class1 == class2)
1746 return;
1748 for (elt = class2; elt; elt = next)
1750 unsigned int hash;
1751 rtx exp = elt->exp;
1752 enum machine_mode mode = elt->mode;
1754 next = elt->next_same_value;
1756 /* Remove old entry, make a new one in CLASS1's class.
1757 Don't do this for invalid entries as we cannot find their
1758 hash code (it also isn't necessary). */
1759 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1761 bool need_rehash = false;
1763 hash_arg_in_memory = 0;
1764 hash = HASH (exp, mode);
1766 if (REG_P (exp))
1768 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1769 delete_reg_equiv (REGNO (exp));
1772 if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1773 remove_pseudo_from_table (exp, hash);
1774 else
1775 remove_from_table (elt, hash);
1777 if (insert_regs (exp, class1, 0) || need_rehash)
1779 rehash_using_reg (exp);
1780 hash = HASH (exp, mode);
1782 new_elt = insert (exp, class1, hash, mode);
1783 new_elt->in_memory = hash_arg_in_memory;
1788 /* Flush the entire hash table. */
1790 static void
1791 flush_hash_table (void)
1793 int i;
1794 struct table_elt *p;
1796 for (i = 0; i < HASH_SIZE; i++)
1797 for (p = table[i]; p; p = table[i])
1799 /* Note that invalidate can remove elements
1800 after P in the current hash chain. */
1801 if (REG_P (p->exp))
1802 invalidate (p->exp, VOIDmode);
1803 else
1804 remove_from_table (p, i);
1808 /* Check whether an anti dependence exists between X and EXP. MODE and
1809 ADDR are as for canon_anti_dependence. */
1811 static bool
1812 check_dependence (const_rtx x, rtx exp, enum machine_mode mode, rtx addr)
1814 subrtx_iterator::array_type array;
1815 FOR_EACH_SUBRTX (iter, array, x, NONCONST)
1817 const_rtx x = *iter;
1818 if (MEM_P (x) && canon_anti_dependence (x, true, exp, mode, addr))
1819 return true;
1821 return false;
1824 /* Remove from the hash table, or mark as invalid, all expressions whose
1825 values could be altered by storing in X. X is a register, a subreg, or
1826 a memory reference with nonvarying address (because, when a memory
1827 reference with a varying address is stored in, all memory references are
1828 removed by invalidate_memory so specific invalidation is superfluous).
1829 FULL_MODE, if not VOIDmode, indicates that this much should be
1830 invalidated instead of just the amount indicated by the mode of X. This
1831 is only used for bitfield stores into memory.
1833 A nonvarying address may be just a register or just a symbol reference,
1834 or it may be either of those plus a numeric offset. */
1836 static void
1837 invalidate (rtx x, enum machine_mode full_mode)
1839 int i;
1840 struct table_elt *p;
1841 rtx addr;
1843 switch (GET_CODE (x))
1845 case REG:
1847 /* If X is a register, dependencies on its contents are recorded
1848 through the qty number mechanism. Just change the qty number of
1849 the register, mark it as invalid for expressions that refer to it,
1850 and remove it itself. */
1851 unsigned int regno = REGNO (x);
1852 unsigned int hash = HASH (x, GET_MODE (x));
1854 /* Remove REGNO from any quantity list it might be on and indicate
1855 that its value might have changed. If it is a pseudo, remove its
1856 entry from the hash table.
1858 For a hard register, we do the first two actions above for any
1859 additional hard registers corresponding to X. Then, if any of these
1860 registers are in the table, we must remove any REG entries that
1861 overlap these registers. */
1863 delete_reg_equiv (regno);
1864 REG_TICK (regno)++;
1865 SUBREG_TICKED (regno) = -1;
1867 if (regno >= FIRST_PSEUDO_REGISTER)
1868 remove_pseudo_from_table (x, hash);
1869 else
1871 HOST_WIDE_INT in_table
1872 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1873 unsigned int endregno = END_HARD_REGNO (x);
1874 unsigned int tregno, tendregno, rn;
1875 struct table_elt *p, *next;
1877 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1879 for (rn = regno + 1; rn < endregno; rn++)
1881 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1882 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1883 delete_reg_equiv (rn);
1884 REG_TICK (rn)++;
1885 SUBREG_TICKED (rn) = -1;
1888 if (in_table)
1889 for (hash = 0; hash < HASH_SIZE; hash++)
1890 for (p = table[hash]; p; p = next)
1892 next = p->next_same_hash;
1894 if (!REG_P (p->exp)
1895 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1896 continue;
1898 tregno = REGNO (p->exp);
1899 tendregno = END_HARD_REGNO (p->exp);
1900 if (tendregno > regno && tregno < endregno)
1901 remove_from_table (p, hash);
1905 return;
1907 case SUBREG:
1908 invalidate (SUBREG_REG (x), VOIDmode);
1909 return;
1911 case PARALLEL:
1912 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1913 invalidate (XVECEXP (x, 0, i), VOIDmode);
1914 return;
1916 case EXPR_LIST:
1917 /* This is part of a disjoint return value; extract the location in
1918 question ignoring the offset. */
1919 invalidate (XEXP (x, 0), VOIDmode);
1920 return;
1922 case MEM:
1923 addr = canon_rtx (get_addr (XEXP (x, 0)));
1924 /* Calculate the canonical version of X here so that
1925 true_dependence doesn't generate new RTL for X on each call. */
1926 x = canon_rtx (x);
1928 /* Remove all hash table elements that refer to overlapping pieces of
1929 memory. */
1930 if (full_mode == VOIDmode)
1931 full_mode = GET_MODE (x);
1933 for (i = 0; i < HASH_SIZE; i++)
1935 struct table_elt *next;
1937 for (p = table[i]; p; p = next)
1939 next = p->next_same_hash;
1940 if (p->in_memory)
1942 /* Just canonicalize the expression once;
1943 otherwise each time we call invalidate
1944 true_dependence will canonicalize the
1945 expression again. */
1946 if (!p->canon_exp)
1947 p->canon_exp = canon_rtx (p->exp);
1948 if (check_dependence (p->canon_exp, x, full_mode, addr))
1949 remove_from_table (p, i);
1953 return;
1955 default:
1956 gcc_unreachable ();
1960 /* Remove all expressions that refer to register REGNO,
1961 since they are already invalid, and we are about to
1962 mark that register valid again and don't want the old
1963 expressions to reappear as valid. */
1965 static void
1966 remove_invalid_refs (unsigned int regno)
1968 unsigned int i;
1969 struct table_elt *p, *next;
1971 for (i = 0; i < HASH_SIZE; i++)
1972 for (p = table[i]; p; p = next)
1974 next = p->next_same_hash;
1975 if (!REG_P (p->exp)
1976 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1977 remove_from_table (p, i);
1981 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1982 and mode MODE. */
1983 static void
1984 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1985 enum machine_mode mode)
1987 unsigned int i;
1988 struct table_elt *p, *next;
1989 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1991 for (i = 0; i < HASH_SIZE; i++)
1992 for (p = table[i]; p; p = next)
1994 rtx exp = p->exp;
1995 next = p->next_same_hash;
1997 if (!REG_P (exp)
1998 && (GET_CODE (exp) != SUBREG
1999 || !REG_P (SUBREG_REG (exp))
2000 || REGNO (SUBREG_REG (exp)) != regno
2001 || (((SUBREG_BYTE (exp)
2002 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
2003 && SUBREG_BYTE (exp) <= end))
2004 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
2005 remove_from_table (p, i);
2009 /* Recompute the hash codes of any valid entries in the hash table that
2010 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2012 This is called when we make a jump equivalence. */
2014 static void
2015 rehash_using_reg (rtx x)
2017 unsigned int i;
2018 struct table_elt *p, *next;
2019 unsigned hash;
2021 if (GET_CODE (x) == SUBREG)
2022 x = SUBREG_REG (x);
2024 /* If X is not a register or if the register is known not to be in any
2025 valid entries in the table, we have no work to do. */
2027 if (!REG_P (x)
2028 || REG_IN_TABLE (REGNO (x)) < 0
2029 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2030 return;
2032 /* Scan all hash chains looking for valid entries that mention X.
2033 If we find one and it is in the wrong hash chain, move it. */
2035 for (i = 0; i < HASH_SIZE; i++)
2036 for (p = table[i]; p; p = next)
2038 next = p->next_same_hash;
2039 if (reg_mentioned_p (x, p->exp)
2040 && exp_equiv_p (p->exp, p->exp, 1, false)
2041 && i != (hash = SAFE_HASH (p->exp, p->mode)))
2043 if (p->next_same_hash)
2044 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2046 if (p->prev_same_hash)
2047 p->prev_same_hash->next_same_hash = p->next_same_hash;
2048 else
2049 table[i] = p->next_same_hash;
2051 p->next_same_hash = table[hash];
2052 p->prev_same_hash = 0;
2053 if (table[hash])
2054 table[hash]->prev_same_hash = p;
2055 table[hash] = p;
2060 /* Remove from the hash table any expression that is a call-clobbered
2061 register. Also update their TICK values. */
2063 static void
2064 invalidate_for_call (void)
2066 unsigned int regno, endregno;
2067 unsigned int i;
2068 unsigned hash;
2069 struct table_elt *p, *next;
2070 int in_table = 0;
2071 hard_reg_set_iterator hrsi;
2073 /* Go through all the hard registers. For each that is clobbered in
2074 a CALL_INSN, remove the register from quantity chains and update
2075 reg_tick if defined. Also see if any of these registers is currently
2076 in the table. */
2077 EXECUTE_IF_SET_IN_HARD_REG_SET (regs_invalidated_by_call, 0, regno, hrsi)
2079 delete_reg_equiv (regno);
2080 if (REG_TICK (regno) >= 0)
2082 REG_TICK (regno)++;
2083 SUBREG_TICKED (regno) = -1;
2085 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2088 /* In the case where we have no call-clobbered hard registers in the
2089 table, we are done. Otherwise, scan the table and remove any
2090 entry that overlaps a call-clobbered register. */
2092 if (in_table)
2093 for (hash = 0; hash < HASH_SIZE; hash++)
2094 for (p = table[hash]; p; p = next)
2096 next = p->next_same_hash;
2098 if (!REG_P (p->exp)
2099 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2100 continue;
2102 regno = REGNO (p->exp);
2103 endregno = END_HARD_REGNO (p->exp);
2105 for (i = regno; i < endregno; i++)
2106 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2108 remove_from_table (p, hash);
2109 break;
2114 /* Given an expression X of type CONST,
2115 and ELT which is its table entry (or 0 if it
2116 is not in the hash table),
2117 return an alternate expression for X as a register plus integer.
2118 If none can be found, return 0. */
2120 static rtx
2121 use_related_value (rtx x, struct table_elt *elt)
2123 struct table_elt *relt = 0;
2124 struct table_elt *p, *q;
2125 HOST_WIDE_INT offset;
2127 /* First, is there anything related known?
2128 If we have a table element, we can tell from that.
2129 Otherwise, must look it up. */
2131 if (elt != 0 && elt->related_value != 0)
2132 relt = elt;
2133 else if (elt == 0 && GET_CODE (x) == CONST)
2135 rtx subexp = get_related_value (x);
2136 if (subexp != 0)
2137 relt = lookup (subexp,
2138 SAFE_HASH (subexp, GET_MODE (subexp)),
2139 GET_MODE (subexp));
2142 if (relt == 0)
2143 return 0;
2145 /* Search all related table entries for one that has an
2146 equivalent register. */
2148 p = relt;
2149 while (1)
2151 /* This loop is strange in that it is executed in two different cases.
2152 The first is when X is already in the table. Then it is searching
2153 the RELATED_VALUE list of X's class (RELT). The second case is when
2154 X is not in the table. Then RELT points to a class for the related
2155 value.
2157 Ensure that, whatever case we are in, that we ignore classes that have
2158 the same value as X. */
2160 if (rtx_equal_p (x, p->exp))
2161 q = 0;
2162 else
2163 for (q = p->first_same_value; q; q = q->next_same_value)
2164 if (REG_P (q->exp))
2165 break;
2167 if (q)
2168 break;
2170 p = p->related_value;
2172 /* We went all the way around, so there is nothing to be found.
2173 Alternatively, perhaps RELT was in the table for some other reason
2174 and it has no related values recorded. */
2175 if (p == relt || p == 0)
2176 break;
2179 if (q == 0)
2180 return 0;
2182 offset = (get_integer_term (x) - get_integer_term (p->exp));
2183 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2184 return plus_constant (q->mode, q->exp, offset);
2188 /* Hash a string. Just add its bytes up. */
2189 static inline unsigned
2190 hash_rtx_string (const char *ps)
2192 unsigned hash = 0;
2193 const unsigned char *p = (const unsigned char *) ps;
2195 if (p)
2196 while (*p)
2197 hash += *p++;
2199 return hash;
2202 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2203 When the callback returns true, we continue with the new rtx. */
2205 unsigned
2206 hash_rtx_cb (const_rtx x, enum machine_mode mode,
2207 int *do_not_record_p, int *hash_arg_in_memory_p,
2208 bool have_reg_qty, hash_rtx_callback_function cb)
2210 int i, j;
2211 unsigned hash = 0;
2212 enum rtx_code code;
2213 const char *fmt;
2214 enum machine_mode newmode;
2215 rtx newx;
2217 /* Used to turn recursion into iteration. We can't rely on GCC's
2218 tail-recursion elimination since we need to keep accumulating values
2219 in HASH. */
2220 repeat:
2221 if (x == 0)
2222 return hash;
2224 /* Invoke the callback first. */
2225 if (cb != NULL
2226 && ((*cb) (x, mode, &newx, &newmode)))
2228 hash += hash_rtx_cb (newx, newmode, do_not_record_p,
2229 hash_arg_in_memory_p, have_reg_qty, cb);
2230 return hash;
2233 code = GET_CODE (x);
2234 switch (code)
2236 case REG:
2238 unsigned int regno = REGNO (x);
2240 if (do_not_record_p && !reload_completed)
2242 /* On some machines, we can't record any non-fixed hard register,
2243 because extending its life will cause reload problems. We
2244 consider ap, fp, sp, gp to be fixed for this purpose.
2246 We also consider CCmode registers to be fixed for this purpose;
2247 failure to do so leads to failure to simplify 0<100 type of
2248 conditionals.
2250 On all machines, we can't record any global registers.
2251 Nor should we record any register that is in a small
2252 class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2253 bool record;
2255 if (regno >= FIRST_PSEUDO_REGISTER)
2256 record = true;
2257 else if (x == frame_pointer_rtx
2258 || x == hard_frame_pointer_rtx
2259 || x == arg_pointer_rtx
2260 || x == stack_pointer_rtx
2261 || x == pic_offset_table_rtx)
2262 record = true;
2263 else if (global_regs[regno])
2264 record = false;
2265 else if (fixed_regs[regno])
2266 record = true;
2267 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2268 record = true;
2269 else if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
2270 record = false;
2271 else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
2272 record = false;
2273 else
2274 record = true;
2276 if (!record)
2278 *do_not_record_p = 1;
2279 return 0;
2283 hash += ((unsigned int) REG << 7);
2284 hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2285 return hash;
2288 /* We handle SUBREG of a REG specially because the underlying
2289 reg changes its hash value with every value change; we don't
2290 want to have to forget unrelated subregs when one subreg changes. */
2291 case SUBREG:
2293 if (REG_P (SUBREG_REG (x)))
2295 hash += (((unsigned int) SUBREG << 7)
2296 + REGNO (SUBREG_REG (x))
2297 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2298 return hash;
2300 break;
2303 case CONST_INT:
2304 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2305 + (unsigned int) INTVAL (x));
2306 return hash;
2308 case CONST_WIDE_INT:
2309 for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++)
2310 hash += CONST_WIDE_INT_ELT (x, i);
2311 return hash;
2313 case CONST_DOUBLE:
2314 /* This is like the general case, except that it only counts
2315 the integers representing the constant. */
2316 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2317 if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (x) == VOIDmode)
2318 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2319 + (unsigned int) CONST_DOUBLE_HIGH (x));
2320 else
2321 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2322 return hash;
2324 case CONST_FIXED:
2325 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2326 hash += fixed_hash (CONST_FIXED_VALUE (x));
2327 return hash;
2329 case CONST_VECTOR:
2331 int units;
2332 rtx elt;
2334 units = CONST_VECTOR_NUNITS (x);
2336 for (i = 0; i < units; ++i)
2338 elt = CONST_VECTOR_ELT (x, i);
2339 hash += hash_rtx_cb (elt, GET_MODE (elt),
2340 do_not_record_p, hash_arg_in_memory_p,
2341 have_reg_qty, cb);
2344 return hash;
2347 /* Assume there is only one rtx object for any given label. */
2348 case LABEL_REF:
2349 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2350 differences and differences between each stage's debugging dumps. */
2351 hash += (((unsigned int) LABEL_REF << 7)
2352 + CODE_LABEL_NUMBER (LABEL_REF_LABEL (x)));
2353 return hash;
2355 case SYMBOL_REF:
2357 /* Don't hash on the symbol's address to avoid bootstrap differences.
2358 Different hash values may cause expressions to be recorded in
2359 different orders and thus different registers to be used in the
2360 final assembler. This also avoids differences in the dump files
2361 between various stages. */
2362 unsigned int h = 0;
2363 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2365 while (*p)
2366 h += (h << 7) + *p++; /* ??? revisit */
2368 hash += ((unsigned int) SYMBOL_REF << 7) + h;
2369 return hash;
2372 case MEM:
2373 /* We don't record if marked volatile or if BLKmode since we don't
2374 know the size of the move. */
2375 if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode))
2377 *do_not_record_p = 1;
2378 return 0;
2380 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2381 *hash_arg_in_memory_p = 1;
2383 /* Now that we have already found this special case,
2384 might as well speed it up as much as possible. */
2385 hash += (unsigned) MEM;
2386 x = XEXP (x, 0);
2387 goto repeat;
2389 case USE:
2390 /* A USE that mentions non-volatile memory needs special
2391 handling since the MEM may be BLKmode which normally
2392 prevents an entry from being made. Pure calls are
2393 marked by a USE which mentions BLKmode memory.
2394 See calls.c:emit_call_1. */
2395 if (MEM_P (XEXP (x, 0))
2396 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2398 hash += (unsigned) USE;
2399 x = XEXP (x, 0);
2401 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2402 *hash_arg_in_memory_p = 1;
2404 /* Now that we have already found this special case,
2405 might as well speed it up as much as possible. */
2406 hash += (unsigned) MEM;
2407 x = XEXP (x, 0);
2408 goto repeat;
2410 break;
2412 case PRE_DEC:
2413 case PRE_INC:
2414 case POST_DEC:
2415 case POST_INC:
2416 case PRE_MODIFY:
2417 case POST_MODIFY:
2418 case PC:
2419 case CC0:
2420 case CALL:
2421 case UNSPEC_VOLATILE:
2422 if (do_not_record_p) {
2423 *do_not_record_p = 1;
2424 return 0;
2426 else
2427 return hash;
2428 break;
2430 case ASM_OPERANDS:
2431 if (do_not_record_p && MEM_VOLATILE_P (x))
2433 *do_not_record_p = 1;
2434 return 0;
2436 else
2438 /* We don't want to take the filename and line into account. */
2439 hash += (unsigned) code + (unsigned) GET_MODE (x)
2440 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2441 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2442 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2444 if (ASM_OPERANDS_INPUT_LENGTH (x))
2446 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2448 hash += (hash_rtx_cb (ASM_OPERANDS_INPUT (x, i),
2449 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2450 do_not_record_p, hash_arg_in_memory_p,
2451 have_reg_qty, cb)
2452 + hash_rtx_string
2453 (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2456 hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2457 x = ASM_OPERANDS_INPUT (x, 0);
2458 mode = GET_MODE (x);
2459 goto repeat;
2462 return hash;
2464 break;
2466 default:
2467 break;
2470 i = GET_RTX_LENGTH (code) - 1;
2471 hash += (unsigned) code + (unsigned) GET_MODE (x);
2472 fmt = GET_RTX_FORMAT (code);
2473 for (; i >= 0; i--)
2475 switch (fmt[i])
2477 case 'e':
2478 /* If we are about to do the last recursive call
2479 needed at this level, change it into iteration.
2480 This function is called enough to be worth it. */
2481 if (i == 0)
2483 x = XEXP (x, i);
2484 goto repeat;
2487 hash += hash_rtx_cb (XEXP (x, i), VOIDmode, do_not_record_p,
2488 hash_arg_in_memory_p,
2489 have_reg_qty, cb);
2490 break;
2492 case 'E':
2493 for (j = 0; j < XVECLEN (x, i); j++)
2494 hash += hash_rtx_cb (XVECEXP (x, i, j), VOIDmode, do_not_record_p,
2495 hash_arg_in_memory_p,
2496 have_reg_qty, cb);
2497 break;
2499 case 's':
2500 hash += hash_rtx_string (XSTR (x, i));
2501 break;
2503 case 'i':
2504 hash += (unsigned int) XINT (x, i);
2505 break;
2507 case '0': case 't':
2508 /* Unused. */
2509 break;
2511 default:
2512 gcc_unreachable ();
2516 return hash;
2519 /* Hash an rtx. We are careful to make sure the value is never negative.
2520 Equivalent registers hash identically.
2521 MODE is used in hashing for CONST_INTs only;
2522 otherwise the mode of X is used.
2524 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2526 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2527 a MEM rtx which does not have the MEM_READONLY_P flag set.
2529 Note that cse_insn knows that the hash code of a MEM expression
2530 is just (int) MEM plus the hash code of the address. */
2532 unsigned
2533 hash_rtx (const_rtx x, enum machine_mode mode, int *do_not_record_p,
2534 int *hash_arg_in_memory_p, bool have_reg_qty)
2536 return hash_rtx_cb (x, mode, do_not_record_p,
2537 hash_arg_in_memory_p, have_reg_qty, NULL);
2540 /* Hash an rtx X for cse via hash_rtx.
2541 Stores 1 in do_not_record if any subexpression is volatile.
2542 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2543 does not have the MEM_READONLY_P flag set. */
2545 static inline unsigned
2546 canon_hash (rtx x, enum machine_mode mode)
2548 return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2551 /* Like canon_hash but with no side effects, i.e. do_not_record
2552 and hash_arg_in_memory are not changed. */
2554 static inline unsigned
2555 safe_hash (rtx x, enum machine_mode mode)
2557 int dummy_do_not_record;
2558 return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2561 /* Return 1 iff X and Y would canonicalize into the same thing,
2562 without actually constructing the canonicalization of either one.
2563 If VALIDATE is nonzero,
2564 we assume X is an expression being processed from the rtl
2565 and Y was found in the hash table. We check register refs
2566 in Y for being marked as valid.
2568 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2571 exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2573 int i, j;
2574 enum rtx_code code;
2575 const char *fmt;
2577 /* Note: it is incorrect to assume an expression is equivalent to itself
2578 if VALIDATE is nonzero. */
2579 if (x == y && !validate)
2580 return 1;
2582 if (x == 0 || y == 0)
2583 return x == y;
2585 code = GET_CODE (x);
2586 if (code != GET_CODE (y))
2587 return 0;
2589 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2590 if (GET_MODE (x) != GET_MODE (y))
2591 return 0;
2593 /* MEMs referring to different address space are not equivalent. */
2594 if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2595 return 0;
2597 switch (code)
2599 case PC:
2600 case CC0:
2601 CASE_CONST_UNIQUE:
2602 return x == y;
2604 case LABEL_REF:
2605 return LABEL_REF_LABEL (x) == LABEL_REF_LABEL (y);
2607 case SYMBOL_REF:
2608 return XSTR (x, 0) == XSTR (y, 0);
2610 case REG:
2611 if (for_gcse)
2612 return REGNO (x) == REGNO (y);
2613 else
2615 unsigned int regno = REGNO (y);
2616 unsigned int i;
2617 unsigned int endregno = END_REGNO (y);
2619 /* If the quantities are not the same, the expressions are not
2620 equivalent. If there are and we are not to validate, they
2621 are equivalent. Otherwise, ensure all regs are up-to-date. */
2623 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2624 return 0;
2626 if (! validate)
2627 return 1;
2629 for (i = regno; i < endregno; i++)
2630 if (REG_IN_TABLE (i) != REG_TICK (i))
2631 return 0;
2633 return 1;
2636 case MEM:
2637 if (for_gcse)
2639 /* A volatile mem should not be considered equivalent to any
2640 other. */
2641 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2642 return 0;
2644 /* Can't merge two expressions in different alias sets, since we
2645 can decide that the expression is transparent in a block when
2646 it isn't, due to it being set with the different alias set.
2648 Also, can't merge two expressions with different MEM_ATTRS.
2649 They could e.g. be two different entities allocated into the
2650 same space on the stack (see e.g. PR25130). In that case, the
2651 MEM addresses can be the same, even though the two MEMs are
2652 absolutely not equivalent.
2654 But because really all MEM attributes should be the same for
2655 equivalent MEMs, we just use the invariant that MEMs that have
2656 the same attributes share the same mem_attrs data structure. */
2657 if (!mem_attrs_eq_p (MEM_ATTRS (x), MEM_ATTRS (y)))
2658 return 0;
2660 /* If we are handling exceptions, we cannot consider two expressions
2661 with different trapping status as equivalent, because simple_mem
2662 might accept one and reject the other. */
2663 if (cfun->can_throw_non_call_exceptions
2664 && (MEM_NOTRAP_P (x) != MEM_NOTRAP_P (y)))
2665 return 0;
2667 break;
2669 /* For commutative operations, check both orders. */
2670 case PLUS:
2671 case MULT:
2672 case AND:
2673 case IOR:
2674 case XOR:
2675 case NE:
2676 case EQ:
2677 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2678 validate, for_gcse)
2679 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2680 validate, for_gcse))
2681 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2682 validate, for_gcse)
2683 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2684 validate, for_gcse)));
2686 case ASM_OPERANDS:
2687 /* We don't use the generic code below because we want to
2688 disregard filename and line numbers. */
2690 /* A volatile asm isn't equivalent to any other. */
2691 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2692 return 0;
2694 if (GET_MODE (x) != GET_MODE (y)
2695 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2696 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2697 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2698 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2699 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2700 return 0;
2702 if (ASM_OPERANDS_INPUT_LENGTH (x))
2704 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2705 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2706 ASM_OPERANDS_INPUT (y, i),
2707 validate, for_gcse)
2708 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2709 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2710 return 0;
2713 return 1;
2715 default:
2716 break;
2719 /* Compare the elements. If any pair of corresponding elements
2720 fail to match, return 0 for the whole thing. */
2722 fmt = GET_RTX_FORMAT (code);
2723 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2725 switch (fmt[i])
2727 case 'e':
2728 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2729 validate, for_gcse))
2730 return 0;
2731 break;
2733 case 'E':
2734 if (XVECLEN (x, i) != XVECLEN (y, i))
2735 return 0;
2736 for (j = 0; j < XVECLEN (x, i); j++)
2737 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2738 validate, for_gcse))
2739 return 0;
2740 break;
2742 case 's':
2743 if (strcmp (XSTR (x, i), XSTR (y, i)))
2744 return 0;
2745 break;
2747 case 'i':
2748 if (XINT (x, i) != XINT (y, i))
2749 return 0;
2750 break;
2752 case 'w':
2753 if (XWINT (x, i) != XWINT (y, i))
2754 return 0;
2755 break;
2757 case '0':
2758 case 't':
2759 break;
2761 default:
2762 gcc_unreachable ();
2766 return 1;
2769 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2770 the result if necessary. INSN is as for canon_reg. */
2772 static void
2773 validate_canon_reg (rtx *xloc, rtx_insn *insn)
2775 if (*xloc)
2777 rtx new_rtx = canon_reg (*xloc, insn);
2779 /* If replacing pseudo with hard reg or vice versa, ensure the
2780 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2781 gcc_assert (insn && new_rtx);
2782 validate_change (insn, xloc, new_rtx, 1);
2786 /* Canonicalize an expression:
2787 replace each register reference inside it
2788 with the "oldest" equivalent register.
2790 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2791 after we make our substitution. The calls are made with IN_GROUP nonzero
2792 so apply_change_group must be called upon the outermost return from this
2793 function (unless INSN is zero). The result of apply_change_group can
2794 generally be discarded since the changes we are making are optional. */
2796 static rtx
2797 canon_reg (rtx x, rtx_insn *insn)
2799 int i;
2800 enum rtx_code code;
2801 const char *fmt;
2803 if (x == 0)
2804 return x;
2806 code = GET_CODE (x);
2807 switch (code)
2809 case PC:
2810 case CC0:
2811 case CONST:
2812 CASE_CONST_ANY:
2813 case SYMBOL_REF:
2814 case LABEL_REF:
2815 case ADDR_VEC:
2816 case ADDR_DIFF_VEC:
2817 return x;
2819 case REG:
2821 int first;
2822 int q;
2823 struct qty_table_elem *ent;
2825 /* Never replace a hard reg, because hard regs can appear
2826 in more than one machine mode, and we must preserve the mode
2827 of each occurrence. Also, some hard regs appear in
2828 MEMs that are shared and mustn't be altered. Don't try to
2829 replace any reg that maps to a reg of class NO_REGS. */
2830 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2831 || ! REGNO_QTY_VALID_P (REGNO (x)))
2832 return x;
2834 q = REG_QTY (REGNO (x));
2835 ent = &qty_table[q];
2836 first = ent->first_reg;
2837 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2838 : REGNO_REG_CLASS (first) == NO_REGS ? x
2839 : gen_rtx_REG (ent->mode, first));
2842 default:
2843 break;
2846 fmt = GET_RTX_FORMAT (code);
2847 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2849 int j;
2851 if (fmt[i] == 'e')
2852 validate_canon_reg (&XEXP (x, i), insn);
2853 else if (fmt[i] == 'E')
2854 for (j = 0; j < XVECLEN (x, i); j++)
2855 validate_canon_reg (&XVECEXP (x, i, j), insn);
2858 return x;
2861 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2862 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2863 what values are being compared.
2865 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2866 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2867 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2868 compared to produce cc0.
2870 The return value is the comparison operator and is either the code of
2871 A or the code corresponding to the inverse of the comparison. */
2873 static enum rtx_code
2874 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2875 enum machine_mode *pmode1, enum machine_mode *pmode2)
2877 rtx arg1, arg2;
2878 hash_set<rtx> *visited = NULL;
2879 /* Set nonzero when we find something of interest. */
2880 rtx x = NULL;
2882 arg1 = *parg1, arg2 = *parg2;
2884 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2886 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2888 int reverse_code = 0;
2889 struct table_elt *p = 0;
2891 /* Remember state from previous iteration. */
2892 if (x)
2894 if (!visited)
2895 visited = new hash_set<rtx>;
2896 visited->add (x);
2897 x = 0;
2900 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2901 On machines with CC0, this is the only case that can occur, since
2902 fold_rtx will return the COMPARE or item being compared with zero
2903 when given CC0. */
2905 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2906 x = arg1;
2908 /* If ARG1 is a comparison operator and CODE is testing for
2909 STORE_FLAG_VALUE, get the inner arguments. */
2911 else if (COMPARISON_P (arg1))
2913 #ifdef FLOAT_STORE_FLAG_VALUE
2914 REAL_VALUE_TYPE fsfv;
2915 #endif
2917 if (code == NE
2918 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2919 && code == LT && STORE_FLAG_VALUE == -1)
2920 #ifdef FLOAT_STORE_FLAG_VALUE
2921 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2922 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2923 REAL_VALUE_NEGATIVE (fsfv)))
2924 #endif
2926 x = arg1;
2927 else if (code == EQ
2928 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2929 && code == GE && STORE_FLAG_VALUE == -1)
2930 #ifdef FLOAT_STORE_FLAG_VALUE
2931 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2932 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2933 REAL_VALUE_NEGATIVE (fsfv)))
2934 #endif
2936 x = arg1, reverse_code = 1;
2939 /* ??? We could also check for
2941 (ne (and (eq (...) (const_int 1))) (const_int 0))
2943 and related forms, but let's wait until we see them occurring. */
2945 if (x == 0)
2946 /* Look up ARG1 in the hash table and see if it has an equivalence
2947 that lets us see what is being compared. */
2948 p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
2949 if (p)
2951 p = p->first_same_value;
2953 /* If what we compare is already known to be constant, that is as
2954 good as it gets.
2955 We need to break the loop in this case, because otherwise we
2956 can have an infinite loop when looking at a reg that is known
2957 to be a constant which is the same as a comparison of a reg
2958 against zero which appears later in the insn stream, which in
2959 turn is constant and the same as the comparison of the first reg
2960 against zero... */
2961 if (p->is_const)
2962 break;
2965 for (; p; p = p->next_same_value)
2967 enum machine_mode inner_mode = GET_MODE (p->exp);
2968 #ifdef FLOAT_STORE_FLAG_VALUE
2969 REAL_VALUE_TYPE fsfv;
2970 #endif
2972 /* If the entry isn't valid, skip it. */
2973 if (! exp_equiv_p (p->exp, p->exp, 1, false))
2974 continue;
2976 /* If it's a comparison we've used before, skip it. */
2977 if (visited && visited->contains (p->exp))
2978 continue;
2980 if (GET_CODE (p->exp) == COMPARE
2981 /* Another possibility is that this machine has a compare insn
2982 that includes the comparison code. In that case, ARG1 would
2983 be equivalent to a comparison operation that would set ARG1 to
2984 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2985 ORIG_CODE is the actual comparison being done; if it is an EQ,
2986 we must reverse ORIG_CODE. On machine with a negative value
2987 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2988 || ((code == NE
2989 || (code == LT
2990 && val_signbit_known_set_p (inner_mode,
2991 STORE_FLAG_VALUE))
2992 #ifdef FLOAT_STORE_FLAG_VALUE
2993 || (code == LT
2994 && SCALAR_FLOAT_MODE_P (inner_mode)
2995 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2996 REAL_VALUE_NEGATIVE (fsfv)))
2997 #endif
2999 && COMPARISON_P (p->exp)))
3001 x = p->exp;
3002 break;
3004 else if ((code == EQ
3005 || (code == GE
3006 && val_signbit_known_set_p (inner_mode,
3007 STORE_FLAG_VALUE))
3008 #ifdef FLOAT_STORE_FLAG_VALUE
3009 || (code == GE
3010 && SCALAR_FLOAT_MODE_P (inner_mode)
3011 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3012 REAL_VALUE_NEGATIVE (fsfv)))
3013 #endif
3015 && COMPARISON_P (p->exp))
3017 reverse_code = 1;
3018 x = p->exp;
3019 break;
3022 /* If this non-trapping address, e.g. fp + constant, the
3023 equivalent is a better operand since it may let us predict
3024 the value of the comparison. */
3025 else if (!rtx_addr_can_trap_p (p->exp))
3027 arg1 = p->exp;
3028 continue;
3032 /* If we didn't find a useful equivalence for ARG1, we are done.
3033 Otherwise, set up for the next iteration. */
3034 if (x == 0)
3035 break;
3037 /* If we need to reverse the comparison, make sure that that is
3038 possible -- we can't necessarily infer the value of GE from LT
3039 with floating-point operands. */
3040 if (reverse_code)
3042 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3043 if (reversed == UNKNOWN)
3044 break;
3045 else
3046 code = reversed;
3048 else if (COMPARISON_P (x))
3049 code = GET_CODE (x);
3050 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3053 /* Return our results. Return the modes from before fold_rtx
3054 because fold_rtx might produce const_int, and then it's too late. */
3055 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3056 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3058 if (visited)
3059 delete visited;
3060 return code;
3063 /* If X is a nontrivial arithmetic operation on an argument for which
3064 a constant value can be determined, return the result of operating
3065 on that value, as a constant. Otherwise, return X, possibly with
3066 one or more operands changed to a forward-propagated constant.
3068 If X is a register whose contents are known, we do NOT return
3069 those contents here; equiv_constant is called to perform that task.
3070 For SUBREGs and MEMs, we do that both here and in equiv_constant.
3072 INSN is the insn that we may be modifying. If it is 0, make a copy
3073 of X before modifying it. */
3075 static rtx
3076 fold_rtx (rtx x, rtx_insn *insn)
3078 enum rtx_code code;
3079 enum machine_mode mode;
3080 const char *fmt;
3081 int i;
3082 rtx new_rtx = 0;
3083 int changed = 0;
3085 /* Operands of X. */
3086 rtx folded_arg0;
3087 rtx folded_arg1;
3089 /* Constant equivalents of first three operands of X;
3090 0 when no such equivalent is known. */
3091 rtx const_arg0;
3092 rtx const_arg1;
3093 rtx const_arg2;
3095 /* The mode of the first operand of X. We need this for sign and zero
3096 extends. */
3097 enum machine_mode mode_arg0;
3099 if (x == 0)
3100 return x;
3102 /* Try to perform some initial simplifications on X. */
3103 code = GET_CODE (x);
3104 switch (code)
3106 case MEM:
3107 case SUBREG:
3108 if ((new_rtx = equiv_constant (x)) != NULL_RTX)
3109 return new_rtx;
3110 return x;
3112 case CONST:
3113 CASE_CONST_ANY:
3114 case SYMBOL_REF:
3115 case LABEL_REF:
3116 case REG:
3117 case PC:
3118 /* No use simplifying an EXPR_LIST
3119 since they are used only for lists of args
3120 in a function call's REG_EQUAL note. */
3121 case EXPR_LIST:
3122 return x;
3124 #ifdef HAVE_cc0
3125 case CC0:
3126 return prev_insn_cc0;
3127 #endif
3129 case ASM_OPERANDS:
3130 if (insn)
3132 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3133 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3134 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3136 return x;
3138 #ifdef NO_FUNCTION_CSE
3139 case CALL:
3140 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3141 return x;
3142 break;
3143 #endif
3145 /* Anything else goes through the loop below. */
3146 default:
3147 break;
3150 mode = GET_MODE (x);
3151 const_arg0 = 0;
3152 const_arg1 = 0;
3153 const_arg2 = 0;
3154 mode_arg0 = VOIDmode;
3156 /* Try folding our operands.
3157 Then see which ones have constant values known. */
3159 fmt = GET_RTX_FORMAT (code);
3160 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3161 if (fmt[i] == 'e')
3163 rtx folded_arg = XEXP (x, i), const_arg;
3164 enum machine_mode mode_arg = GET_MODE (folded_arg);
3166 switch (GET_CODE (folded_arg))
3168 case MEM:
3169 case REG:
3170 case SUBREG:
3171 const_arg = equiv_constant (folded_arg);
3172 break;
3174 case CONST:
3175 CASE_CONST_ANY:
3176 case SYMBOL_REF:
3177 case LABEL_REF:
3178 const_arg = folded_arg;
3179 break;
3181 #ifdef HAVE_cc0
3182 case CC0:
3183 /* The cc0-user and cc0-setter may be in different blocks if
3184 the cc0-setter potentially traps. In that case PREV_INSN_CC0
3185 will have been cleared as we exited the block with the
3186 setter.
3188 While we could potentially track cc0 in this case, it just
3189 doesn't seem to be worth it given that cc0 targets are not
3190 terribly common or important these days and trapping math
3191 is rarely used. The combination of those two conditions
3192 necessary to trip this situation is exceedingly rare in the
3193 real world. */
3194 if (!prev_insn_cc0)
3196 const_arg = NULL_RTX;
3198 else
3200 folded_arg = prev_insn_cc0;
3201 mode_arg = prev_insn_cc0_mode;
3202 const_arg = equiv_constant (folded_arg);
3204 break;
3205 #endif
3207 default:
3208 folded_arg = fold_rtx (folded_arg, insn);
3209 const_arg = equiv_constant (folded_arg);
3210 break;
3213 /* For the first three operands, see if the operand
3214 is constant or equivalent to a constant. */
3215 switch (i)
3217 case 0:
3218 folded_arg0 = folded_arg;
3219 const_arg0 = const_arg;
3220 mode_arg0 = mode_arg;
3221 break;
3222 case 1:
3223 folded_arg1 = folded_arg;
3224 const_arg1 = const_arg;
3225 break;
3226 case 2:
3227 const_arg2 = const_arg;
3228 break;
3231 /* Pick the least expensive of the argument and an equivalent constant
3232 argument. */
3233 if (const_arg != 0
3234 && const_arg != folded_arg
3235 && COST_IN (const_arg, code, i) <= COST_IN (folded_arg, code, i)
3237 /* It's not safe to substitute the operand of a conversion
3238 operator with a constant, as the conversion's identity
3239 depends upon the mode of its operand. This optimization
3240 is handled by the call to simplify_unary_operation. */
3241 && (GET_RTX_CLASS (code) != RTX_UNARY
3242 || GET_MODE (const_arg) == mode_arg0
3243 || (code != ZERO_EXTEND
3244 && code != SIGN_EXTEND
3245 && code != TRUNCATE
3246 && code != FLOAT_TRUNCATE
3247 && code != FLOAT_EXTEND
3248 && code != FLOAT
3249 && code != FIX
3250 && code != UNSIGNED_FLOAT
3251 && code != UNSIGNED_FIX)))
3252 folded_arg = const_arg;
3254 if (folded_arg == XEXP (x, i))
3255 continue;
3257 if (insn == NULL_RTX && !changed)
3258 x = copy_rtx (x);
3259 changed = 1;
3260 validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3263 if (changed)
3265 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3266 consistent with the order in X. */
3267 if (canonicalize_change_group (insn, x))
3269 rtx tem;
3270 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3271 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3274 apply_change_group ();
3277 /* If X is an arithmetic operation, see if we can simplify it. */
3279 switch (GET_RTX_CLASS (code))
3281 case RTX_UNARY:
3283 /* We can't simplify extension ops unless we know the
3284 original mode. */
3285 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3286 && mode_arg0 == VOIDmode)
3287 break;
3289 new_rtx = simplify_unary_operation (code, mode,
3290 const_arg0 ? const_arg0 : folded_arg0,
3291 mode_arg0);
3293 break;
3295 case RTX_COMPARE:
3296 case RTX_COMM_COMPARE:
3297 /* See what items are actually being compared and set FOLDED_ARG[01]
3298 to those values and CODE to the actual comparison code. If any are
3299 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3300 do anything if both operands are already known to be constant. */
3302 /* ??? Vector mode comparisons are not supported yet. */
3303 if (VECTOR_MODE_P (mode))
3304 break;
3306 if (const_arg0 == 0 || const_arg1 == 0)
3308 struct table_elt *p0, *p1;
3309 rtx true_rtx, false_rtx;
3310 enum machine_mode mode_arg1;
3312 if (SCALAR_FLOAT_MODE_P (mode))
3314 #ifdef FLOAT_STORE_FLAG_VALUE
3315 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3316 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3317 #else
3318 true_rtx = NULL_RTX;
3319 #endif
3320 false_rtx = CONST0_RTX (mode);
3322 else
3324 true_rtx = const_true_rtx;
3325 false_rtx = const0_rtx;
3328 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3329 &mode_arg0, &mode_arg1);
3331 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3332 what kinds of things are being compared, so we can't do
3333 anything with this comparison. */
3335 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3336 break;
3338 const_arg0 = equiv_constant (folded_arg0);
3339 const_arg1 = equiv_constant (folded_arg1);
3341 /* If we do not now have two constants being compared, see
3342 if we can nevertheless deduce some things about the
3343 comparison. */
3344 if (const_arg0 == 0 || const_arg1 == 0)
3346 if (const_arg1 != NULL)
3348 rtx cheapest_simplification;
3349 int cheapest_cost;
3350 rtx simp_result;
3351 struct table_elt *p;
3353 /* See if we can find an equivalent of folded_arg0
3354 that gets us a cheaper expression, possibly a
3355 constant through simplifications. */
3356 p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3357 mode_arg0);
3359 if (p != NULL)
3361 cheapest_simplification = x;
3362 cheapest_cost = COST (x);
3364 for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3366 int cost;
3368 /* If the entry isn't valid, skip it. */
3369 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3370 continue;
3372 /* Try to simplify using this equivalence. */
3373 simp_result
3374 = simplify_relational_operation (code, mode,
3375 mode_arg0,
3376 p->exp,
3377 const_arg1);
3379 if (simp_result == NULL)
3380 continue;
3382 cost = COST (simp_result);
3383 if (cost < cheapest_cost)
3385 cheapest_cost = cost;
3386 cheapest_simplification = simp_result;
3390 /* If we have a cheaper expression now, use that
3391 and try folding it further, from the top. */
3392 if (cheapest_simplification != x)
3393 return fold_rtx (copy_rtx (cheapest_simplification),
3394 insn);
3398 /* See if the two operands are the same. */
3400 if ((REG_P (folded_arg0)
3401 && REG_P (folded_arg1)
3402 && (REG_QTY (REGNO (folded_arg0))
3403 == REG_QTY (REGNO (folded_arg1))))
3404 || ((p0 = lookup (folded_arg0,
3405 SAFE_HASH (folded_arg0, mode_arg0),
3406 mode_arg0))
3407 && (p1 = lookup (folded_arg1,
3408 SAFE_HASH (folded_arg1, mode_arg0),
3409 mode_arg0))
3410 && p0->first_same_value == p1->first_same_value))
3411 folded_arg1 = folded_arg0;
3413 /* If FOLDED_ARG0 is a register, see if the comparison we are
3414 doing now is either the same as we did before or the reverse
3415 (we only check the reverse if not floating-point). */
3416 else if (REG_P (folded_arg0))
3418 int qty = REG_QTY (REGNO (folded_arg0));
3420 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3422 struct qty_table_elem *ent = &qty_table[qty];
3424 if ((comparison_dominates_p (ent->comparison_code, code)
3425 || (! FLOAT_MODE_P (mode_arg0)
3426 && comparison_dominates_p (ent->comparison_code,
3427 reverse_condition (code))))
3428 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3429 || (const_arg1
3430 && rtx_equal_p (ent->comparison_const,
3431 const_arg1))
3432 || (REG_P (folded_arg1)
3433 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3435 if (comparison_dominates_p (ent->comparison_code, code))
3437 if (true_rtx)
3438 return true_rtx;
3439 else
3440 break;
3442 else
3443 return false_rtx;
3450 /* If we are comparing against zero, see if the first operand is
3451 equivalent to an IOR with a constant. If so, we may be able to
3452 determine the result of this comparison. */
3453 if (const_arg1 == const0_rtx && !const_arg0)
3455 rtx y = lookup_as_function (folded_arg0, IOR);
3456 rtx inner_const;
3458 if (y != 0
3459 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3460 && CONST_INT_P (inner_const)
3461 && INTVAL (inner_const) != 0)
3462 folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3466 rtx op0 = const_arg0 ? const_arg0 : copy_rtx (folded_arg0);
3467 rtx op1 = const_arg1 ? const_arg1 : copy_rtx (folded_arg1);
3468 new_rtx = simplify_relational_operation (code, mode, mode_arg0,
3469 op0, op1);
3471 break;
3473 case RTX_BIN_ARITH:
3474 case RTX_COMM_ARITH:
3475 switch (code)
3477 case PLUS:
3478 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3479 with that LABEL_REF as its second operand. If so, the result is
3480 the first operand of that MINUS. This handles switches with an
3481 ADDR_DIFF_VEC table. */
3482 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3484 rtx y
3485 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3486 : lookup_as_function (folded_arg0, MINUS);
3488 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3489 && LABEL_REF_LABEL (XEXP (y, 1)) == LABEL_REF_LABEL (const_arg1))
3490 return XEXP (y, 0);
3492 /* Now try for a CONST of a MINUS like the above. */
3493 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3494 : lookup_as_function (folded_arg0, CONST))) != 0
3495 && GET_CODE (XEXP (y, 0)) == MINUS
3496 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3497 && LABEL_REF_LABEL (XEXP (XEXP (y, 0), 1)) == LABEL_REF_LABEL (const_arg1))
3498 return XEXP (XEXP (y, 0), 0);
3501 /* Likewise if the operands are in the other order. */
3502 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3504 rtx y
3505 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3506 : lookup_as_function (folded_arg1, MINUS);
3508 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3509 && LABEL_REF_LABEL (XEXP (y, 1)) == LABEL_REF_LABEL (const_arg0))
3510 return XEXP (y, 0);
3512 /* Now try for a CONST of a MINUS like the above. */
3513 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3514 : lookup_as_function (folded_arg1, CONST))) != 0
3515 && GET_CODE (XEXP (y, 0)) == MINUS
3516 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3517 && LABEL_REF_LABEL (XEXP (XEXP (y, 0), 1)) == LABEL_REF_LABEL (const_arg0))
3518 return XEXP (XEXP (y, 0), 0);
3521 /* If second operand is a register equivalent to a negative
3522 CONST_INT, see if we can find a register equivalent to the
3523 positive constant. Make a MINUS if so. Don't do this for
3524 a non-negative constant since we might then alternate between
3525 choosing positive and negative constants. Having the positive
3526 constant previously-used is the more common case. Be sure
3527 the resulting constant is non-negative; if const_arg1 were
3528 the smallest negative number this would overflow: depending
3529 on the mode, this would either just be the same value (and
3530 hence not save anything) or be incorrect. */
3531 if (const_arg1 != 0 && CONST_INT_P (const_arg1)
3532 && INTVAL (const_arg1) < 0
3533 /* This used to test
3535 -INTVAL (const_arg1) >= 0
3537 But The Sun V5.0 compilers mis-compiled that test. So
3538 instead we test for the problematic value in a more direct
3539 manner and hope the Sun compilers get it correct. */
3540 && INTVAL (const_arg1) !=
3541 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3542 && REG_P (folded_arg1))
3544 rtx new_const = GEN_INT (-INTVAL (const_arg1));
3545 struct table_elt *p
3546 = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3548 if (p)
3549 for (p = p->first_same_value; p; p = p->next_same_value)
3550 if (REG_P (p->exp))
3551 return simplify_gen_binary (MINUS, mode, folded_arg0,
3552 canon_reg (p->exp, NULL));
3554 goto from_plus;
3556 case MINUS:
3557 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3558 If so, produce (PLUS Z C2-C). */
3559 if (const_arg1 != 0 && CONST_INT_P (const_arg1))
3561 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3562 if (y && CONST_INT_P (XEXP (y, 1)))
3563 return fold_rtx (plus_constant (mode, copy_rtx (y),
3564 -INTVAL (const_arg1)),
3565 NULL);
3568 /* Fall through. */
3570 from_plus:
3571 case SMIN: case SMAX: case UMIN: case UMAX:
3572 case IOR: case AND: case XOR:
3573 case MULT:
3574 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3575 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3576 is known to be of similar form, we may be able to replace the
3577 operation with a combined operation. This may eliminate the
3578 intermediate operation if every use is simplified in this way.
3579 Note that the similar optimization done by combine.c only works
3580 if the intermediate operation's result has only one reference. */
3582 if (REG_P (folded_arg0)
3583 && const_arg1 && CONST_INT_P (const_arg1))
3585 int is_shift
3586 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3587 rtx y, inner_const, new_const;
3588 rtx canon_const_arg1 = const_arg1;
3589 enum rtx_code associate_code;
3591 if (is_shift
3592 && (INTVAL (const_arg1) >= GET_MODE_PRECISION (mode)
3593 || INTVAL (const_arg1) < 0))
3595 if (SHIFT_COUNT_TRUNCATED)
3596 canon_const_arg1 = GEN_INT (INTVAL (const_arg1)
3597 & (GET_MODE_BITSIZE (mode)
3598 - 1));
3599 else
3600 break;
3603 y = lookup_as_function (folded_arg0, code);
3604 if (y == 0)
3605 break;
3607 /* If we have compiled a statement like
3608 "if (x == (x & mask1))", and now are looking at
3609 "x & mask2", we will have a case where the first operand
3610 of Y is the same as our first operand. Unless we detect
3611 this case, an infinite loop will result. */
3612 if (XEXP (y, 0) == folded_arg0)
3613 break;
3615 inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3616 if (!inner_const || !CONST_INT_P (inner_const))
3617 break;
3619 /* Don't associate these operations if they are a PLUS with the
3620 same constant and it is a power of two. These might be doable
3621 with a pre- or post-increment. Similarly for two subtracts of
3622 identical powers of two with post decrement. */
3624 if (code == PLUS && const_arg1 == inner_const
3625 && ((HAVE_PRE_INCREMENT
3626 && exact_log2 (INTVAL (const_arg1)) >= 0)
3627 || (HAVE_POST_INCREMENT
3628 && exact_log2 (INTVAL (const_arg1)) >= 0)
3629 || (HAVE_PRE_DECREMENT
3630 && exact_log2 (- INTVAL (const_arg1)) >= 0)
3631 || (HAVE_POST_DECREMENT
3632 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
3633 break;
3635 /* ??? Vector mode shifts by scalar
3636 shift operand are not supported yet. */
3637 if (is_shift && VECTOR_MODE_P (mode))
3638 break;
3640 if (is_shift
3641 && (INTVAL (inner_const) >= GET_MODE_PRECISION (mode)
3642 || INTVAL (inner_const) < 0))
3644 if (SHIFT_COUNT_TRUNCATED)
3645 inner_const = GEN_INT (INTVAL (inner_const)
3646 & (GET_MODE_BITSIZE (mode) - 1));
3647 else
3648 break;
3651 /* Compute the code used to compose the constants. For example,
3652 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3654 associate_code = (is_shift || code == MINUS ? PLUS : code);
3656 new_const = simplify_binary_operation (associate_code, mode,
3657 canon_const_arg1,
3658 inner_const);
3660 if (new_const == 0)
3661 break;
3663 /* If we are associating shift operations, don't let this
3664 produce a shift of the size of the object or larger.
3665 This could occur when we follow a sign-extend by a right
3666 shift on a machine that does a sign-extend as a pair
3667 of shifts. */
3669 if (is_shift
3670 && CONST_INT_P (new_const)
3671 && INTVAL (new_const) >= GET_MODE_PRECISION (mode))
3673 /* As an exception, we can turn an ASHIFTRT of this
3674 form into a shift of the number of bits - 1. */
3675 if (code == ASHIFTRT)
3676 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
3677 else if (!side_effects_p (XEXP (y, 0)))
3678 return CONST0_RTX (mode);
3679 else
3680 break;
3683 y = copy_rtx (XEXP (y, 0));
3685 /* If Y contains our first operand (the most common way this
3686 can happen is if Y is a MEM), we would do into an infinite
3687 loop if we tried to fold it. So don't in that case. */
3689 if (! reg_mentioned_p (folded_arg0, y))
3690 y = fold_rtx (y, insn);
3692 return simplify_gen_binary (code, mode, y, new_const);
3694 break;
3696 case DIV: case UDIV:
3697 /* ??? The associative optimization performed immediately above is
3698 also possible for DIV and UDIV using associate_code of MULT.
3699 However, we would need extra code to verify that the
3700 multiplication does not overflow, that is, there is no overflow
3701 in the calculation of new_const. */
3702 break;
3704 default:
3705 break;
3708 new_rtx = simplify_binary_operation (code, mode,
3709 const_arg0 ? const_arg0 : folded_arg0,
3710 const_arg1 ? const_arg1 : folded_arg1);
3711 break;
3713 case RTX_OBJ:
3714 /* (lo_sum (high X) X) is simply X. */
3715 if (code == LO_SUM && const_arg0 != 0
3716 && GET_CODE (const_arg0) == HIGH
3717 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3718 return const_arg1;
3719 break;
3721 case RTX_TERNARY:
3722 case RTX_BITFIELD_OPS:
3723 new_rtx = simplify_ternary_operation (code, mode, mode_arg0,
3724 const_arg0 ? const_arg0 : folded_arg0,
3725 const_arg1 ? const_arg1 : folded_arg1,
3726 const_arg2 ? const_arg2 : XEXP (x, 2));
3727 break;
3729 default:
3730 break;
3733 return new_rtx ? new_rtx : x;
3736 /* Return a constant value currently equivalent to X.
3737 Return 0 if we don't know one. */
3739 static rtx
3740 equiv_constant (rtx x)
3742 if (REG_P (x)
3743 && REGNO_QTY_VALID_P (REGNO (x)))
3745 int x_q = REG_QTY (REGNO (x));
3746 struct qty_table_elem *x_ent = &qty_table[x_q];
3748 if (x_ent->const_rtx)
3749 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3752 if (x == 0 || CONSTANT_P (x))
3753 return x;
3755 if (GET_CODE (x) == SUBREG)
3757 enum machine_mode mode = GET_MODE (x);
3758 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3759 rtx new_rtx;
3761 /* See if we previously assigned a constant value to this SUBREG. */
3762 if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0
3763 || (new_rtx = lookup_as_function (x, CONST_WIDE_INT)) != 0
3764 || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0
3765 || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0)
3766 return new_rtx;
3768 /* If we didn't and if doing so makes sense, see if we previously
3769 assigned a constant value to the enclosing word mode SUBREG. */
3770 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode)
3771 && GET_MODE_SIZE (word_mode) < GET_MODE_SIZE (imode))
3773 int byte = SUBREG_BYTE (x) - subreg_lowpart_offset (mode, word_mode);
3774 if (byte >= 0 && (byte % UNITS_PER_WORD) == 0)
3776 rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte);
3777 new_rtx = lookup_as_function (y, CONST_INT);
3778 if (new_rtx)
3779 return gen_lowpart (mode, new_rtx);
3783 /* Otherwise see if we already have a constant for the inner REG,
3784 and if that is enough to calculate an equivalent constant for
3785 the subreg. Note that the upper bits of paradoxical subregs
3786 are undefined, so they cannot be said to equal anything. */
3787 if (REG_P (SUBREG_REG (x))
3788 && GET_MODE_SIZE (mode) <= GET_MODE_SIZE (imode)
3789 && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0)
3790 return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x));
3792 return 0;
3795 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3796 the hash table in case its value was seen before. */
3798 if (MEM_P (x))
3800 struct table_elt *elt;
3802 x = avoid_constant_pool_reference (x);
3803 if (CONSTANT_P (x))
3804 return x;
3806 elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3807 if (elt == 0)
3808 return 0;
3810 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3811 if (elt->is_const && CONSTANT_P (elt->exp))
3812 return elt->exp;
3815 return 0;
3818 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3819 "taken" branch.
3821 In certain cases, this can cause us to add an equivalence. For example,
3822 if we are following the taken case of
3823 if (i == 2)
3824 we can add the fact that `i' and '2' are now equivalent.
3826 In any case, we can record that this comparison was passed. If the same
3827 comparison is seen later, we will know its value. */
3829 static void
3830 record_jump_equiv (rtx_insn *insn, bool taken)
3832 int cond_known_true;
3833 rtx op0, op1;
3834 rtx set;
3835 enum machine_mode mode, mode0, mode1;
3836 int reversed_nonequality = 0;
3837 enum rtx_code code;
3839 /* Ensure this is the right kind of insn. */
3840 gcc_assert (any_condjump_p (insn));
3842 set = pc_set (insn);
3844 /* See if this jump condition is known true or false. */
3845 if (taken)
3846 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3847 else
3848 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3850 /* Get the type of comparison being done and the operands being compared.
3851 If we had to reverse a non-equality condition, record that fact so we
3852 know that it isn't valid for floating-point. */
3853 code = GET_CODE (XEXP (SET_SRC (set), 0));
3854 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3855 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3857 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3858 if (! cond_known_true)
3860 code = reversed_comparison_code_parts (code, op0, op1, insn);
3862 /* Don't remember if we can't find the inverse. */
3863 if (code == UNKNOWN)
3864 return;
3867 /* The mode is the mode of the non-constant. */
3868 mode = mode0;
3869 if (mode1 != VOIDmode)
3870 mode = mode1;
3872 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
3875 /* Yet another form of subreg creation. In this case, we want something in
3876 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3878 static rtx
3879 record_jump_cond_subreg (enum machine_mode mode, rtx op)
3881 enum machine_mode op_mode = GET_MODE (op);
3882 if (op_mode == mode || op_mode == VOIDmode)
3883 return op;
3884 return lowpart_subreg (mode, op, op_mode);
3887 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3888 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3889 Make any useful entries we can with that information. Called from
3890 above function and called recursively. */
3892 static void
3893 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
3894 rtx op1, int reversed_nonequality)
3896 unsigned op0_hash, op1_hash;
3897 int op0_in_memory, op1_in_memory;
3898 struct table_elt *op0_elt, *op1_elt;
3900 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3901 we know that they are also equal in the smaller mode (this is also
3902 true for all smaller modes whether or not there is a SUBREG, but
3903 is not worth testing for with no SUBREG). */
3905 /* Note that GET_MODE (op0) may not equal MODE. */
3906 if (code == EQ && paradoxical_subreg_p (op0))
3908 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3909 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3910 if (tem)
3911 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3912 reversed_nonequality);
3915 if (code == EQ && paradoxical_subreg_p (op1))
3917 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3918 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3919 if (tem)
3920 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3921 reversed_nonequality);
3924 /* Similarly, if this is an NE comparison, and either is a SUBREG
3925 making a smaller mode, we know the whole thing is also NE. */
3927 /* Note that GET_MODE (op0) may not equal MODE;
3928 if we test MODE instead, we can get an infinite recursion
3929 alternating between two modes each wider than MODE. */
3931 if (code == NE && GET_CODE (op0) == SUBREG
3932 && subreg_lowpart_p (op0)
3933 && (GET_MODE_SIZE (GET_MODE (op0))
3934 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
3936 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3937 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3938 if (tem)
3939 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3940 reversed_nonequality);
3943 if (code == NE && GET_CODE (op1) == SUBREG
3944 && subreg_lowpart_p (op1)
3945 && (GET_MODE_SIZE (GET_MODE (op1))
3946 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
3948 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3949 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3950 if (tem)
3951 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3952 reversed_nonequality);
3955 /* Hash both operands. */
3957 do_not_record = 0;
3958 hash_arg_in_memory = 0;
3959 op0_hash = HASH (op0, mode);
3960 op0_in_memory = hash_arg_in_memory;
3962 if (do_not_record)
3963 return;
3965 do_not_record = 0;
3966 hash_arg_in_memory = 0;
3967 op1_hash = HASH (op1, mode);
3968 op1_in_memory = hash_arg_in_memory;
3970 if (do_not_record)
3971 return;
3973 /* Look up both operands. */
3974 op0_elt = lookup (op0, op0_hash, mode);
3975 op1_elt = lookup (op1, op1_hash, mode);
3977 /* If both operands are already equivalent or if they are not in the
3978 table but are identical, do nothing. */
3979 if ((op0_elt != 0 && op1_elt != 0
3980 && op0_elt->first_same_value == op1_elt->first_same_value)
3981 || op0 == op1 || rtx_equal_p (op0, op1))
3982 return;
3984 /* If we aren't setting two things equal all we can do is save this
3985 comparison. Similarly if this is floating-point. In the latter
3986 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
3987 If we record the equality, we might inadvertently delete code
3988 whose intent was to change -0 to +0. */
3990 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
3992 struct qty_table_elem *ent;
3993 int qty;
3995 /* If we reversed a floating-point comparison, if OP0 is not a
3996 register, or if OP1 is neither a register or constant, we can't
3997 do anything. */
3999 if (!REG_P (op1))
4000 op1 = equiv_constant (op1);
4002 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4003 || !REG_P (op0) || op1 == 0)
4004 return;
4006 /* Put OP0 in the hash table if it isn't already. This gives it a
4007 new quantity number. */
4008 if (op0_elt == 0)
4010 if (insert_regs (op0, NULL, 0))
4012 rehash_using_reg (op0);
4013 op0_hash = HASH (op0, mode);
4015 /* If OP0 is contained in OP1, this changes its hash code
4016 as well. Faster to rehash than to check, except
4017 for the simple case of a constant. */
4018 if (! CONSTANT_P (op1))
4019 op1_hash = HASH (op1,mode);
4022 op0_elt = insert (op0, NULL, op0_hash, mode);
4023 op0_elt->in_memory = op0_in_memory;
4026 qty = REG_QTY (REGNO (op0));
4027 ent = &qty_table[qty];
4029 ent->comparison_code = code;
4030 if (REG_P (op1))
4032 /* Look it up again--in case op0 and op1 are the same. */
4033 op1_elt = lookup (op1, op1_hash, mode);
4035 /* Put OP1 in the hash table so it gets a new quantity number. */
4036 if (op1_elt == 0)
4038 if (insert_regs (op1, NULL, 0))
4040 rehash_using_reg (op1);
4041 op1_hash = HASH (op1, mode);
4044 op1_elt = insert (op1, NULL, op1_hash, mode);
4045 op1_elt->in_memory = op1_in_memory;
4048 ent->comparison_const = NULL_RTX;
4049 ent->comparison_qty = REG_QTY (REGNO (op1));
4051 else
4053 ent->comparison_const = op1;
4054 ent->comparison_qty = -1;
4057 return;
4060 /* If either side is still missing an equivalence, make it now,
4061 then merge the equivalences. */
4063 if (op0_elt == 0)
4065 if (insert_regs (op0, NULL, 0))
4067 rehash_using_reg (op0);
4068 op0_hash = HASH (op0, mode);
4071 op0_elt = insert (op0, NULL, op0_hash, mode);
4072 op0_elt->in_memory = op0_in_memory;
4075 if (op1_elt == 0)
4077 if (insert_regs (op1, NULL, 0))
4079 rehash_using_reg (op1);
4080 op1_hash = HASH (op1, mode);
4083 op1_elt = insert (op1, NULL, op1_hash, mode);
4084 op1_elt->in_memory = op1_in_memory;
4087 merge_equiv_classes (op0_elt, op1_elt);
4090 /* CSE processing for one instruction.
4092 Most "true" common subexpressions are mostly optimized away in GIMPLE,
4093 but the few that "leak through" are cleaned up by cse_insn, and complex
4094 addressing modes are often formed here.
4096 The main function is cse_insn, and between here and that function
4097 a couple of helper functions is defined to keep the size of cse_insn
4098 within reasonable proportions.
4100 Data is shared between the main and helper functions via STRUCT SET,
4101 that contains all data related for every set in the instruction that
4102 is being processed.
4104 Note that cse_main processes all sets in the instruction. Most
4105 passes in GCC only process simple SET insns or single_set insns, but
4106 CSE processes insns with multiple sets as well. */
4108 /* Data on one SET contained in the instruction. */
4110 struct set
4112 /* The SET rtx itself. */
4113 rtx rtl;
4114 /* The SET_SRC of the rtx (the original value, if it is changing). */
4115 rtx src;
4116 /* The hash-table element for the SET_SRC of the SET. */
4117 struct table_elt *src_elt;
4118 /* Hash value for the SET_SRC. */
4119 unsigned src_hash;
4120 /* Hash value for the SET_DEST. */
4121 unsigned dest_hash;
4122 /* The SET_DEST, with SUBREG, etc., stripped. */
4123 rtx inner_dest;
4124 /* Nonzero if the SET_SRC is in memory. */
4125 char src_in_memory;
4126 /* Nonzero if the SET_SRC contains something
4127 whose value cannot be predicted and understood. */
4128 char src_volatile;
4129 /* Original machine mode, in case it becomes a CONST_INT.
4130 The size of this field should match the size of the mode
4131 field of struct rtx_def (see rtl.h). */
4132 ENUM_BITFIELD(machine_mode) mode : 8;
4133 /* A constant equivalent for SET_SRC, if any. */
4134 rtx src_const;
4135 /* Hash value of constant equivalent for SET_SRC. */
4136 unsigned src_const_hash;
4137 /* Table entry for constant equivalent for SET_SRC, if any. */
4138 struct table_elt *src_const_elt;
4139 /* Table entry for the destination address. */
4140 struct table_elt *dest_addr_elt;
4143 /* Special handling for (set REG0 REG1) where REG0 is the
4144 "cheapest", cheaper than REG1. After cse, REG1 will probably not
4145 be used in the sequel, so (if easily done) change this insn to
4146 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4147 that computed their value. Then REG1 will become a dead store
4148 and won't cloud the situation for later optimizations.
4150 Do not make this change if REG1 is a hard register, because it will
4151 then be used in the sequel and we may be changing a two-operand insn
4152 into a three-operand insn.
4154 This is the last transformation that cse_insn will try to do. */
4156 static void
4157 try_back_substitute_reg (rtx set, rtx_insn *insn)
4159 rtx dest = SET_DEST (set);
4160 rtx src = SET_SRC (set);
4162 if (REG_P (dest)
4163 && REG_P (src) && ! HARD_REGISTER_P (src)
4164 && REGNO_QTY_VALID_P (REGNO (src)))
4166 int src_q = REG_QTY (REGNO (src));
4167 struct qty_table_elem *src_ent = &qty_table[src_q];
4169 if (src_ent->first_reg == REGNO (dest))
4171 /* Scan for the previous nonnote insn, but stop at a basic
4172 block boundary. */
4173 rtx_insn *prev = insn;
4174 rtx_insn *bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
4177 prev = PREV_INSN (prev);
4179 while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev)));
4181 /* Do not swap the registers around if the previous instruction
4182 attaches a REG_EQUIV note to REG1.
4184 ??? It's not entirely clear whether we can transfer a REG_EQUIV
4185 from the pseudo that originally shadowed an incoming argument
4186 to another register. Some uses of REG_EQUIV might rely on it
4187 being attached to REG1 rather than REG2.
4189 This section previously turned the REG_EQUIV into a REG_EQUAL
4190 note. We cannot do that because REG_EQUIV may provide an
4191 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4192 if (NONJUMP_INSN_P (prev)
4193 && GET_CODE (PATTERN (prev)) == SET
4194 && SET_DEST (PATTERN (prev)) == src
4195 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
4197 rtx note;
4199 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
4200 validate_change (insn, &SET_DEST (set), src, 1);
4201 validate_change (insn, &SET_SRC (set), dest, 1);
4202 apply_change_group ();
4204 /* If INSN has a REG_EQUAL note, and this note mentions
4205 REG0, then we must delete it, because the value in
4206 REG0 has changed. If the note's value is REG1, we must
4207 also delete it because that is now this insn's dest. */
4208 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
4209 if (note != 0
4210 && (reg_mentioned_p (dest, XEXP (note, 0))
4211 || rtx_equal_p (src, XEXP (note, 0))))
4212 remove_note (insn, note);
4218 /* Record all the SETs in this instruction into SETS_PTR,
4219 and return the number of recorded sets. */
4220 static int
4221 find_sets_in_insn (rtx_insn *insn, struct set **psets)
4223 struct set *sets = *psets;
4224 int n_sets = 0;
4225 rtx x = PATTERN (insn);
4227 if (GET_CODE (x) == SET)
4229 /* Ignore SETs that are unconditional jumps.
4230 They never need cse processing, so this does not hurt.
4231 The reason is not efficiency but rather
4232 so that we can test at the end for instructions
4233 that have been simplified to unconditional jumps
4234 and not be misled by unchanged instructions
4235 that were unconditional jumps to begin with. */
4236 if (SET_DEST (x) == pc_rtx
4237 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4239 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4240 The hard function value register is used only once, to copy to
4241 someplace else, so it isn't worth cse'ing. */
4242 else if (GET_CODE (SET_SRC (x)) == CALL)
4244 else
4245 sets[n_sets++].rtl = x;
4247 else if (GET_CODE (x) == PARALLEL)
4249 int i, lim = XVECLEN (x, 0);
4251 /* Go over the epressions of the PARALLEL in forward order, to
4252 put them in the same order in the SETS array. */
4253 for (i = 0; i < lim; i++)
4255 rtx y = XVECEXP (x, 0, i);
4256 if (GET_CODE (y) == SET)
4258 /* As above, we ignore unconditional jumps and call-insns and
4259 ignore the result of apply_change_group. */
4260 if (SET_DEST (y) == pc_rtx
4261 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4263 else if (GET_CODE (SET_SRC (y)) == CALL)
4265 else
4266 sets[n_sets++].rtl = y;
4271 return n_sets;
4274 /* Where possible, substitute every register reference in the N_SETS
4275 number of SETS in INSN with the the canonical register.
4277 Register canonicalization propagatest the earliest register (i.e.
4278 one that is set before INSN) with the same value. This is a very
4279 useful, simple form of CSE, to clean up warts from expanding GIMPLE
4280 to RTL. For instance, a CONST for an address is usually expanded
4281 multiple times to loads into different registers, thus creating many
4282 subexpressions of the form:
4284 (set (reg1) (some_const))
4285 (set (mem (... reg1 ...) (thing)))
4286 (set (reg2) (some_const))
4287 (set (mem (... reg2 ...) (thing)))
4289 After canonicalizing, the code takes the following form:
4291 (set (reg1) (some_const))
4292 (set (mem (... reg1 ...) (thing)))
4293 (set (reg2) (some_const))
4294 (set (mem (... reg1 ...) (thing)))
4296 The set to reg2 is now trivially dead, and the memory reference (or
4297 address, or whatever) may be a candidate for further CSEing.
4299 In this function, the result of apply_change_group can be ignored;
4300 see canon_reg. */
4302 static void
4303 canonicalize_insn (rtx_insn *insn, struct set **psets, int n_sets)
4305 struct set *sets = *psets;
4306 rtx tem;
4307 rtx x = PATTERN (insn);
4308 int i;
4310 if (CALL_P (insn))
4312 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4313 if (GET_CODE (XEXP (tem, 0)) != SET)
4314 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4317 if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
4319 canon_reg (SET_SRC (x), insn);
4320 apply_change_group ();
4321 fold_rtx (SET_SRC (x), insn);
4323 else if (GET_CODE (x) == CLOBBER)
4325 /* If we clobber memory, canon the address.
4326 This does nothing when a register is clobbered
4327 because we have already invalidated the reg. */
4328 if (MEM_P (XEXP (x, 0)))
4329 canon_reg (XEXP (x, 0), insn);
4331 else if (GET_CODE (x) == USE
4332 && ! (REG_P (XEXP (x, 0))
4333 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4334 /* Canonicalize a USE of a pseudo register or memory location. */
4335 canon_reg (x, insn);
4336 else if (GET_CODE (x) == ASM_OPERANDS)
4338 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
4340 rtx input = ASM_OPERANDS_INPUT (x, i);
4341 if (!(REG_P (input) && REGNO (input) < FIRST_PSEUDO_REGISTER))
4343 input = canon_reg (input, insn);
4344 validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1);
4348 else if (GET_CODE (x) == CALL)
4350 canon_reg (x, insn);
4351 apply_change_group ();
4352 fold_rtx (x, insn);
4354 else if (DEBUG_INSN_P (insn))
4355 canon_reg (PATTERN (insn), insn);
4356 else if (GET_CODE (x) == PARALLEL)
4358 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
4360 rtx y = XVECEXP (x, 0, i);
4361 if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
4363 canon_reg (SET_SRC (y), insn);
4364 apply_change_group ();
4365 fold_rtx (SET_SRC (y), insn);
4367 else if (GET_CODE (y) == CLOBBER)
4369 if (MEM_P (XEXP (y, 0)))
4370 canon_reg (XEXP (y, 0), insn);
4372 else if (GET_CODE (y) == USE
4373 && ! (REG_P (XEXP (y, 0))
4374 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4375 canon_reg (y, insn);
4376 else if (GET_CODE (y) == CALL)
4378 canon_reg (y, insn);
4379 apply_change_group ();
4380 fold_rtx (y, insn);
4385 if (n_sets == 1 && REG_NOTES (insn) != 0
4386 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
4388 /* We potentially will process this insn many times. Therefore,
4389 drop the REG_EQUAL note if it is equal to the SET_SRC of the
4390 unique set in INSN.
4392 Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4393 because cse_insn handles those specially. */
4394 if (GET_CODE (SET_DEST (sets[0].rtl)) != STRICT_LOW_PART
4395 && rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)))
4396 remove_note (insn, tem);
4397 else
4399 canon_reg (XEXP (tem, 0), insn);
4400 apply_change_group ();
4401 XEXP (tem, 0) = fold_rtx (XEXP (tem, 0), insn);
4402 df_notes_rescan (insn);
4406 /* Canonicalize sources and addresses of destinations.
4407 We do this in a separate pass to avoid problems when a MATCH_DUP is
4408 present in the insn pattern. In that case, we want to ensure that
4409 we don't break the duplicate nature of the pattern. So we will replace
4410 both operands at the same time. Otherwise, we would fail to find an
4411 equivalent substitution in the loop calling validate_change below.
4413 We used to suppress canonicalization of DEST if it appears in SRC,
4414 but we don't do this any more. */
4416 for (i = 0; i < n_sets; i++)
4418 rtx dest = SET_DEST (sets[i].rtl);
4419 rtx src = SET_SRC (sets[i].rtl);
4420 rtx new_rtx = canon_reg (src, insn);
4422 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4424 if (GET_CODE (dest) == ZERO_EXTRACT)
4426 validate_change (insn, &XEXP (dest, 1),
4427 canon_reg (XEXP (dest, 1), insn), 1);
4428 validate_change (insn, &XEXP (dest, 2),
4429 canon_reg (XEXP (dest, 2), insn), 1);
4432 while (GET_CODE (dest) == SUBREG
4433 || GET_CODE (dest) == ZERO_EXTRACT
4434 || GET_CODE (dest) == STRICT_LOW_PART)
4435 dest = XEXP (dest, 0);
4437 if (MEM_P (dest))
4438 canon_reg (dest, insn);
4441 /* Now that we have done all the replacements, we can apply the change
4442 group and see if they all work. Note that this will cause some
4443 canonicalizations that would have worked individually not to be applied
4444 because some other canonicalization didn't work, but this should not
4445 occur often.
4447 The result of apply_change_group can be ignored; see canon_reg. */
4449 apply_change_group ();
4452 /* Main function of CSE.
4453 First simplify sources and addresses of all assignments
4454 in the instruction, using previously-computed equivalents values.
4455 Then install the new sources and destinations in the table
4456 of available values. */
4458 static void
4459 cse_insn (rtx_insn *insn)
4461 rtx x = PATTERN (insn);
4462 int i;
4463 rtx tem;
4464 int n_sets = 0;
4466 rtx src_eqv = 0;
4467 struct table_elt *src_eqv_elt = 0;
4468 int src_eqv_volatile = 0;
4469 int src_eqv_in_memory = 0;
4470 unsigned src_eqv_hash = 0;
4472 struct set *sets = (struct set *) 0;
4474 if (GET_CODE (x) == SET)
4475 sets = XALLOCA (struct set);
4476 else if (GET_CODE (x) == PARALLEL)
4477 sets = XALLOCAVEC (struct set, XVECLEN (x, 0));
4479 this_insn = insn;
4480 #ifdef HAVE_cc0
4481 /* Records what this insn does to set CC0. */
4482 this_insn_cc0 = 0;
4483 this_insn_cc0_mode = VOIDmode;
4484 #endif
4486 /* Find all regs explicitly clobbered in this insn,
4487 to ensure they are not replaced with any other regs
4488 elsewhere in this insn. */
4489 invalidate_from_sets_and_clobbers (insn);
4491 /* Record all the SETs in this instruction. */
4492 n_sets = find_sets_in_insn (insn, &sets);
4494 /* Substitute the canonical register where possible. */
4495 canonicalize_insn (insn, &sets, n_sets);
4497 /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4498 if different, or if the DEST is a STRICT_LOW_PART. The latter condition
4499 is necessary because SRC_EQV is handled specially for this case, and if
4500 it isn't set, then there will be no equivalence for the destination. */
4501 if (n_sets == 1 && REG_NOTES (insn) != 0
4502 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4503 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4504 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4505 src_eqv = copy_rtx (XEXP (tem, 0));
4507 /* Set sets[i].src_elt to the class each source belongs to.
4508 Detect assignments from or to volatile things
4509 and set set[i] to zero so they will be ignored
4510 in the rest of this function.
4512 Nothing in this loop changes the hash table or the register chains. */
4514 for (i = 0; i < n_sets; i++)
4516 bool repeat = false;
4517 rtx src, dest;
4518 rtx src_folded;
4519 struct table_elt *elt = 0, *p;
4520 enum machine_mode mode;
4521 rtx src_eqv_here;
4522 rtx src_const = 0;
4523 rtx src_related = 0;
4524 bool src_related_is_const_anchor = false;
4525 struct table_elt *src_const_elt = 0;
4526 int src_cost = MAX_COST;
4527 int src_eqv_cost = MAX_COST;
4528 int src_folded_cost = MAX_COST;
4529 int src_related_cost = MAX_COST;
4530 int src_elt_cost = MAX_COST;
4531 int src_regcost = MAX_COST;
4532 int src_eqv_regcost = MAX_COST;
4533 int src_folded_regcost = MAX_COST;
4534 int src_related_regcost = MAX_COST;
4535 int src_elt_regcost = MAX_COST;
4536 /* Set nonzero if we need to call force_const_mem on with the
4537 contents of src_folded before using it. */
4538 int src_folded_force_flag = 0;
4540 dest = SET_DEST (sets[i].rtl);
4541 src = SET_SRC (sets[i].rtl);
4543 /* If SRC is a constant that has no machine mode,
4544 hash it with the destination's machine mode.
4545 This way we can keep different modes separate. */
4547 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4548 sets[i].mode = mode;
4550 if (src_eqv)
4552 enum machine_mode eqvmode = mode;
4553 if (GET_CODE (dest) == STRICT_LOW_PART)
4554 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4555 do_not_record = 0;
4556 hash_arg_in_memory = 0;
4557 src_eqv_hash = HASH (src_eqv, eqvmode);
4559 /* Find the equivalence class for the equivalent expression. */
4561 if (!do_not_record)
4562 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4564 src_eqv_volatile = do_not_record;
4565 src_eqv_in_memory = hash_arg_in_memory;
4568 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4569 value of the INNER register, not the destination. So it is not
4570 a valid substitution for the source. But save it for later. */
4571 if (GET_CODE (dest) == STRICT_LOW_PART)
4572 src_eqv_here = 0;
4573 else
4574 src_eqv_here = src_eqv;
4576 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4577 simplified result, which may not necessarily be valid. */
4578 src_folded = fold_rtx (src, insn);
4580 #if 0
4581 /* ??? This caused bad code to be generated for the m68k port with -O2.
4582 Suppose src is (CONST_INT -1), and that after truncation src_folded
4583 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4584 At the end we will add src and src_const to the same equivalence
4585 class. We now have 3 and -1 on the same equivalence class. This
4586 causes later instructions to be mis-optimized. */
4587 /* If storing a constant in a bitfield, pre-truncate the constant
4588 so we will be able to record it later. */
4589 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4591 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4593 if (CONST_INT_P (src)
4594 && CONST_INT_P (width)
4595 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4596 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4597 src_folded
4598 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4599 << INTVAL (width)) - 1));
4601 #endif
4603 /* Compute SRC's hash code, and also notice if it
4604 should not be recorded at all. In that case,
4605 prevent any further processing of this assignment. */
4606 do_not_record = 0;
4607 hash_arg_in_memory = 0;
4609 sets[i].src = src;
4610 sets[i].src_hash = HASH (src, mode);
4611 sets[i].src_volatile = do_not_record;
4612 sets[i].src_in_memory = hash_arg_in_memory;
4614 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4615 a pseudo, do not record SRC. Using SRC as a replacement for
4616 anything else will be incorrect in that situation. Note that
4617 this usually occurs only for stack slots, in which case all the
4618 RTL would be referring to SRC, so we don't lose any optimization
4619 opportunities by not having SRC in the hash table. */
4621 if (MEM_P (src)
4622 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4623 && REG_P (dest)
4624 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4625 sets[i].src_volatile = 1;
4627 /* Also do not record result of a non-volatile inline asm with
4628 more than one result or with clobbers, we do not want CSE to
4629 break the inline asm apart. */
4630 else if (GET_CODE (src) == ASM_OPERANDS
4631 && GET_CODE (x) == PARALLEL)
4632 sets[i].src_volatile = 1;
4634 #if 0
4635 /* It is no longer clear why we used to do this, but it doesn't
4636 appear to still be needed. So let's try without it since this
4637 code hurts cse'ing widened ops. */
4638 /* If source is a paradoxical subreg (such as QI treated as an SI),
4639 treat it as volatile. It may do the work of an SI in one context
4640 where the extra bits are not being used, but cannot replace an SI
4641 in general. */
4642 if (paradoxical_subreg_p (src))
4643 sets[i].src_volatile = 1;
4644 #endif
4646 /* Locate all possible equivalent forms for SRC. Try to replace
4647 SRC in the insn with each cheaper equivalent.
4649 We have the following types of equivalents: SRC itself, a folded
4650 version, a value given in a REG_EQUAL note, or a value related
4651 to a constant.
4653 Each of these equivalents may be part of an additional class
4654 of equivalents (if more than one is in the table, they must be in
4655 the same class; we check for this).
4657 If the source is volatile, we don't do any table lookups.
4659 We note any constant equivalent for possible later use in a
4660 REG_NOTE. */
4662 if (!sets[i].src_volatile)
4663 elt = lookup (src, sets[i].src_hash, mode);
4665 sets[i].src_elt = elt;
4667 if (elt && src_eqv_here && src_eqv_elt)
4669 if (elt->first_same_value != src_eqv_elt->first_same_value)
4671 /* The REG_EQUAL is indicating that two formerly distinct
4672 classes are now equivalent. So merge them. */
4673 merge_equiv_classes (elt, src_eqv_elt);
4674 src_eqv_hash = HASH (src_eqv, elt->mode);
4675 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4678 src_eqv_here = 0;
4681 else if (src_eqv_elt)
4682 elt = src_eqv_elt;
4684 /* Try to find a constant somewhere and record it in `src_const'.
4685 Record its table element, if any, in `src_const_elt'. Look in
4686 any known equivalences first. (If the constant is not in the
4687 table, also set `sets[i].src_const_hash'). */
4688 if (elt)
4689 for (p = elt->first_same_value; p; p = p->next_same_value)
4690 if (p->is_const)
4692 src_const = p->exp;
4693 src_const_elt = elt;
4694 break;
4697 if (src_const == 0
4698 && (CONSTANT_P (src_folded)
4699 /* Consider (minus (label_ref L1) (label_ref L2)) as
4700 "constant" here so we will record it. This allows us
4701 to fold switch statements when an ADDR_DIFF_VEC is used. */
4702 || (GET_CODE (src_folded) == MINUS
4703 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4704 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4705 src_const = src_folded, src_const_elt = elt;
4706 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4707 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4709 /* If we don't know if the constant is in the table, get its
4710 hash code and look it up. */
4711 if (src_const && src_const_elt == 0)
4713 sets[i].src_const_hash = HASH (src_const, mode);
4714 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4717 sets[i].src_const = src_const;
4718 sets[i].src_const_elt = src_const_elt;
4720 /* If the constant and our source are both in the table, mark them as
4721 equivalent. Otherwise, if a constant is in the table but the source
4722 isn't, set ELT to it. */
4723 if (src_const_elt && elt
4724 && src_const_elt->first_same_value != elt->first_same_value)
4725 merge_equiv_classes (elt, src_const_elt);
4726 else if (src_const_elt && elt == 0)
4727 elt = src_const_elt;
4729 /* See if there is a register linearly related to a constant
4730 equivalent of SRC. */
4731 if (src_const
4732 && (GET_CODE (src_const) == CONST
4733 || (src_const_elt && src_const_elt->related_value != 0)))
4735 src_related = use_related_value (src_const, src_const_elt);
4736 if (src_related)
4738 struct table_elt *src_related_elt
4739 = lookup (src_related, HASH (src_related, mode), mode);
4740 if (src_related_elt && elt)
4742 if (elt->first_same_value
4743 != src_related_elt->first_same_value)
4744 /* This can occur when we previously saw a CONST
4745 involving a SYMBOL_REF and then see the SYMBOL_REF
4746 twice. Merge the involved classes. */
4747 merge_equiv_classes (elt, src_related_elt);
4749 src_related = 0;
4750 src_related_elt = 0;
4752 else if (src_related_elt && elt == 0)
4753 elt = src_related_elt;
4757 /* See if we have a CONST_INT that is already in a register in a
4758 wider mode. */
4760 if (src_const && src_related == 0 && CONST_INT_P (src_const)
4761 && GET_MODE_CLASS (mode) == MODE_INT
4762 && GET_MODE_PRECISION (mode) < BITS_PER_WORD)
4764 enum machine_mode wider_mode;
4766 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4767 wider_mode != VOIDmode
4768 && GET_MODE_PRECISION (wider_mode) <= BITS_PER_WORD
4769 && src_related == 0;
4770 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4772 struct table_elt *const_elt
4773 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4775 if (const_elt == 0)
4776 continue;
4778 for (const_elt = const_elt->first_same_value;
4779 const_elt; const_elt = const_elt->next_same_value)
4780 if (REG_P (const_elt->exp))
4782 src_related = gen_lowpart (mode, const_elt->exp);
4783 break;
4788 /* Another possibility is that we have an AND with a constant in
4789 a mode narrower than a word. If so, it might have been generated
4790 as part of an "if" which would narrow the AND. If we already
4791 have done the AND in a wider mode, we can use a SUBREG of that
4792 value. */
4794 if (flag_expensive_optimizations && ! src_related
4795 && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1))
4796 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4798 enum machine_mode tmode;
4799 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4801 for (tmode = GET_MODE_WIDER_MODE (mode);
4802 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4803 tmode = GET_MODE_WIDER_MODE (tmode))
4805 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4806 struct table_elt *larger_elt;
4808 if (inner)
4810 PUT_MODE (new_and, tmode);
4811 XEXP (new_and, 0) = inner;
4812 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4813 if (larger_elt == 0)
4814 continue;
4816 for (larger_elt = larger_elt->first_same_value;
4817 larger_elt; larger_elt = larger_elt->next_same_value)
4818 if (REG_P (larger_elt->exp))
4820 src_related
4821 = gen_lowpart (mode, larger_elt->exp);
4822 break;
4825 if (src_related)
4826 break;
4831 #ifdef LOAD_EXTEND_OP
4832 /* See if a MEM has already been loaded with a widening operation;
4833 if it has, we can use a subreg of that. Many CISC machines
4834 also have such operations, but this is only likely to be
4835 beneficial on these machines. */
4837 if (flag_expensive_optimizations && src_related == 0
4838 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4839 && GET_MODE_CLASS (mode) == MODE_INT
4840 && MEM_P (src) && ! do_not_record
4841 && LOAD_EXTEND_OP (mode) != UNKNOWN)
4843 struct rtx_def memory_extend_buf;
4844 rtx memory_extend_rtx = &memory_extend_buf;
4845 enum machine_mode tmode;
4847 /* Set what we are trying to extend and the operation it might
4848 have been extended with. */
4849 memset (memory_extend_rtx, 0, sizeof (*memory_extend_rtx));
4850 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
4851 XEXP (memory_extend_rtx, 0) = src;
4853 for (tmode = GET_MODE_WIDER_MODE (mode);
4854 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4855 tmode = GET_MODE_WIDER_MODE (tmode))
4857 struct table_elt *larger_elt;
4859 PUT_MODE (memory_extend_rtx, tmode);
4860 larger_elt = lookup (memory_extend_rtx,
4861 HASH (memory_extend_rtx, tmode), tmode);
4862 if (larger_elt == 0)
4863 continue;
4865 for (larger_elt = larger_elt->first_same_value;
4866 larger_elt; larger_elt = larger_elt->next_same_value)
4867 if (REG_P (larger_elt->exp))
4869 src_related = gen_lowpart (mode, larger_elt->exp);
4870 break;
4873 if (src_related)
4874 break;
4877 #endif /* LOAD_EXTEND_OP */
4879 /* Try to express the constant using a register+offset expression
4880 derived from a constant anchor. */
4882 if (targetm.const_anchor
4883 && !src_related
4884 && src_const
4885 && GET_CODE (src_const) == CONST_INT)
4887 src_related = try_const_anchors (src_const, mode);
4888 src_related_is_const_anchor = src_related != NULL_RTX;
4892 if (src == src_folded)
4893 src_folded = 0;
4895 /* At this point, ELT, if nonzero, points to a class of expressions
4896 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4897 and SRC_RELATED, if nonzero, each contain additional equivalent
4898 expressions. Prune these latter expressions by deleting expressions
4899 already in the equivalence class.
4901 Check for an equivalent identical to the destination. If found,
4902 this is the preferred equivalent since it will likely lead to
4903 elimination of the insn. Indicate this by placing it in
4904 `src_related'. */
4906 if (elt)
4907 elt = elt->first_same_value;
4908 for (p = elt; p; p = p->next_same_value)
4910 enum rtx_code code = GET_CODE (p->exp);
4912 /* If the expression is not valid, ignore it. Then we do not
4913 have to check for validity below. In most cases, we can use
4914 `rtx_equal_p', since canonicalization has already been done. */
4915 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
4916 continue;
4918 /* Also skip paradoxical subregs, unless that's what we're
4919 looking for. */
4920 if (paradoxical_subreg_p (p->exp)
4921 && ! (src != 0
4922 && GET_CODE (src) == SUBREG
4923 && GET_MODE (src) == GET_MODE (p->exp)
4924 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4925 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
4926 continue;
4928 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
4929 src = 0;
4930 else if (src_folded && GET_CODE (src_folded) == code
4931 && rtx_equal_p (src_folded, p->exp))
4932 src_folded = 0;
4933 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
4934 && rtx_equal_p (src_eqv_here, p->exp))
4935 src_eqv_here = 0;
4936 else if (src_related && GET_CODE (src_related) == code
4937 && rtx_equal_p (src_related, p->exp))
4938 src_related = 0;
4940 /* This is the same as the destination of the insns, we want
4941 to prefer it. Copy it to src_related. The code below will
4942 then give it a negative cost. */
4943 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
4944 src_related = dest;
4947 /* Find the cheapest valid equivalent, trying all the available
4948 possibilities. Prefer items not in the hash table to ones
4949 that are when they are equal cost. Note that we can never
4950 worsen an insn as the current contents will also succeed.
4951 If we find an equivalent identical to the destination, use it as best,
4952 since this insn will probably be eliminated in that case. */
4953 if (src)
4955 if (rtx_equal_p (src, dest))
4956 src_cost = src_regcost = -1;
4957 else
4959 src_cost = COST (src);
4960 src_regcost = approx_reg_cost (src);
4964 if (src_eqv_here)
4966 if (rtx_equal_p (src_eqv_here, dest))
4967 src_eqv_cost = src_eqv_regcost = -1;
4968 else
4970 src_eqv_cost = COST (src_eqv_here);
4971 src_eqv_regcost = approx_reg_cost (src_eqv_here);
4975 if (src_folded)
4977 if (rtx_equal_p (src_folded, dest))
4978 src_folded_cost = src_folded_regcost = -1;
4979 else
4981 src_folded_cost = COST (src_folded);
4982 src_folded_regcost = approx_reg_cost (src_folded);
4986 if (src_related)
4988 if (rtx_equal_p (src_related, dest))
4989 src_related_cost = src_related_regcost = -1;
4990 else
4992 src_related_cost = COST (src_related);
4993 src_related_regcost = approx_reg_cost (src_related);
4995 /* If a const-anchor is used to synthesize a constant that
4996 normally requires multiple instructions then slightly prefer
4997 it over the original sequence. These instructions are likely
4998 to become redundant now. We can't compare against the cost
4999 of src_eqv_here because, on MIPS for example, multi-insn
5000 constants have zero cost; they are assumed to be hoisted from
5001 loops. */
5002 if (src_related_is_const_anchor
5003 && src_related_cost == src_cost
5004 && src_eqv_here)
5005 src_related_cost--;
5009 /* If this was an indirect jump insn, a known label will really be
5010 cheaper even though it looks more expensive. */
5011 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5012 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5014 /* Terminate loop when replacement made. This must terminate since
5015 the current contents will be tested and will always be valid. */
5016 while (1)
5018 rtx trial;
5020 /* Skip invalid entries. */
5021 while (elt && !REG_P (elt->exp)
5022 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5023 elt = elt->next_same_value;
5025 /* A paradoxical subreg would be bad here: it'll be the right
5026 size, but later may be adjusted so that the upper bits aren't
5027 what we want. So reject it. */
5028 if (elt != 0
5029 && paradoxical_subreg_p (elt->exp)
5030 /* It is okay, though, if the rtx we're trying to match
5031 will ignore any of the bits we can't predict. */
5032 && ! (src != 0
5033 && GET_CODE (src) == SUBREG
5034 && GET_MODE (src) == GET_MODE (elt->exp)
5035 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5036 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5038 elt = elt->next_same_value;
5039 continue;
5042 if (elt)
5044 src_elt_cost = elt->cost;
5045 src_elt_regcost = elt->regcost;
5048 /* Find cheapest and skip it for the next time. For items
5049 of equal cost, use this order:
5050 src_folded, src, src_eqv, src_related and hash table entry. */
5051 if (src_folded
5052 && preferable (src_folded_cost, src_folded_regcost,
5053 src_cost, src_regcost) <= 0
5054 && preferable (src_folded_cost, src_folded_regcost,
5055 src_eqv_cost, src_eqv_regcost) <= 0
5056 && preferable (src_folded_cost, src_folded_regcost,
5057 src_related_cost, src_related_regcost) <= 0
5058 && preferable (src_folded_cost, src_folded_regcost,
5059 src_elt_cost, src_elt_regcost) <= 0)
5061 trial = src_folded, src_folded_cost = MAX_COST;
5062 if (src_folded_force_flag)
5064 rtx forced = force_const_mem (mode, trial);
5065 if (forced)
5066 trial = forced;
5069 else if (src
5070 && preferable (src_cost, src_regcost,
5071 src_eqv_cost, src_eqv_regcost) <= 0
5072 && preferable (src_cost, src_regcost,
5073 src_related_cost, src_related_regcost) <= 0
5074 && preferable (src_cost, src_regcost,
5075 src_elt_cost, src_elt_regcost) <= 0)
5076 trial = src, src_cost = MAX_COST;
5077 else if (src_eqv_here
5078 && preferable (src_eqv_cost, src_eqv_regcost,
5079 src_related_cost, src_related_regcost) <= 0
5080 && preferable (src_eqv_cost, src_eqv_regcost,
5081 src_elt_cost, src_elt_regcost) <= 0)
5082 trial = src_eqv_here, src_eqv_cost = MAX_COST;
5083 else if (src_related
5084 && preferable (src_related_cost, src_related_regcost,
5085 src_elt_cost, src_elt_regcost) <= 0)
5086 trial = src_related, src_related_cost = MAX_COST;
5087 else
5089 trial = elt->exp;
5090 elt = elt->next_same_value;
5091 src_elt_cost = MAX_COST;
5094 /* Avoid creation of overlapping memory moves. */
5095 if (MEM_P (trial) && MEM_P (SET_DEST (sets[i].rtl)))
5097 rtx src, dest;
5099 /* BLKmode moves are not handled by cse anyway. */
5100 if (GET_MODE (trial) == BLKmode)
5101 break;
5103 src = canon_rtx (trial);
5104 dest = canon_rtx (SET_DEST (sets[i].rtl));
5106 if (!MEM_P (src) || !MEM_P (dest)
5107 || !nonoverlapping_memrefs_p (src, dest, false))
5108 break;
5111 /* Try to optimize
5112 (set (reg:M N) (const_int A))
5113 (set (reg:M2 O) (const_int B))
5114 (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5115 (reg:M2 O)). */
5116 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5117 && CONST_INT_P (trial)
5118 && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1))
5119 && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2))
5120 && REG_P (XEXP (SET_DEST (sets[i].rtl), 0))
5121 && (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl)))
5122 >= INTVAL (XEXP (SET_DEST (sets[i].rtl), 1)))
5123 && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))
5124 + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2))
5125 <= HOST_BITS_PER_WIDE_INT))
5127 rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0);
5128 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5129 rtx pos = XEXP (SET_DEST (sets[i].rtl), 2);
5130 unsigned int dest_hash = HASH (dest_reg, GET_MODE (dest_reg));
5131 struct table_elt *dest_elt
5132 = lookup (dest_reg, dest_hash, GET_MODE (dest_reg));
5133 rtx dest_cst = NULL;
5135 if (dest_elt)
5136 for (p = dest_elt->first_same_value; p; p = p->next_same_value)
5137 if (p->is_const && CONST_INT_P (p->exp))
5139 dest_cst = p->exp;
5140 break;
5142 if (dest_cst)
5144 HOST_WIDE_INT val = INTVAL (dest_cst);
5145 HOST_WIDE_INT mask;
5146 unsigned int shift;
5147 if (BITS_BIG_ENDIAN)
5148 shift = GET_MODE_PRECISION (GET_MODE (dest_reg))
5149 - INTVAL (pos) - INTVAL (width);
5150 else
5151 shift = INTVAL (pos);
5152 if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
5153 mask = ~(HOST_WIDE_INT) 0;
5154 else
5155 mask = ((HOST_WIDE_INT) 1 << INTVAL (width)) - 1;
5156 val &= ~(mask << shift);
5157 val |= (INTVAL (trial) & mask) << shift;
5158 val = trunc_int_for_mode (val, GET_MODE (dest_reg));
5159 validate_unshare_change (insn, &SET_DEST (sets[i].rtl),
5160 dest_reg, 1);
5161 validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5162 GEN_INT (val), 1);
5163 if (apply_change_group ())
5165 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5166 if (note)
5168 remove_note (insn, note);
5169 df_notes_rescan (insn);
5171 src_eqv = NULL_RTX;
5172 src_eqv_elt = NULL;
5173 src_eqv_volatile = 0;
5174 src_eqv_in_memory = 0;
5175 src_eqv_hash = 0;
5176 repeat = true;
5177 break;
5182 /* We don't normally have an insn matching (set (pc) (pc)), so
5183 check for this separately here. We will delete such an
5184 insn below.
5186 For other cases such as a table jump or conditional jump
5187 where we know the ultimate target, go ahead and replace the
5188 operand. While that may not make a valid insn, we will
5189 reemit the jump below (and also insert any necessary
5190 barriers). */
5191 if (n_sets == 1 && dest == pc_rtx
5192 && (trial == pc_rtx
5193 || (GET_CODE (trial) == LABEL_REF
5194 && ! condjump_p (insn))))
5196 /* Don't substitute non-local labels, this confuses CFG. */
5197 if (GET_CODE (trial) == LABEL_REF
5198 && LABEL_REF_NONLOCAL_P (trial))
5199 continue;
5201 SET_SRC (sets[i].rtl) = trial;
5202 cse_jumps_altered = true;
5203 break;
5206 /* Reject certain invalid forms of CONST that we create. */
5207 else if (CONSTANT_P (trial)
5208 && GET_CODE (trial) == CONST
5209 /* Reject cases that will cause decode_rtx_const to
5210 die. On the alpha when simplifying a switch, we
5211 get (const (truncate (minus (label_ref)
5212 (label_ref)))). */
5213 && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
5214 /* Likewise on IA-64, except without the
5215 truncate. */
5216 || (GET_CODE (XEXP (trial, 0)) == MINUS
5217 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5218 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
5219 /* Do nothing for this case. */
5222 /* Look for a substitution that makes a valid insn. */
5223 else if (validate_unshare_change
5224 (insn, &SET_SRC (sets[i].rtl), trial, 0))
5226 rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn);
5228 /* The result of apply_change_group can be ignored; see
5229 canon_reg. */
5231 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
5232 apply_change_group ();
5234 break;
5237 /* If we previously found constant pool entries for
5238 constants and this is a constant, try making a
5239 pool entry. Put it in src_folded unless we already have done
5240 this since that is where it likely came from. */
5242 else if (constant_pool_entries_cost
5243 && CONSTANT_P (trial)
5244 && (src_folded == 0
5245 || (!MEM_P (src_folded)
5246 && ! src_folded_force_flag))
5247 && GET_MODE_CLASS (mode) != MODE_CC
5248 && mode != VOIDmode)
5250 src_folded_force_flag = 1;
5251 src_folded = trial;
5252 src_folded_cost = constant_pool_entries_cost;
5253 src_folded_regcost = constant_pool_entries_regcost;
5257 /* If we changed the insn too much, handle this set from scratch. */
5258 if (repeat)
5260 i--;
5261 continue;
5264 src = SET_SRC (sets[i].rtl);
5266 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5267 However, there is an important exception: If both are registers
5268 that are not the head of their equivalence class, replace SET_SRC
5269 with the head of the class. If we do not do this, we will have
5270 both registers live over a portion of the basic block. This way,
5271 their lifetimes will likely abut instead of overlapping. */
5272 if (REG_P (dest)
5273 && REGNO_QTY_VALID_P (REGNO (dest)))
5275 int dest_q = REG_QTY (REGNO (dest));
5276 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5278 if (dest_ent->mode == GET_MODE (dest)
5279 && dest_ent->first_reg != REGNO (dest)
5280 && REG_P (src) && REGNO (src) == REGNO (dest)
5281 /* Don't do this if the original insn had a hard reg as
5282 SET_SRC or SET_DEST. */
5283 && (!REG_P (sets[i].src)
5284 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5285 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5286 /* We can't call canon_reg here because it won't do anything if
5287 SRC is a hard register. */
5289 int src_q = REG_QTY (REGNO (src));
5290 struct qty_table_elem *src_ent = &qty_table[src_q];
5291 int first = src_ent->first_reg;
5292 rtx new_src
5293 = (first >= FIRST_PSEUDO_REGISTER
5294 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5296 /* We must use validate-change even for this, because this
5297 might be a special no-op instruction, suitable only to
5298 tag notes onto. */
5299 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5301 src = new_src;
5302 /* If we had a constant that is cheaper than what we are now
5303 setting SRC to, use that constant. We ignored it when we
5304 thought we could make this into a no-op. */
5305 if (src_const && COST (src_const) < COST (src)
5306 && validate_change (insn, &SET_SRC (sets[i].rtl),
5307 src_const, 0))
5308 src = src_const;
5313 /* If we made a change, recompute SRC values. */
5314 if (src != sets[i].src)
5316 do_not_record = 0;
5317 hash_arg_in_memory = 0;
5318 sets[i].src = src;
5319 sets[i].src_hash = HASH (src, mode);
5320 sets[i].src_volatile = do_not_record;
5321 sets[i].src_in_memory = hash_arg_in_memory;
5322 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5325 /* If this is a single SET, we are setting a register, and we have an
5326 equivalent constant, we want to add a REG_EQUAL note if the constant
5327 is different from the source. We don't want to do it for a constant
5328 pseudo since verifying that this pseudo hasn't been eliminated is a
5329 pain; moreover such a note won't help anything.
5331 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5332 which can be created for a reference to a compile time computable
5333 entry in a jump table. */
5334 if (n_sets == 1
5335 && REG_P (dest)
5336 && src_const
5337 && !REG_P (src_const)
5338 && !(GET_CODE (src_const) == SUBREG
5339 && REG_P (SUBREG_REG (src_const)))
5340 && !(GET_CODE (src_const) == CONST
5341 && GET_CODE (XEXP (src_const, 0)) == MINUS
5342 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5343 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF)
5344 && !rtx_equal_p (src, src_const))
5346 /* Make sure that the rtx is not shared. */
5347 src_const = copy_rtx (src_const);
5349 /* Record the actual constant value in a REG_EQUAL note,
5350 making a new one if one does not already exist. */
5351 set_unique_reg_note (insn, REG_EQUAL, src_const);
5352 df_notes_rescan (insn);
5355 /* Now deal with the destination. */
5356 do_not_record = 0;
5358 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5359 while (GET_CODE (dest) == SUBREG
5360 || GET_CODE (dest) == ZERO_EXTRACT
5361 || GET_CODE (dest) == STRICT_LOW_PART)
5362 dest = XEXP (dest, 0);
5364 sets[i].inner_dest = dest;
5366 if (MEM_P (dest))
5368 #ifdef PUSH_ROUNDING
5369 /* Stack pushes invalidate the stack pointer. */
5370 rtx addr = XEXP (dest, 0);
5371 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5372 && XEXP (addr, 0) == stack_pointer_rtx)
5373 invalidate (stack_pointer_rtx, VOIDmode);
5374 #endif
5375 dest = fold_rtx (dest, insn);
5378 /* Compute the hash code of the destination now,
5379 before the effects of this instruction are recorded,
5380 since the register values used in the address computation
5381 are those before this instruction. */
5382 sets[i].dest_hash = HASH (dest, mode);
5384 /* Don't enter a bit-field in the hash table
5385 because the value in it after the store
5386 may not equal what was stored, due to truncation. */
5388 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5390 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5392 if (src_const != 0 && CONST_INT_P (src_const)
5393 && CONST_INT_P (width)
5394 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5395 && ! (INTVAL (src_const)
5396 & (HOST_WIDE_INT_M1U << INTVAL (width))))
5397 /* Exception: if the value is constant,
5398 and it won't be truncated, record it. */
5400 else
5402 /* This is chosen so that the destination will be invalidated
5403 but no new value will be recorded.
5404 We must invalidate because sometimes constant
5405 values can be recorded for bitfields. */
5406 sets[i].src_elt = 0;
5407 sets[i].src_volatile = 1;
5408 src_eqv = 0;
5409 src_eqv_elt = 0;
5413 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5414 the insn. */
5415 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5417 /* One less use of the label this insn used to jump to. */
5418 delete_insn_and_edges (insn);
5419 cse_jumps_altered = true;
5420 /* No more processing for this set. */
5421 sets[i].rtl = 0;
5424 /* If this SET is now setting PC to a label, we know it used to
5425 be a conditional or computed branch. */
5426 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5427 && !LABEL_REF_NONLOCAL_P (src))
5429 /* We reemit the jump in as many cases as possible just in
5430 case the form of an unconditional jump is significantly
5431 different than a computed jump or conditional jump.
5433 If this insn has multiple sets, then reemitting the
5434 jump is nontrivial. So instead we just force rerecognition
5435 and hope for the best. */
5436 if (n_sets == 1)
5438 rtx_insn *new_rtx;
5439 rtx note;
5441 new_rtx = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5442 JUMP_LABEL (new_rtx) = XEXP (src, 0);
5443 LABEL_NUSES (XEXP (src, 0))++;
5445 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5446 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5447 if (note)
5449 XEXP (note, 1) = NULL_RTX;
5450 REG_NOTES (new_rtx) = note;
5453 delete_insn_and_edges (insn);
5454 insn = new_rtx;
5456 else
5457 INSN_CODE (insn) = -1;
5459 /* Do not bother deleting any unreachable code, let jump do it. */
5460 cse_jumps_altered = true;
5461 sets[i].rtl = 0;
5464 /* If destination is volatile, invalidate it and then do no further
5465 processing for this assignment. */
5467 else if (do_not_record)
5469 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5470 invalidate (dest, VOIDmode);
5471 else if (MEM_P (dest))
5472 invalidate (dest, VOIDmode);
5473 else if (GET_CODE (dest) == STRICT_LOW_PART
5474 || GET_CODE (dest) == ZERO_EXTRACT)
5475 invalidate (XEXP (dest, 0), GET_MODE (dest));
5476 sets[i].rtl = 0;
5479 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5480 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5482 #ifdef HAVE_cc0
5483 /* If setting CC0, record what it was set to, or a constant, if it
5484 is equivalent to a constant. If it is being set to a floating-point
5485 value, make a COMPARE with the appropriate constant of 0. If we
5486 don't do this, later code can interpret this as a test against
5487 const0_rtx, which can cause problems if we try to put it into an
5488 insn as a floating-point operand. */
5489 if (dest == cc0_rtx)
5491 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5492 this_insn_cc0_mode = mode;
5493 if (FLOAT_MODE_P (mode))
5494 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5495 CONST0_RTX (mode));
5497 #endif
5500 /* Now enter all non-volatile source expressions in the hash table
5501 if they are not already present.
5502 Record their equivalence classes in src_elt.
5503 This way we can insert the corresponding destinations into
5504 the same classes even if the actual sources are no longer in them
5505 (having been invalidated). */
5507 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5508 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5510 struct table_elt *elt;
5511 struct table_elt *classp = sets[0].src_elt;
5512 rtx dest = SET_DEST (sets[0].rtl);
5513 enum machine_mode eqvmode = GET_MODE (dest);
5515 if (GET_CODE (dest) == STRICT_LOW_PART)
5517 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5518 classp = 0;
5520 if (insert_regs (src_eqv, classp, 0))
5522 rehash_using_reg (src_eqv);
5523 src_eqv_hash = HASH (src_eqv, eqvmode);
5525 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5526 elt->in_memory = src_eqv_in_memory;
5527 src_eqv_elt = elt;
5529 /* Check to see if src_eqv_elt is the same as a set source which
5530 does not yet have an elt, and if so set the elt of the set source
5531 to src_eqv_elt. */
5532 for (i = 0; i < n_sets; i++)
5533 if (sets[i].rtl && sets[i].src_elt == 0
5534 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5535 sets[i].src_elt = src_eqv_elt;
5538 for (i = 0; i < n_sets; i++)
5539 if (sets[i].rtl && ! sets[i].src_volatile
5540 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5542 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5544 /* REG_EQUAL in setting a STRICT_LOW_PART
5545 gives an equivalent for the entire destination register,
5546 not just for the subreg being stored in now.
5547 This is a more interesting equivalence, so we arrange later
5548 to treat the entire reg as the destination. */
5549 sets[i].src_elt = src_eqv_elt;
5550 sets[i].src_hash = src_eqv_hash;
5552 else
5554 /* Insert source and constant equivalent into hash table, if not
5555 already present. */
5556 struct table_elt *classp = src_eqv_elt;
5557 rtx src = sets[i].src;
5558 rtx dest = SET_DEST (sets[i].rtl);
5559 enum machine_mode mode
5560 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5562 /* It's possible that we have a source value known to be
5563 constant but don't have a REG_EQUAL note on the insn.
5564 Lack of a note will mean src_eqv_elt will be NULL. This
5565 can happen where we've generated a SUBREG to access a
5566 CONST_INT that is already in a register in a wider mode.
5567 Ensure that the source expression is put in the proper
5568 constant class. */
5569 if (!classp)
5570 classp = sets[i].src_const_elt;
5572 if (sets[i].src_elt == 0)
5574 struct table_elt *elt;
5576 /* Note that these insert_regs calls cannot remove
5577 any of the src_elt's, because they would have failed to
5578 match if not still valid. */
5579 if (insert_regs (src, classp, 0))
5581 rehash_using_reg (src);
5582 sets[i].src_hash = HASH (src, mode);
5584 elt = insert (src, classp, sets[i].src_hash, mode);
5585 elt->in_memory = sets[i].src_in_memory;
5586 sets[i].src_elt = classp = elt;
5588 if (sets[i].src_const && sets[i].src_const_elt == 0
5589 && src != sets[i].src_const
5590 && ! rtx_equal_p (sets[i].src_const, src))
5591 sets[i].src_elt = insert (sets[i].src_const, classp,
5592 sets[i].src_const_hash, mode);
5595 else if (sets[i].src_elt == 0)
5596 /* If we did not insert the source into the hash table (e.g., it was
5597 volatile), note the equivalence class for the REG_EQUAL value, if any,
5598 so that the destination goes into that class. */
5599 sets[i].src_elt = src_eqv_elt;
5601 /* Record destination addresses in the hash table. This allows us to
5602 check if they are invalidated by other sets. */
5603 for (i = 0; i < n_sets; i++)
5605 if (sets[i].rtl)
5607 rtx x = sets[i].inner_dest;
5608 struct table_elt *elt;
5609 enum machine_mode mode;
5610 unsigned hash;
5612 if (MEM_P (x))
5614 x = XEXP (x, 0);
5615 mode = GET_MODE (x);
5616 hash = HASH (x, mode);
5617 elt = lookup (x, hash, mode);
5618 if (!elt)
5620 if (insert_regs (x, NULL, 0))
5622 rtx dest = SET_DEST (sets[i].rtl);
5624 rehash_using_reg (x);
5625 hash = HASH (x, mode);
5626 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5628 elt = insert (x, NULL, hash, mode);
5631 sets[i].dest_addr_elt = elt;
5633 else
5634 sets[i].dest_addr_elt = NULL;
5638 invalidate_from_clobbers (insn);
5640 /* Some registers are invalidated by subroutine calls. Memory is
5641 invalidated by non-constant calls. */
5643 if (CALL_P (insn))
5645 if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
5646 invalidate_memory ();
5647 invalidate_for_call ();
5650 /* Now invalidate everything set by this instruction.
5651 If a SUBREG or other funny destination is being set,
5652 sets[i].rtl is still nonzero, so here we invalidate the reg
5653 a part of which is being set. */
5655 for (i = 0; i < n_sets; i++)
5656 if (sets[i].rtl)
5658 /* We can't use the inner dest, because the mode associated with
5659 a ZERO_EXTRACT is significant. */
5660 rtx dest = SET_DEST (sets[i].rtl);
5662 /* Needed for registers to remove the register from its
5663 previous quantity's chain.
5664 Needed for memory if this is a nonvarying address, unless
5665 we have just done an invalidate_memory that covers even those. */
5666 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5667 invalidate (dest, VOIDmode);
5668 else if (MEM_P (dest))
5669 invalidate (dest, VOIDmode);
5670 else if (GET_CODE (dest) == STRICT_LOW_PART
5671 || GET_CODE (dest) == ZERO_EXTRACT)
5672 invalidate (XEXP (dest, 0), GET_MODE (dest));
5675 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5676 the regs restored by the longjmp come from a later time
5677 than the setjmp. */
5678 if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5680 flush_hash_table ();
5681 goto done;
5684 /* Make sure registers mentioned in destinations
5685 are safe for use in an expression to be inserted.
5686 This removes from the hash table
5687 any invalid entry that refers to one of these registers.
5689 We don't care about the return value from mention_regs because
5690 we are going to hash the SET_DEST values unconditionally. */
5692 for (i = 0; i < n_sets; i++)
5694 if (sets[i].rtl)
5696 rtx x = SET_DEST (sets[i].rtl);
5698 if (!REG_P (x))
5699 mention_regs (x);
5700 else
5702 /* We used to rely on all references to a register becoming
5703 inaccessible when a register changes to a new quantity,
5704 since that changes the hash code. However, that is not
5705 safe, since after HASH_SIZE new quantities we get a
5706 hash 'collision' of a register with its own invalid
5707 entries. And since SUBREGs have been changed not to
5708 change their hash code with the hash code of the register,
5709 it wouldn't work any longer at all. So we have to check
5710 for any invalid references lying around now.
5711 This code is similar to the REG case in mention_regs,
5712 but it knows that reg_tick has been incremented, and
5713 it leaves reg_in_table as -1 . */
5714 unsigned int regno = REGNO (x);
5715 unsigned int endregno = END_REGNO (x);
5716 unsigned int i;
5718 for (i = regno; i < endregno; i++)
5720 if (REG_IN_TABLE (i) >= 0)
5722 remove_invalid_refs (i);
5723 REG_IN_TABLE (i) = -1;
5730 /* We may have just removed some of the src_elt's from the hash table.
5731 So replace each one with the current head of the same class.
5732 Also check if destination addresses have been removed. */
5734 for (i = 0; i < n_sets; i++)
5735 if (sets[i].rtl)
5737 if (sets[i].dest_addr_elt
5738 && sets[i].dest_addr_elt->first_same_value == 0)
5740 /* The elt was removed, which means this destination is not
5741 valid after this instruction. */
5742 sets[i].rtl = NULL_RTX;
5744 else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5745 /* If elt was removed, find current head of same class,
5746 or 0 if nothing remains of that class. */
5748 struct table_elt *elt = sets[i].src_elt;
5750 while (elt && elt->prev_same_value)
5751 elt = elt->prev_same_value;
5753 while (elt && elt->first_same_value == 0)
5754 elt = elt->next_same_value;
5755 sets[i].src_elt = elt ? elt->first_same_value : 0;
5759 /* Now insert the destinations into their equivalence classes. */
5761 for (i = 0; i < n_sets; i++)
5762 if (sets[i].rtl)
5764 rtx dest = SET_DEST (sets[i].rtl);
5765 struct table_elt *elt;
5767 /* Don't record value if we are not supposed to risk allocating
5768 floating-point values in registers that might be wider than
5769 memory. */
5770 if ((flag_float_store
5771 && MEM_P (dest)
5772 && FLOAT_MODE_P (GET_MODE (dest)))
5773 /* Don't record BLKmode values, because we don't know the
5774 size of it, and can't be sure that other BLKmode values
5775 have the same or smaller size. */
5776 || GET_MODE (dest) == BLKmode
5777 /* If we didn't put a REG_EQUAL value or a source into the hash
5778 table, there is no point is recording DEST. */
5779 || sets[i].src_elt == 0
5780 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5781 or SIGN_EXTEND, don't record DEST since it can cause
5782 some tracking to be wrong.
5784 ??? Think about this more later. */
5785 || (paradoxical_subreg_p (dest)
5786 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5787 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5788 continue;
5790 /* STRICT_LOW_PART isn't part of the value BEING set,
5791 and neither is the SUBREG inside it.
5792 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5793 if (GET_CODE (dest) == STRICT_LOW_PART)
5794 dest = SUBREG_REG (XEXP (dest, 0));
5796 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5797 /* Registers must also be inserted into chains for quantities. */
5798 if (insert_regs (dest, sets[i].src_elt, 1))
5800 /* If `insert_regs' changes something, the hash code must be
5801 recalculated. */
5802 rehash_using_reg (dest);
5803 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5806 elt = insert (dest, sets[i].src_elt,
5807 sets[i].dest_hash, GET_MODE (dest));
5809 /* If this is a constant, insert the constant anchors with the
5810 equivalent register-offset expressions using register DEST. */
5811 if (targetm.const_anchor
5812 && REG_P (dest)
5813 && SCALAR_INT_MODE_P (GET_MODE (dest))
5814 && GET_CODE (sets[i].src_elt->exp) == CONST_INT)
5815 insert_const_anchors (dest, sets[i].src_elt->exp, GET_MODE (dest));
5817 elt->in_memory = (MEM_P (sets[i].inner_dest)
5818 && !MEM_READONLY_P (sets[i].inner_dest));
5820 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5821 narrower than M2, and both M1 and M2 are the same number of words,
5822 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5823 make that equivalence as well.
5825 However, BAR may have equivalences for which gen_lowpart
5826 will produce a simpler value than gen_lowpart applied to
5827 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5828 BAR's equivalences. If we don't get a simplified form, make
5829 the SUBREG. It will not be used in an equivalence, but will
5830 cause two similar assignments to be detected.
5832 Note the loop below will find SUBREG_REG (DEST) since we have
5833 already entered SRC and DEST of the SET in the table. */
5835 if (GET_CODE (dest) == SUBREG
5836 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5837 / UNITS_PER_WORD)
5838 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
5839 && (GET_MODE_SIZE (GET_MODE (dest))
5840 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5841 && sets[i].src_elt != 0)
5843 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5844 struct table_elt *elt, *classp = 0;
5846 for (elt = sets[i].src_elt->first_same_value; elt;
5847 elt = elt->next_same_value)
5849 rtx new_src = 0;
5850 unsigned src_hash;
5851 struct table_elt *src_elt;
5852 int byte = 0;
5854 /* Ignore invalid entries. */
5855 if (!REG_P (elt->exp)
5856 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5857 continue;
5859 /* We may have already been playing subreg games. If the
5860 mode is already correct for the destination, use it. */
5861 if (GET_MODE (elt->exp) == new_mode)
5862 new_src = elt->exp;
5863 else
5865 /* Calculate big endian correction for the SUBREG_BYTE.
5866 We have already checked that M1 (GET_MODE (dest))
5867 is not narrower than M2 (new_mode). */
5868 if (BYTES_BIG_ENDIAN)
5869 byte = (GET_MODE_SIZE (GET_MODE (dest))
5870 - GET_MODE_SIZE (new_mode));
5872 new_src = simplify_gen_subreg (new_mode, elt->exp,
5873 GET_MODE (dest), byte);
5876 /* The call to simplify_gen_subreg fails if the value
5877 is VOIDmode, yet we can't do any simplification, e.g.
5878 for EXPR_LISTs denoting function call results.
5879 It is invalid to construct a SUBREG with a VOIDmode
5880 SUBREG_REG, hence a zero new_src means we can't do
5881 this substitution. */
5882 if (! new_src)
5883 continue;
5885 src_hash = HASH (new_src, new_mode);
5886 src_elt = lookup (new_src, src_hash, new_mode);
5888 /* Put the new source in the hash table is if isn't
5889 already. */
5890 if (src_elt == 0)
5892 if (insert_regs (new_src, classp, 0))
5894 rehash_using_reg (new_src);
5895 src_hash = HASH (new_src, new_mode);
5897 src_elt = insert (new_src, classp, src_hash, new_mode);
5898 src_elt->in_memory = elt->in_memory;
5900 else if (classp && classp != src_elt->first_same_value)
5901 /* Show that two things that we've seen before are
5902 actually the same. */
5903 merge_equiv_classes (src_elt, classp);
5905 classp = src_elt->first_same_value;
5906 /* Ignore invalid entries. */
5907 while (classp
5908 && !REG_P (classp->exp)
5909 && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
5910 classp = classp->next_same_value;
5915 /* Special handling for (set REG0 REG1) where REG0 is the
5916 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5917 be used in the sequel, so (if easily done) change this insn to
5918 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5919 that computed their value. Then REG1 will become a dead store
5920 and won't cloud the situation for later optimizations.
5922 Do not make this change if REG1 is a hard register, because it will
5923 then be used in the sequel and we may be changing a two-operand insn
5924 into a three-operand insn.
5926 Also do not do this if we are operating on a copy of INSN. */
5928 if (n_sets == 1 && sets[0].rtl)
5929 try_back_substitute_reg (sets[0].rtl, insn);
5931 done:;
5934 /* Remove from the hash table all expressions that reference memory. */
5936 static void
5937 invalidate_memory (void)
5939 int i;
5940 struct table_elt *p, *next;
5942 for (i = 0; i < HASH_SIZE; i++)
5943 for (p = table[i]; p; p = next)
5945 next = p->next_same_hash;
5946 if (p->in_memory)
5947 remove_from_table (p, i);
5951 /* Perform invalidation on the basis of everything about INSN,
5952 except for invalidating the actual places that are SET in it.
5953 This includes the places CLOBBERed, and anything that might
5954 alias with something that is SET or CLOBBERed. */
5956 static void
5957 invalidate_from_clobbers (rtx_insn *insn)
5959 rtx x = PATTERN (insn);
5961 if (GET_CODE (x) == CLOBBER)
5963 rtx ref = XEXP (x, 0);
5964 if (ref)
5966 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5967 || MEM_P (ref))
5968 invalidate (ref, VOIDmode);
5969 else if (GET_CODE (ref) == STRICT_LOW_PART
5970 || GET_CODE (ref) == ZERO_EXTRACT)
5971 invalidate (XEXP (ref, 0), GET_MODE (ref));
5974 else if (GET_CODE (x) == PARALLEL)
5976 int i;
5977 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
5979 rtx y = XVECEXP (x, 0, i);
5980 if (GET_CODE (y) == CLOBBER)
5982 rtx ref = XEXP (y, 0);
5983 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5984 || MEM_P (ref))
5985 invalidate (ref, VOIDmode);
5986 else if (GET_CODE (ref) == STRICT_LOW_PART
5987 || GET_CODE (ref) == ZERO_EXTRACT)
5988 invalidate (XEXP (ref, 0), GET_MODE (ref));
5994 /* Perform invalidation on the basis of everything about INSN.
5995 This includes the places CLOBBERed, and anything that might
5996 alias with something that is SET or CLOBBERed. */
5998 static void
5999 invalidate_from_sets_and_clobbers (rtx_insn *insn)
6001 rtx tem;
6002 rtx x = PATTERN (insn);
6004 if (CALL_P (insn))
6006 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6007 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6008 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6011 /* Ensure we invalidate the destination register of a CALL insn.
6012 This is necessary for machines where this register is a fixed_reg,
6013 because no other code would invalidate it. */
6014 if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
6015 invalidate (SET_DEST (x), VOIDmode);
6017 else if (GET_CODE (x) == PARALLEL)
6019 int i;
6021 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6023 rtx y = XVECEXP (x, 0, i);
6024 if (GET_CODE (y) == CLOBBER)
6026 rtx clobbered = XEXP (y, 0);
6028 if (REG_P (clobbered)
6029 || GET_CODE (clobbered) == SUBREG)
6030 invalidate (clobbered, VOIDmode);
6031 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6032 || GET_CODE (clobbered) == ZERO_EXTRACT)
6033 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6035 else if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
6036 invalidate (SET_DEST (y), VOIDmode);
6041 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6042 and replace any registers in them with either an equivalent constant
6043 or the canonical form of the register. If we are inside an address,
6044 only do this if the address remains valid.
6046 OBJECT is 0 except when within a MEM in which case it is the MEM.
6048 Return the replacement for X. */
6050 static rtx
6051 cse_process_notes_1 (rtx x, rtx object, bool *changed)
6053 enum rtx_code code = GET_CODE (x);
6054 const char *fmt = GET_RTX_FORMAT (code);
6055 int i;
6057 switch (code)
6059 case CONST:
6060 case SYMBOL_REF:
6061 case LABEL_REF:
6062 CASE_CONST_ANY:
6063 case PC:
6064 case CC0:
6065 case LO_SUM:
6066 return x;
6068 case MEM:
6069 validate_change (x, &XEXP (x, 0),
6070 cse_process_notes (XEXP (x, 0), x, changed), 0);
6071 return x;
6073 case EXPR_LIST:
6074 if (REG_NOTE_KIND (x) == REG_EQUAL)
6075 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX, changed);
6076 /* Fall through. */
6078 case INSN_LIST:
6079 case INT_LIST:
6080 if (XEXP (x, 1))
6081 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX, changed);
6082 return x;
6084 case SIGN_EXTEND:
6085 case ZERO_EXTEND:
6086 case SUBREG:
6088 rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed);
6089 /* We don't substitute VOIDmode constants into these rtx,
6090 since they would impede folding. */
6091 if (GET_MODE (new_rtx) != VOIDmode)
6092 validate_change (object, &XEXP (x, 0), new_rtx, 0);
6093 return x;
6096 case UNSIGNED_FLOAT:
6098 rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed);
6099 /* We don't substitute negative VOIDmode constants into these rtx,
6100 since they would impede folding. */
6101 if (GET_MODE (new_rtx) != VOIDmode
6102 || (CONST_INT_P (new_rtx) && INTVAL (new_rtx) >= 0)
6103 || (CONST_DOUBLE_P (new_rtx) && CONST_DOUBLE_HIGH (new_rtx) >= 0))
6104 validate_change (object, &XEXP (x, 0), new_rtx, 0);
6105 return x;
6108 case REG:
6109 i = REG_QTY (REGNO (x));
6111 /* Return a constant or a constant register. */
6112 if (REGNO_QTY_VALID_P (REGNO (x)))
6114 struct qty_table_elem *ent = &qty_table[i];
6116 if (ent->const_rtx != NULL_RTX
6117 && (CONSTANT_P (ent->const_rtx)
6118 || REG_P (ent->const_rtx)))
6120 rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx);
6121 if (new_rtx)
6122 return copy_rtx (new_rtx);
6126 /* Otherwise, canonicalize this register. */
6127 return canon_reg (x, NULL);
6129 default:
6130 break;
6133 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6134 if (fmt[i] == 'e')
6135 validate_change (object, &XEXP (x, i),
6136 cse_process_notes (XEXP (x, i), object, changed), 0);
6138 return x;
6141 static rtx
6142 cse_process_notes (rtx x, rtx object, bool *changed)
6144 rtx new_rtx = cse_process_notes_1 (x, object, changed);
6145 if (new_rtx != x)
6146 *changed = true;
6147 return new_rtx;
6151 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6153 DATA is a pointer to a struct cse_basic_block_data, that is used to
6154 describe the path.
6155 It is filled with a queue of basic blocks, starting with FIRST_BB
6156 and following a trace through the CFG.
6158 If all paths starting at FIRST_BB have been followed, or no new path
6159 starting at FIRST_BB can be constructed, this function returns FALSE.
6160 Otherwise, DATA->path is filled and the function returns TRUE indicating
6161 that a path to follow was found.
6163 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6164 block in the path will be FIRST_BB. */
6166 static bool
6167 cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
6168 int follow_jumps)
6170 basic_block bb;
6171 edge e;
6172 int path_size;
6174 bitmap_set_bit (cse_visited_basic_blocks, first_bb->index);
6176 /* See if there is a previous path. */
6177 path_size = data->path_size;
6179 /* There is a previous path. Make sure it started with FIRST_BB. */
6180 if (path_size)
6181 gcc_assert (data->path[0].bb == first_bb);
6183 /* There was only one basic block in the last path. Clear the path and
6184 return, so that paths starting at another basic block can be tried. */
6185 if (path_size == 1)
6187 path_size = 0;
6188 goto done;
6191 /* If the path was empty from the beginning, construct a new path. */
6192 if (path_size == 0)
6193 data->path[path_size++].bb = first_bb;
6194 else
6196 /* Otherwise, path_size must be equal to or greater than 2, because
6197 a previous path exists that is at least two basic blocks long.
6199 Update the previous branch path, if any. If the last branch was
6200 previously along the branch edge, take the fallthrough edge now. */
6201 while (path_size >= 2)
6203 basic_block last_bb_in_path, previous_bb_in_path;
6204 edge e;
6206 --path_size;
6207 last_bb_in_path = data->path[path_size].bb;
6208 previous_bb_in_path = data->path[path_size - 1].bb;
6210 /* If we previously followed a path along the branch edge, try
6211 the fallthru edge now. */
6212 if (EDGE_COUNT (previous_bb_in_path->succs) == 2
6213 && any_condjump_p (BB_END (previous_bb_in_path))
6214 && (e = find_edge (previous_bb_in_path, last_bb_in_path))
6215 && e == BRANCH_EDGE (previous_bb_in_path))
6217 bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
6218 if (bb != EXIT_BLOCK_PTR_FOR_FN (cfun)
6219 && single_pred_p (bb)
6220 /* We used to assert here that we would only see blocks
6221 that we have not visited yet. But we may end up
6222 visiting basic blocks twice if the CFG has changed
6223 in this run of cse_main, because when the CFG changes
6224 the topological sort of the CFG also changes. A basic
6225 blocks that previously had more than two predecessors
6226 may now have a single predecessor, and become part of
6227 a path that starts at another basic block.
6229 We still want to visit each basic block only once, so
6230 halt the path here if we have already visited BB. */
6231 && !bitmap_bit_p (cse_visited_basic_blocks, bb->index))
6233 bitmap_set_bit (cse_visited_basic_blocks, bb->index);
6234 data->path[path_size++].bb = bb;
6235 break;
6239 data->path[path_size].bb = NULL;
6242 /* If only one block remains in the path, bail. */
6243 if (path_size == 1)
6245 path_size = 0;
6246 goto done;
6250 /* Extend the path if possible. */
6251 if (follow_jumps)
6253 bb = data->path[path_size - 1].bb;
6254 while (bb && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH))
6256 if (single_succ_p (bb))
6257 e = single_succ_edge (bb);
6258 else if (EDGE_COUNT (bb->succs) == 2
6259 && any_condjump_p (BB_END (bb)))
6261 /* First try to follow the branch. If that doesn't lead
6262 to a useful path, follow the fallthru edge. */
6263 e = BRANCH_EDGE (bb);
6264 if (!single_pred_p (e->dest))
6265 e = FALLTHRU_EDGE (bb);
6267 else
6268 e = NULL;
6270 if (e
6271 && !((e->flags & EDGE_ABNORMAL_CALL) && cfun->has_nonlocal_label)
6272 && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)
6273 && single_pred_p (e->dest)
6274 /* Avoid visiting basic blocks twice. The large comment
6275 above explains why this can happen. */
6276 && !bitmap_bit_p (cse_visited_basic_blocks, e->dest->index))
6278 basic_block bb2 = e->dest;
6279 bitmap_set_bit (cse_visited_basic_blocks, bb2->index);
6280 data->path[path_size++].bb = bb2;
6281 bb = bb2;
6283 else
6284 bb = NULL;
6288 done:
6289 data->path_size = path_size;
6290 return path_size != 0;
6293 /* Dump the path in DATA to file F. NSETS is the number of sets
6294 in the path. */
6296 static void
6297 cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
6299 int path_entry;
6301 fprintf (f, ";; Following path with %d sets: ", nsets);
6302 for (path_entry = 0; path_entry < data->path_size; path_entry++)
6303 fprintf (f, "%d ", (data->path[path_entry].bb)->index);
6304 fputc ('\n', dump_file);
6305 fflush (f);
6309 /* Return true if BB has exception handling successor edges. */
6311 static bool
6312 have_eh_succ_edges (basic_block bb)
6314 edge e;
6315 edge_iterator ei;
6317 FOR_EACH_EDGE (e, ei, bb->succs)
6318 if (e->flags & EDGE_EH)
6319 return true;
6321 return false;
6325 /* Scan to the end of the path described by DATA. Return an estimate of
6326 the total number of SETs of all insns in the path. */
6328 static void
6329 cse_prescan_path (struct cse_basic_block_data *data)
6331 int nsets = 0;
6332 int path_size = data->path_size;
6333 int path_entry;
6335 /* Scan to end of each basic block in the path. */
6336 for (path_entry = 0; path_entry < path_size; path_entry++)
6338 basic_block bb;
6339 rtx_insn *insn;
6341 bb = data->path[path_entry].bb;
6343 FOR_BB_INSNS (bb, insn)
6345 if (!INSN_P (insn))
6346 continue;
6348 /* A PARALLEL can have lots of SETs in it,
6349 especially if it is really an ASM_OPERANDS. */
6350 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6351 nsets += XVECLEN (PATTERN (insn), 0);
6352 else
6353 nsets += 1;
6357 data->nsets = nsets;
6360 /* Return true if the pattern of INSN uses a LABEL_REF for which
6361 there isn't a REG_LABEL_OPERAND note. */
6363 static bool
6364 check_for_label_ref (rtx_insn *insn)
6366 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6367 note for it, we must rerun jump since it needs to place the note. If
6368 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6369 don't do this since no REG_LABEL_OPERAND will be added. */
6370 subrtx_iterator::array_type array;
6371 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
6373 const_rtx x = *iter;
6374 if (GET_CODE (x) == LABEL_REF
6375 && !LABEL_REF_NONLOCAL_P (x)
6376 && (!JUMP_P (insn)
6377 || !label_is_jump_target_p (LABEL_REF_LABEL (x), insn))
6378 && LABEL_P (LABEL_REF_LABEL (x))
6379 && INSN_UID (LABEL_REF_LABEL (x)) != 0
6380 && !find_reg_note (insn, REG_LABEL_OPERAND, LABEL_REF_LABEL (x)))
6381 return true;
6383 return false;
6386 /* Process a single extended basic block described by EBB_DATA. */
6388 static void
6389 cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
6391 int path_size = ebb_data->path_size;
6392 int path_entry;
6393 int num_insns = 0;
6395 /* Allocate the space needed by qty_table. */
6396 qty_table = XNEWVEC (struct qty_table_elem, max_qty);
6398 new_basic_block ();
6399 cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
6400 cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
6401 for (path_entry = 0; path_entry < path_size; path_entry++)
6403 basic_block bb;
6404 rtx_insn *insn;
6406 bb = ebb_data->path[path_entry].bb;
6408 /* Invalidate recorded information for eh regs if there is an EH
6409 edge pointing to that bb. */
6410 if (bb_has_eh_pred (bb))
6412 df_ref def;
6414 FOR_EACH_ARTIFICIAL_DEF (def, bb->index)
6415 if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
6416 invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def)));
6419 optimize_this_for_speed_p = optimize_bb_for_speed_p (bb);
6420 FOR_BB_INSNS (bb, insn)
6422 /* If we have processed 1,000 insns, flush the hash table to
6423 avoid extreme quadratic behavior. We must not include NOTEs
6424 in the count since there may be more of them when generating
6425 debugging information. If we clear the table at different
6426 times, code generated with -g -O might be different than code
6427 generated with -O but not -g.
6429 FIXME: This is a real kludge and needs to be done some other
6430 way. */
6431 if (NONDEBUG_INSN_P (insn)
6432 && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS))
6434 flush_hash_table ();
6435 num_insns = 0;
6438 if (INSN_P (insn))
6440 /* Process notes first so we have all notes in canonical forms
6441 when looking for duplicate operations. */
6442 if (REG_NOTES (insn))
6444 bool changed = false;
6445 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn),
6446 NULL_RTX, &changed);
6447 if (changed)
6448 df_notes_rescan (insn);
6451 cse_insn (insn);
6453 /* If we haven't already found an insn where we added a LABEL_REF,
6454 check this one. */
6455 if (INSN_P (insn) && !recorded_label_ref
6456 && check_for_label_ref (insn))
6457 recorded_label_ref = true;
6459 #ifdef HAVE_cc0
6460 if (NONDEBUG_INSN_P (insn))
6462 /* If the previous insn sets CC0 and this insn no
6463 longer references CC0, delete the previous insn.
6464 Here we use fact that nothing expects CC0 to be
6465 valid over an insn, which is true until the final
6466 pass. */
6467 rtx_insn *prev_insn;
6468 rtx tem;
6470 prev_insn = prev_nonnote_nondebug_insn (insn);
6471 if (prev_insn && NONJUMP_INSN_P (prev_insn)
6472 && (tem = single_set (prev_insn)) != NULL_RTX
6473 && SET_DEST (tem) == cc0_rtx
6474 && ! reg_mentioned_p (cc0_rtx, PATTERN (insn)))
6475 delete_insn (prev_insn);
6477 /* If this insn is not the last insn in the basic
6478 block, it will be PREV_INSN(insn) in the next
6479 iteration. If we recorded any CC0-related
6480 information for this insn, remember it. */
6481 if (insn != BB_END (bb))
6483 prev_insn_cc0 = this_insn_cc0;
6484 prev_insn_cc0_mode = this_insn_cc0_mode;
6487 #endif
6491 /* With non-call exceptions, we are not always able to update
6492 the CFG properly inside cse_insn. So clean up possibly
6493 redundant EH edges here. */
6494 if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb))
6495 cse_cfg_altered |= purge_dead_edges (bb);
6497 /* If we changed a conditional jump, we may have terminated
6498 the path we are following. Check that by verifying that
6499 the edge we would take still exists. If the edge does
6500 not exist anymore, purge the remainder of the path.
6501 Note that this will cause us to return to the caller. */
6502 if (path_entry < path_size - 1)
6504 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6505 if (!find_edge (bb, next_bb))
6509 path_size--;
6511 /* If we truncate the path, we must also reset the
6512 visited bit on the remaining blocks in the path,
6513 or we will never visit them at all. */
6514 bitmap_clear_bit (cse_visited_basic_blocks,
6515 ebb_data->path[path_size].bb->index);
6516 ebb_data->path[path_size].bb = NULL;
6518 while (path_size - 1 != path_entry);
6519 ebb_data->path_size = path_size;
6523 /* If this is a conditional jump insn, record any known
6524 equivalences due to the condition being tested. */
6525 insn = BB_END (bb);
6526 if (path_entry < path_size - 1
6527 && JUMP_P (insn)
6528 && single_set (insn)
6529 && any_condjump_p (insn))
6531 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6532 bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6533 record_jump_equiv (insn, taken);
6536 #ifdef HAVE_cc0
6537 /* Clear the CC0-tracking related insns, they can't provide
6538 useful information across basic block boundaries. */
6539 prev_insn_cc0 = 0;
6540 #endif
6543 gcc_assert (next_qty <= max_qty);
6545 free (qty_table);
6549 /* Perform cse on the instructions of a function.
6550 F is the first instruction.
6551 NREGS is one plus the highest pseudo-reg number used in the instruction.
6553 Return 2 if jump optimizations should be redone due to simplifications
6554 in conditional jump instructions.
6555 Return 1 if the CFG should be cleaned up because it has been modified.
6556 Return 0 otherwise. */
6558 static int
6559 cse_main (rtx_insn *f ATTRIBUTE_UNUSED, int nregs)
6561 struct cse_basic_block_data ebb_data;
6562 basic_block bb;
6563 int *rc_order = XNEWVEC (int, last_basic_block_for_fn (cfun));
6564 int i, n_blocks;
6566 df_set_flags (DF_LR_RUN_DCE);
6567 df_note_add_problem ();
6568 df_analyze ();
6569 df_set_flags (DF_DEFER_INSN_RESCAN);
6571 reg_scan (get_insns (), max_reg_num ());
6572 init_cse_reg_info (nregs);
6574 ebb_data.path = XNEWVEC (struct branch_path,
6575 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6577 cse_cfg_altered = false;
6578 cse_jumps_altered = false;
6579 recorded_label_ref = false;
6580 constant_pool_entries_cost = 0;
6581 constant_pool_entries_regcost = 0;
6582 ebb_data.path_size = 0;
6583 ebb_data.nsets = 0;
6584 rtl_hooks = cse_rtl_hooks;
6586 init_recog ();
6587 init_alias_analysis ();
6589 reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6591 /* Set up the table of already visited basic blocks. */
6592 cse_visited_basic_blocks = sbitmap_alloc (last_basic_block_for_fn (cfun));
6593 bitmap_clear (cse_visited_basic_blocks);
6595 /* Loop over basic blocks in reverse completion order (RPO),
6596 excluding the ENTRY and EXIT blocks. */
6597 n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6598 i = 0;
6599 while (i < n_blocks)
6601 /* Find the first block in the RPO queue that we have not yet
6602 processed before. */
6605 bb = BASIC_BLOCK_FOR_FN (cfun, rc_order[i++]);
6607 while (bitmap_bit_p (cse_visited_basic_blocks, bb->index)
6608 && i < n_blocks);
6610 /* Find all paths starting with BB, and process them. */
6611 while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6613 /* Pre-scan the path. */
6614 cse_prescan_path (&ebb_data);
6616 /* If this basic block has no sets, skip it. */
6617 if (ebb_data.nsets == 0)
6618 continue;
6620 /* Get a reasonable estimate for the maximum number of qty's
6621 needed for this path. For this, we take the number of sets
6622 and multiply that by MAX_RECOG_OPERANDS. */
6623 max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
6625 /* Dump the path we're about to process. */
6626 if (dump_file)
6627 cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
6629 cse_extended_basic_block (&ebb_data);
6633 /* Clean up. */
6634 end_alias_analysis ();
6635 free (reg_eqv_table);
6636 free (ebb_data.path);
6637 sbitmap_free (cse_visited_basic_blocks);
6638 free (rc_order);
6639 rtl_hooks = general_rtl_hooks;
6641 if (cse_jumps_altered || recorded_label_ref)
6642 return 2;
6643 else if (cse_cfg_altered)
6644 return 1;
6645 else
6646 return 0;
6649 /* Count the number of times registers are used (not set) in X.
6650 COUNTS is an array in which we accumulate the count, INCR is how much
6651 we count each register usage.
6653 Don't count a usage of DEST, which is the SET_DEST of a SET which
6654 contains X in its SET_SRC. This is because such a SET does not
6655 modify the liveness of DEST.
6656 DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6657 We must then count uses of a SET_DEST regardless, because the insn can't be
6658 deleted here. */
6660 static void
6661 count_reg_usage (rtx x, int *counts, rtx dest, int incr)
6663 enum rtx_code code;
6664 rtx note;
6665 const char *fmt;
6666 int i, j;
6668 if (x == 0)
6669 return;
6671 switch (code = GET_CODE (x))
6673 case REG:
6674 if (x != dest)
6675 counts[REGNO (x)] += incr;
6676 return;
6678 case PC:
6679 case CC0:
6680 case CONST:
6681 CASE_CONST_ANY:
6682 case SYMBOL_REF:
6683 case LABEL_REF:
6684 return;
6686 case CLOBBER:
6687 /* If we are clobbering a MEM, mark any registers inside the address
6688 as being used. */
6689 if (MEM_P (XEXP (x, 0)))
6690 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
6691 return;
6693 case SET:
6694 /* Unless we are setting a REG, count everything in SET_DEST. */
6695 if (!REG_P (SET_DEST (x)))
6696 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
6697 count_reg_usage (SET_SRC (x), counts,
6698 dest ? dest : SET_DEST (x),
6699 incr);
6700 return;
6702 case DEBUG_INSN:
6703 return;
6705 case CALL_INSN:
6706 case INSN:
6707 case JUMP_INSN:
6708 /* We expect dest to be NULL_RTX here. If the insn may throw,
6709 or if it cannot be deleted due to side-effects, mark this fact
6710 by setting DEST to pc_rtx. */
6711 if ((!cfun->can_delete_dead_exceptions && !insn_nothrow_p (x))
6712 || side_effects_p (PATTERN (x)))
6713 dest = pc_rtx;
6714 if (code == CALL_INSN)
6715 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
6716 count_reg_usage (PATTERN (x), counts, dest, incr);
6718 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6719 use them. */
6721 note = find_reg_equal_equiv_note (x);
6722 if (note)
6724 rtx eqv = XEXP (note, 0);
6726 if (GET_CODE (eqv) == EXPR_LIST)
6727 /* This REG_EQUAL note describes the result of a function call.
6728 Process all the arguments. */
6731 count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
6732 eqv = XEXP (eqv, 1);
6734 while (eqv && GET_CODE (eqv) == EXPR_LIST);
6735 else
6736 count_reg_usage (eqv, counts, dest, incr);
6738 return;
6740 case EXPR_LIST:
6741 if (REG_NOTE_KIND (x) == REG_EQUAL
6742 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
6743 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6744 involving registers in the address. */
6745 || GET_CODE (XEXP (x, 0)) == CLOBBER)
6746 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
6748 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
6749 return;
6751 case ASM_OPERANDS:
6752 /* Iterate over just the inputs, not the constraints as well. */
6753 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
6754 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
6755 return;
6757 case INSN_LIST:
6758 case INT_LIST:
6759 gcc_unreachable ();
6761 default:
6762 break;
6765 fmt = GET_RTX_FORMAT (code);
6766 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6768 if (fmt[i] == 'e')
6769 count_reg_usage (XEXP (x, i), counts, dest, incr);
6770 else if (fmt[i] == 'E')
6771 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6772 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
6776 /* Return true if X is a dead register. */
6778 static inline int
6779 is_dead_reg (const_rtx x, int *counts)
6781 return (REG_P (x)
6782 && REGNO (x) >= FIRST_PSEUDO_REGISTER
6783 && counts[REGNO (x)] == 0);
6786 /* Return true if set is live. */
6787 static bool
6788 set_live_p (rtx set, rtx_insn *insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
6789 int *counts)
6791 #ifdef HAVE_cc0
6792 rtx tem;
6793 #endif
6795 if (set_noop_p (set))
6798 #ifdef HAVE_cc0
6799 else if (GET_CODE (SET_DEST (set)) == CC0
6800 && !side_effects_p (SET_SRC (set))
6801 && ((tem = next_nonnote_nondebug_insn (insn)) == NULL_RTX
6802 || !INSN_P (tem)
6803 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
6804 return false;
6805 #endif
6806 else if (!is_dead_reg (SET_DEST (set), counts)
6807 || side_effects_p (SET_SRC (set)))
6808 return true;
6809 return false;
6812 /* Return true if insn is live. */
6814 static bool
6815 insn_live_p (rtx_insn *insn, int *counts)
6817 int i;
6818 if (!cfun->can_delete_dead_exceptions && !insn_nothrow_p (insn))
6819 return true;
6820 else if (GET_CODE (PATTERN (insn)) == SET)
6821 return set_live_p (PATTERN (insn), insn, counts);
6822 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
6824 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6826 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6828 if (GET_CODE (elt) == SET)
6830 if (set_live_p (elt, insn, counts))
6831 return true;
6833 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
6834 return true;
6836 return false;
6838 else if (DEBUG_INSN_P (insn))
6840 rtx_insn *next;
6842 for (next = NEXT_INSN (insn); next; next = NEXT_INSN (next))
6843 if (NOTE_P (next))
6844 continue;
6845 else if (!DEBUG_INSN_P (next))
6846 return true;
6847 else if (INSN_VAR_LOCATION_DECL (insn) == INSN_VAR_LOCATION_DECL (next))
6848 return false;
6850 return true;
6852 else
6853 return true;
6856 /* Count the number of stores into pseudo. Callback for note_stores. */
6858 static void
6859 count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data)
6861 int *counts = (int *) data;
6862 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER)
6863 counts[REGNO (x)]++;
6866 /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead
6867 pseudo doesn't have a replacement. COUNTS[X] is zero if register X
6868 is dead and REPLACEMENTS[X] is null if it has no replacemenet.
6869 Set *SEEN_REPL to true if we see a dead register that does have
6870 a replacement. */
6872 static bool
6873 is_dead_debug_insn (const_rtx pat, int *counts, rtx *replacements,
6874 bool *seen_repl)
6876 subrtx_iterator::array_type array;
6877 FOR_EACH_SUBRTX (iter, array, pat, NONCONST)
6879 const_rtx x = *iter;
6880 if (is_dead_reg (x, counts))
6882 if (replacements && replacements[REGNO (x)] != NULL_RTX)
6883 *seen_repl = true;
6884 else
6885 return true;
6888 return false;
6891 /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
6892 Callback for simplify_replace_fn_rtx. */
6894 static rtx
6895 replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data)
6897 rtx *replacements = (rtx *) data;
6899 if (REG_P (x)
6900 && REGNO (x) >= FIRST_PSEUDO_REGISTER
6901 && replacements[REGNO (x)] != NULL_RTX)
6903 if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)]))
6904 return replacements[REGNO (x)];
6905 return lowpart_subreg (GET_MODE (x), replacements[REGNO (x)],
6906 GET_MODE (replacements[REGNO (x)]));
6908 return NULL_RTX;
6911 /* Scan all the insns and delete any that are dead; i.e., they store a register
6912 that is never used or they copy a register to itself.
6914 This is used to remove insns made obviously dead by cse, loop or other
6915 optimizations. It improves the heuristics in loop since it won't try to
6916 move dead invariants out of loops or make givs for dead quantities. The
6917 remaining passes of the compilation are also sped up. */
6920 delete_trivially_dead_insns (rtx_insn *insns, int nreg)
6922 int *counts;
6923 rtx_insn *insn, *prev;
6924 rtx *replacements = NULL;
6925 int ndead = 0;
6927 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
6928 /* First count the number of times each register is used. */
6929 if (MAY_HAVE_DEBUG_INSNS)
6931 counts = XCNEWVEC (int, nreg * 3);
6932 for (insn = insns; insn; insn = NEXT_INSN (insn))
6933 if (DEBUG_INSN_P (insn))
6934 count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
6935 NULL_RTX, 1);
6936 else if (INSN_P (insn))
6938 count_reg_usage (insn, counts, NULL_RTX, 1);
6939 note_stores (PATTERN (insn), count_stores, counts + nreg * 2);
6941 /* If there can be debug insns, COUNTS are 3 consecutive arrays.
6942 First one counts how many times each pseudo is used outside
6943 of debug insns, second counts how many times each pseudo is
6944 used in debug insns and third counts how many times a pseudo
6945 is stored. */
6947 else
6949 counts = XCNEWVEC (int, nreg);
6950 for (insn = insns; insn; insn = NEXT_INSN (insn))
6951 if (INSN_P (insn))
6952 count_reg_usage (insn, counts, NULL_RTX, 1);
6953 /* If no debug insns can be present, COUNTS is just an array
6954 which counts how many times each pseudo is used. */
6956 /* Go from the last insn to the first and delete insns that only set unused
6957 registers or copy a register to itself. As we delete an insn, remove
6958 usage counts for registers it uses.
6960 The first jump optimization pass may leave a real insn as the last
6961 insn in the function. We must not skip that insn or we may end
6962 up deleting code that is not really dead.
6964 If some otherwise unused register is only used in DEBUG_INSNs,
6965 try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
6966 the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
6967 has been created for the unused register, replace it with
6968 the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
6969 for (insn = get_last_insn (); insn; insn = prev)
6971 int live_insn = 0;
6973 prev = PREV_INSN (insn);
6974 if (!INSN_P (insn))
6975 continue;
6977 live_insn = insn_live_p (insn, counts);
6979 /* If this is a dead insn, delete it and show registers in it aren't
6980 being used. */
6982 if (! live_insn && dbg_cnt (delete_trivial_dead))
6984 if (DEBUG_INSN_P (insn))
6985 count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
6986 NULL_RTX, -1);
6987 else
6989 rtx set;
6990 if (MAY_HAVE_DEBUG_INSNS
6991 && (set = single_set (insn)) != NULL_RTX
6992 && is_dead_reg (SET_DEST (set), counts)
6993 /* Used at least once in some DEBUG_INSN. */
6994 && counts[REGNO (SET_DEST (set)) + nreg] > 0
6995 /* And set exactly once. */
6996 && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1
6997 && !side_effects_p (SET_SRC (set))
6998 && asm_noperands (PATTERN (insn)) < 0)
7000 rtx dval, bind_var_loc;
7001 rtx_insn *bind;
7003 /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
7004 dval = make_debug_expr_from_rtl (SET_DEST (set));
7006 /* Emit a debug bind insn before the insn in which
7007 reg dies. */
7008 bind_var_loc =
7009 gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)),
7010 DEBUG_EXPR_TREE_DECL (dval),
7011 SET_SRC (set),
7012 VAR_INIT_STATUS_INITIALIZED);
7013 count_reg_usage (bind_var_loc, counts + nreg, NULL_RTX, 1);
7015 bind = emit_debug_insn_before (bind_var_loc, insn);
7016 df_insn_rescan (bind);
7018 if (replacements == NULL)
7019 replacements = XCNEWVEC (rtx, nreg);
7020 replacements[REGNO (SET_DEST (set))] = dval;
7023 count_reg_usage (insn, counts, NULL_RTX, -1);
7024 ndead++;
7026 delete_insn_and_edges (insn);
7030 if (MAY_HAVE_DEBUG_INSNS)
7032 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
7033 if (DEBUG_INSN_P (insn))
7035 /* If this debug insn references a dead register that wasn't replaced
7036 with an DEBUG_EXPR, reset the DEBUG_INSN. */
7037 bool seen_repl = false;
7038 if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn),
7039 counts, replacements, &seen_repl))
7041 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
7042 df_insn_rescan (insn);
7044 else if (seen_repl)
7046 INSN_VAR_LOCATION_LOC (insn)
7047 = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn),
7048 NULL_RTX, replace_dead_reg,
7049 replacements);
7050 df_insn_rescan (insn);
7053 free (replacements);
7056 if (dump_file && ndead)
7057 fprintf (dump_file, "Deleted %i trivially dead insns\n",
7058 ndead);
7059 /* Clean up. */
7060 free (counts);
7061 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7062 return ndead;
7065 /* If LOC contains references to NEWREG in a different mode, change them
7066 to use NEWREG instead. */
7068 static void
7069 cse_change_cc_mode (subrtx_ptr_iterator::array_type &array,
7070 rtx *loc, rtx insn, rtx newreg)
7072 FOR_EACH_SUBRTX_PTR (iter, array, loc, NONCONST)
7074 rtx *loc = *iter;
7075 rtx x = *loc;
7076 if (x
7077 && REG_P (x)
7078 && REGNO (x) == REGNO (newreg)
7079 && GET_MODE (x) != GET_MODE (newreg))
7081 validate_change (insn, loc, newreg, 1);
7082 iter.skip_subrtxes ();
7087 /* Change the mode of any reference to the register REGNO (NEWREG) to
7088 GET_MODE (NEWREG) in INSN. */
7090 static void
7091 cse_change_cc_mode_insn (rtx_insn *insn, rtx newreg)
7093 int success;
7095 if (!INSN_P (insn))
7096 return;
7098 subrtx_ptr_iterator::array_type array;
7099 cse_change_cc_mode (array, &PATTERN (insn), insn, newreg);
7100 cse_change_cc_mode (array, &REG_NOTES (insn), insn, newreg);
7102 /* If the following assertion was triggered, there is most probably
7103 something wrong with the cc_modes_compatible back end function.
7104 CC modes only can be considered compatible if the insn - with the mode
7105 replaced by any of the compatible modes - can still be recognized. */
7106 success = apply_change_group ();
7107 gcc_assert (success);
7110 /* Change the mode of any reference to the register REGNO (NEWREG) to
7111 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7112 any instruction which modifies NEWREG. */
7114 static void
7115 cse_change_cc_mode_insns (rtx_insn *start, rtx_insn *end, rtx newreg)
7117 rtx_insn *insn;
7119 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7121 if (! INSN_P (insn))
7122 continue;
7124 if (reg_set_p (newreg, insn))
7125 return;
7127 cse_change_cc_mode_insn (insn, newreg);
7131 /* BB is a basic block which finishes with CC_REG as a condition code
7132 register which is set to CC_SRC. Look through the successors of BB
7133 to find blocks which have a single predecessor (i.e., this one),
7134 and look through those blocks for an assignment to CC_REG which is
7135 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7136 permitted to change the mode of CC_SRC to a compatible mode. This
7137 returns VOIDmode if no equivalent assignments were found.
7138 Otherwise it returns the mode which CC_SRC should wind up with.
7139 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7140 but is passed unmodified down to recursive calls in order to prevent
7141 endless recursion.
7143 The main complexity in this function is handling the mode issues.
7144 We may have more than one duplicate which we can eliminate, and we
7145 try to find a mode which will work for multiple duplicates. */
7147 static enum machine_mode
7148 cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src,
7149 bool can_change_mode)
7151 bool found_equiv;
7152 enum machine_mode mode;
7153 unsigned int insn_count;
7154 edge e;
7155 rtx_insn *insns[2];
7156 enum machine_mode modes[2];
7157 rtx_insn *last_insns[2];
7158 unsigned int i;
7159 rtx newreg;
7160 edge_iterator ei;
7162 /* We expect to have two successors. Look at both before picking
7163 the final mode for the comparison. If we have more successors
7164 (i.e., some sort of table jump, although that seems unlikely),
7165 then we require all beyond the first two to use the same
7166 mode. */
7168 found_equiv = false;
7169 mode = GET_MODE (cc_src);
7170 insn_count = 0;
7171 FOR_EACH_EDGE (e, ei, bb->succs)
7173 rtx_insn *insn;
7174 rtx_insn *end;
7176 if (e->flags & EDGE_COMPLEX)
7177 continue;
7179 if (EDGE_COUNT (e->dest->preds) != 1
7180 || e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)
7181 /* Avoid endless recursion on unreachable blocks. */
7182 || e->dest == orig_bb)
7183 continue;
7185 end = NEXT_INSN (BB_END (e->dest));
7186 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7188 rtx set;
7190 if (! INSN_P (insn))
7191 continue;
7193 /* If CC_SRC is modified, we have to stop looking for
7194 something which uses it. */
7195 if (modified_in_p (cc_src, insn))
7196 break;
7198 /* Check whether INSN sets CC_REG to CC_SRC. */
7199 set = single_set (insn);
7200 if (set
7201 && REG_P (SET_DEST (set))
7202 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7204 bool found;
7205 enum machine_mode set_mode;
7206 enum machine_mode comp_mode;
7208 found = false;
7209 set_mode = GET_MODE (SET_SRC (set));
7210 comp_mode = set_mode;
7211 if (rtx_equal_p (cc_src, SET_SRC (set)))
7212 found = true;
7213 else if (GET_CODE (cc_src) == COMPARE
7214 && GET_CODE (SET_SRC (set)) == COMPARE
7215 && mode != set_mode
7216 && rtx_equal_p (XEXP (cc_src, 0),
7217 XEXP (SET_SRC (set), 0))
7218 && rtx_equal_p (XEXP (cc_src, 1),
7219 XEXP (SET_SRC (set), 1)))
7222 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7223 if (comp_mode != VOIDmode
7224 && (can_change_mode || comp_mode == mode))
7225 found = true;
7228 if (found)
7230 found_equiv = true;
7231 if (insn_count < ARRAY_SIZE (insns))
7233 insns[insn_count] = insn;
7234 modes[insn_count] = set_mode;
7235 last_insns[insn_count] = end;
7236 ++insn_count;
7238 if (mode != comp_mode)
7240 gcc_assert (can_change_mode);
7241 mode = comp_mode;
7243 /* The modified insn will be re-recognized later. */
7244 PUT_MODE (cc_src, mode);
7247 else
7249 if (set_mode != mode)
7251 /* We found a matching expression in the
7252 wrong mode, but we don't have room to
7253 store it in the array. Punt. This case
7254 should be rare. */
7255 break;
7257 /* INSN sets CC_REG to a value equal to CC_SRC
7258 with the right mode. We can simply delete
7259 it. */
7260 delete_insn (insn);
7263 /* We found an instruction to delete. Keep looking,
7264 in the hopes of finding a three-way jump. */
7265 continue;
7268 /* We found an instruction which sets the condition
7269 code, so don't look any farther. */
7270 break;
7273 /* If INSN sets CC_REG in some other way, don't look any
7274 farther. */
7275 if (reg_set_p (cc_reg, insn))
7276 break;
7279 /* If we fell off the bottom of the block, we can keep looking
7280 through successors. We pass CAN_CHANGE_MODE as false because
7281 we aren't prepared to handle compatibility between the
7282 further blocks and this block. */
7283 if (insn == end)
7285 enum machine_mode submode;
7287 submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false);
7288 if (submode != VOIDmode)
7290 gcc_assert (submode == mode);
7291 found_equiv = true;
7292 can_change_mode = false;
7297 if (! found_equiv)
7298 return VOIDmode;
7300 /* Now INSN_COUNT is the number of instructions we found which set
7301 CC_REG to a value equivalent to CC_SRC. The instructions are in
7302 INSNS. The modes used by those instructions are in MODES. */
7304 newreg = NULL_RTX;
7305 for (i = 0; i < insn_count; ++i)
7307 if (modes[i] != mode)
7309 /* We need to change the mode of CC_REG in INSNS[i] and
7310 subsequent instructions. */
7311 if (! newreg)
7313 if (GET_MODE (cc_reg) == mode)
7314 newreg = cc_reg;
7315 else
7316 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7318 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7319 newreg);
7322 delete_insn_and_edges (insns[i]);
7325 return mode;
7328 /* If we have a fixed condition code register (or two), walk through
7329 the instructions and try to eliminate duplicate assignments. */
7331 static void
7332 cse_condition_code_reg (void)
7334 unsigned int cc_regno_1;
7335 unsigned int cc_regno_2;
7336 rtx cc_reg_1;
7337 rtx cc_reg_2;
7338 basic_block bb;
7340 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7341 return;
7343 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7344 if (cc_regno_2 != INVALID_REGNUM)
7345 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7346 else
7347 cc_reg_2 = NULL_RTX;
7349 FOR_EACH_BB_FN (bb, cfun)
7351 rtx_insn *last_insn;
7352 rtx cc_reg;
7353 rtx_insn *insn;
7354 rtx_insn *cc_src_insn;
7355 rtx cc_src;
7356 enum machine_mode mode;
7357 enum machine_mode orig_mode;
7359 /* Look for blocks which end with a conditional jump based on a
7360 condition code register. Then look for the instruction which
7361 sets the condition code register. Then look through the
7362 successor blocks for instructions which set the condition
7363 code register to the same value. There are other possible
7364 uses of the condition code register, but these are by far the
7365 most common and the ones which we are most likely to be able
7366 to optimize. */
7368 last_insn = BB_END (bb);
7369 if (!JUMP_P (last_insn))
7370 continue;
7372 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7373 cc_reg = cc_reg_1;
7374 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7375 cc_reg = cc_reg_2;
7376 else
7377 continue;
7379 cc_src_insn = NULL;
7380 cc_src = NULL_RTX;
7381 for (insn = PREV_INSN (last_insn);
7382 insn && insn != PREV_INSN (BB_HEAD (bb));
7383 insn = PREV_INSN (insn))
7385 rtx set;
7387 if (! INSN_P (insn))
7388 continue;
7389 set = single_set (insn);
7390 if (set
7391 && REG_P (SET_DEST (set))
7392 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7394 cc_src_insn = insn;
7395 cc_src = SET_SRC (set);
7396 break;
7398 else if (reg_set_p (cc_reg, insn))
7399 break;
7402 if (! cc_src_insn)
7403 continue;
7405 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7406 continue;
7408 /* Now CC_REG is a condition code register used for a
7409 conditional jump at the end of the block, and CC_SRC, in
7410 CC_SRC_INSN, is the value to which that condition code
7411 register is set, and CC_SRC is still meaningful at the end of
7412 the basic block. */
7414 orig_mode = GET_MODE (cc_src);
7415 mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true);
7416 if (mode != VOIDmode)
7418 gcc_assert (mode == GET_MODE (cc_src));
7419 if (mode != orig_mode)
7421 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7423 cse_change_cc_mode_insn (cc_src_insn, newreg);
7425 /* Do the same in the following insns that use the
7426 current value of CC_REG within BB. */
7427 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7428 NEXT_INSN (last_insn),
7429 newreg);
7436 /* Perform common subexpression elimination. Nonzero value from
7437 `cse_main' means that jumps were simplified and some code may now
7438 be unreachable, so do jump optimization again. */
7439 static unsigned int
7440 rest_of_handle_cse (void)
7442 int tem;
7444 if (dump_file)
7445 dump_flow_info (dump_file, dump_flags);
7447 tem = cse_main (get_insns (), max_reg_num ());
7449 /* If we are not running more CSE passes, then we are no longer
7450 expecting CSE to be run. But always rerun it in a cheap mode. */
7451 cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
7453 if (tem == 2)
7455 timevar_push (TV_JUMP);
7456 rebuild_jump_labels (get_insns ());
7457 cleanup_cfg (CLEANUP_CFG_CHANGED);
7458 timevar_pop (TV_JUMP);
7460 else if (tem == 1 || optimize > 1)
7461 cleanup_cfg (0);
7463 return 0;
7466 namespace {
7468 const pass_data pass_data_cse =
7470 RTL_PASS, /* type */
7471 "cse1", /* name */
7472 OPTGROUP_NONE, /* optinfo_flags */
7473 TV_CSE, /* tv_id */
7474 0, /* properties_required */
7475 0, /* properties_provided */
7476 0, /* properties_destroyed */
7477 0, /* todo_flags_start */
7478 TODO_df_finish, /* todo_flags_finish */
7481 class pass_cse : public rtl_opt_pass
7483 public:
7484 pass_cse (gcc::context *ctxt)
7485 : rtl_opt_pass (pass_data_cse, ctxt)
7488 /* opt_pass methods: */
7489 virtual bool gate (function *) { return optimize > 0; }
7490 virtual unsigned int execute (function *) { return rest_of_handle_cse (); }
7492 }; // class pass_cse
7494 } // anon namespace
7496 rtl_opt_pass *
7497 make_pass_cse (gcc::context *ctxt)
7499 return new pass_cse (ctxt);
7503 /* Run second CSE pass after loop optimizations. */
7504 static unsigned int
7505 rest_of_handle_cse2 (void)
7507 int tem;
7509 if (dump_file)
7510 dump_flow_info (dump_file, dump_flags);
7512 tem = cse_main (get_insns (), max_reg_num ());
7514 /* Run a pass to eliminate duplicated assignments to condition code
7515 registers. We have to run this after bypass_jumps, because it
7516 makes it harder for that pass to determine whether a jump can be
7517 bypassed safely. */
7518 cse_condition_code_reg ();
7520 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7522 if (tem == 2)
7524 timevar_push (TV_JUMP);
7525 rebuild_jump_labels (get_insns ());
7526 cleanup_cfg (CLEANUP_CFG_CHANGED);
7527 timevar_pop (TV_JUMP);
7529 else if (tem == 1)
7530 cleanup_cfg (0);
7532 cse_not_expected = 1;
7533 return 0;
7537 namespace {
7539 const pass_data pass_data_cse2 =
7541 RTL_PASS, /* type */
7542 "cse2", /* name */
7543 OPTGROUP_NONE, /* optinfo_flags */
7544 TV_CSE2, /* tv_id */
7545 0, /* properties_required */
7546 0, /* properties_provided */
7547 0, /* properties_destroyed */
7548 0, /* todo_flags_start */
7549 TODO_df_finish, /* todo_flags_finish */
7552 class pass_cse2 : public rtl_opt_pass
7554 public:
7555 pass_cse2 (gcc::context *ctxt)
7556 : rtl_opt_pass (pass_data_cse2, ctxt)
7559 /* opt_pass methods: */
7560 virtual bool gate (function *)
7562 return optimize > 0 && flag_rerun_cse_after_loop;
7565 virtual unsigned int execute (function *) { return rest_of_handle_cse2 (); }
7567 }; // class pass_cse2
7569 } // anon namespace
7571 rtl_opt_pass *
7572 make_pass_cse2 (gcc::context *ctxt)
7574 return new pass_cse2 (ctxt);
7577 /* Run second CSE pass after loop optimizations. */
7578 static unsigned int
7579 rest_of_handle_cse_after_global_opts (void)
7581 int save_cfj;
7582 int tem;
7584 /* We only want to do local CSE, so don't follow jumps. */
7585 save_cfj = flag_cse_follow_jumps;
7586 flag_cse_follow_jumps = 0;
7588 rebuild_jump_labels (get_insns ());
7589 tem = cse_main (get_insns (), max_reg_num ());
7590 purge_all_dead_edges ();
7591 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7593 cse_not_expected = !flag_rerun_cse_after_loop;
7595 /* If cse altered any jumps, rerun jump opts to clean things up. */
7596 if (tem == 2)
7598 timevar_push (TV_JUMP);
7599 rebuild_jump_labels (get_insns ());
7600 cleanup_cfg (CLEANUP_CFG_CHANGED);
7601 timevar_pop (TV_JUMP);
7603 else if (tem == 1)
7604 cleanup_cfg (0);
7606 flag_cse_follow_jumps = save_cfj;
7607 return 0;
7610 namespace {
7612 const pass_data pass_data_cse_after_global_opts =
7614 RTL_PASS, /* type */
7615 "cse_local", /* name */
7616 OPTGROUP_NONE, /* optinfo_flags */
7617 TV_CSE, /* tv_id */
7618 0, /* properties_required */
7619 0, /* properties_provided */
7620 0, /* properties_destroyed */
7621 0, /* todo_flags_start */
7622 TODO_df_finish, /* todo_flags_finish */
7625 class pass_cse_after_global_opts : public rtl_opt_pass
7627 public:
7628 pass_cse_after_global_opts (gcc::context *ctxt)
7629 : rtl_opt_pass (pass_data_cse_after_global_opts, ctxt)
7632 /* opt_pass methods: */
7633 virtual bool gate (function *)
7635 return optimize > 0 && flag_rerun_cse_after_global_opts;
7638 virtual unsigned int execute (function *)
7640 return rest_of_handle_cse_after_global_opts ();
7643 }; // class pass_cse_after_global_opts
7645 } // anon namespace
7647 rtl_opt_pass *
7648 make_pass_cse_after_global_opts (gcc::context *ctxt)
7650 return new pass_cse_after_global_opts (ctxt);