* ru.po: Update.
[official-gcc.git] / gcc / reginfo.c
blobf4dac083045d99f7b838f599a7304dbada9af844
1 /* Compute different info about registers.
2 Copyright (C) 1987-2016 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* This file contains regscan pass of the compiler and passes for
22 dealing with info about modes of pseudo-registers inside
23 subregisters. It also defines some tables of information about the
24 hardware registers, function init_reg_sets to initialize the
25 tables, and other auxiliary functions to deal with info about
26 registers and their classes. */
28 #include "config.h"
29 #include "system.h"
30 #include "coretypes.h"
31 #include "backend.h"
32 #include "target.h"
33 #include "rtl.h"
34 #include "tree.h"
35 #include "df.h"
36 #include "tm_p.h"
37 #include "insn-config.h"
38 #include "regs.h"
39 #include "ira.h"
40 #include "recog.h"
41 #include "diagnostic-core.h"
42 #include "reload.h"
43 #include "output.h"
44 #include "tree-pass.h"
46 /* Maximum register number used in this function, plus one. */
48 int max_regno;
50 /* Used to cache the results of simplifiable_subregs. SHAPE is the input
51 parameter and SIMPLIFIABLE_REGS is the result. */
52 struct simplifiable_subreg
54 simplifiable_subreg (const subreg_shape &);
56 subreg_shape shape;
57 HARD_REG_SET simplifiable_regs;
60 struct target_hard_regs default_target_hard_regs;
61 struct target_regs default_target_regs;
62 #if SWITCHABLE_TARGET
63 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
64 struct target_regs *this_target_regs = &default_target_regs;
65 #endif
67 /* Data for initializing fixed_regs. */
68 static const char initial_fixed_regs[] = FIXED_REGISTERS;
70 /* Data for initializing call_used_regs. */
71 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
73 #ifdef CALL_REALLY_USED_REGISTERS
74 /* Data for initializing call_really_used_regs. */
75 static const char initial_call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
76 #endif
78 #ifdef CALL_REALLY_USED_REGISTERS
79 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
80 #else
81 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
82 #endif
84 /* Indexed by hard register number, contains 1 for registers
85 that are being used for global register decls.
86 These must be exempt from ordinary flow analysis
87 and are also considered fixed. */
88 char global_regs[FIRST_PSEUDO_REGISTER];
90 /* Declaration for the global register. */
91 tree global_regs_decl[FIRST_PSEUDO_REGISTER];
93 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
94 in dataflow more conveniently. */
95 regset regs_invalidated_by_call_regset;
97 /* Same information as FIXED_REG_SET but in regset form. */
98 regset fixed_reg_set_regset;
100 /* The bitmap_obstack is used to hold some static variables that
101 should not be reset after each function is compiled. */
102 static bitmap_obstack persistent_obstack;
104 /* Used to initialize reg_alloc_order. */
105 #ifdef REG_ALLOC_ORDER
106 static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
107 #endif
109 /* The same information, but as an array of unsigned ints. We copy from
110 these unsigned ints to the table above. We do this so the tm.h files
111 do not have to be aware of the wordsize for machines with <= 64 regs.
112 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
113 #define N_REG_INTS \
114 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
116 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
117 = REG_CLASS_CONTENTS;
119 /* Array containing all of the register names. */
120 static const char *const initial_reg_names[] = REGISTER_NAMES;
122 /* Array containing all of the register class names. */
123 const char * reg_class_names[] = REG_CLASS_NAMES;
125 /* No more global register variables may be declared; true once
126 reginfo has been initialized. */
127 static int no_global_reg_vars = 0;
129 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
130 correspond to the hard registers, if any, set in that map. This
131 could be done far more efficiently by having all sorts of special-cases
132 with moving single words, but probably isn't worth the trouble. */
133 void
134 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
136 unsigned i;
137 bitmap_iterator bi;
139 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
141 if (i >= FIRST_PSEUDO_REGISTER)
142 return;
143 SET_HARD_REG_BIT (*to, i);
147 /* Function called only once per target_globals to initialize the
148 target_hard_regs structure. Once this is done, various switches
149 may override. */
150 void
151 init_reg_sets (void)
153 int i, j;
155 /* First copy the register information from the initial int form into
156 the regsets. */
158 for (i = 0; i < N_REG_CLASSES; i++)
160 CLEAR_HARD_REG_SET (reg_class_contents[i]);
162 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
163 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
164 if (int_reg_class_contents[i][j / 32]
165 & ((unsigned) 1 << (j % 32)))
166 SET_HARD_REG_BIT (reg_class_contents[i], j);
169 /* Sanity check: make sure the target macros FIXED_REGISTERS and
170 CALL_USED_REGISTERS had the right number of initializers. */
171 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
172 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
173 #ifdef CALL_REALLY_USED_REGISTERS
174 gcc_assert (sizeof call_really_used_regs
175 == sizeof initial_call_really_used_regs);
176 #endif
177 #ifdef REG_ALLOC_ORDER
178 gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order);
179 #endif
180 gcc_assert (sizeof reg_names == sizeof initial_reg_names);
182 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
183 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
184 #ifdef CALL_REALLY_USED_REGISTERS
185 memcpy (call_really_used_regs, initial_call_really_used_regs,
186 sizeof call_really_used_regs);
187 #endif
188 #ifdef REG_ALLOC_ORDER
189 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
190 #endif
191 memcpy (reg_names, initial_reg_names, sizeof reg_names);
193 SET_HARD_REG_SET (accessible_reg_set);
194 SET_HARD_REG_SET (operand_reg_set);
197 /* We need to save copies of some of the register information which
198 can be munged by command-line switches so we can restore it during
199 subsequent back-end reinitialization. */
200 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
201 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
202 #ifdef CALL_REALLY_USED_REGISTERS
203 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
204 #endif
205 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
206 static HARD_REG_SET saved_accessible_reg_set;
207 static HARD_REG_SET saved_operand_reg_set;
209 /* Save the register information. */
210 void
211 save_register_info (void)
213 /* Sanity check: make sure the target macros FIXED_REGISTERS and
214 CALL_USED_REGISTERS had the right number of initializers. */
215 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
216 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
217 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
218 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
220 /* Likewise for call_really_used_regs. */
221 #ifdef CALL_REALLY_USED_REGISTERS
222 gcc_assert (sizeof call_really_used_regs
223 == sizeof saved_call_really_used_regs);
224 memcpy (saved_call_really_used_regs, call_really_used_regs,
225 sizeof call_really_used_regs);
226 #endif
228 /* And similarly for reg_names. */
229 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
230 memcpy (saved_reg_names, reg_names, sizeof reg_names);
231 COPY_HARD_REG_SET (saved_accessible_reg_set, accessible_reg_set);
232 COPY_HARD_REG_SET (saved_operand_reg_set, operand_reg_set);
235 /* Restore the register information. */
236 static void
237 restore_register_info (void)
239 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
240 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
242 #ifdef CALL_REALLY_USED_REGISTERS
243 memcpy (call_really_used_regs, saved_call_really_used_regs,
244 sizeof call_really_used_regs);
245 #endif
247 memcpy (reg_names, saved_reg_names, sizeof reg_names);
248 COPY_HARD_REG_SET (accessible_reg_set, saved_accessible_reg_set);
249 COPY_HARD_REG_SET (operand_reg_set, saved_operand_reg_set);
252 /* After switches have been processed, which perhaps alter
253 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
254 static void
255 init_reg_sets_1 (void)
257 unsigned int i, j;
258 unsigned int /* machine_mode */ m;
260 restore_register_info ();
262 #ifdef REG_ALLOC_ORDER
263 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
264 inv_reg_alloc_order[reg_alloc_order[i]] = i;
265 #endif
267 /* Let the target tweak things if necessary. */
269 targetm.conditional_register_usage ();
271 /* Compute number of hard regs in each class. */
273 memset (reg_class_size, 0, sizeof reg_class_size);
274 for (i = 0; i < N_REG_CLASSES; i++)
276 bool any_nonfixed = false;
277 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
278 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
280 reg_class_size[i]++;
281 if (!fixed_regs[j])
282 any_nonfixed = true;
284 class_only_fixed_regs[i] = !any_nonfixed;
287 /* Initialize the table of subunions.
288 reg_class_subunion[I][J] gets the largest-numbered reg-class
289 that is contained in the union of classes I and J. */
291 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
292 for (i = 0; i < N_REG_CLASSES; i++)
294 for (j = 0; j < N_REG_CLASSES; j++)
296 HARD_REG_SET c;
297 int k;
299 COPY_HARD_REG_SET (c, reg_class_contents[i]);
300 IOR_HARD_REG_SET (c, reg_class_contents[j]);
301 for (k = 0; k < N_REG_CLASSES; k++)
302 if (hard_reg_set_subset_p (reg_class_contents[k], c)
303 && !hard_reg_set_subset_p (reg_class_contents[k],
304 reg_class_contents
305 [(int) reg_class_subunion[i][j]]))
306 reg_class_subunion[i][j] = (enum reg_class) k;
310 /* Initialize the table of superunions.
311 reg_class_superunion[I][J] gets the smallest-numbered reg-class
312 containing the union of classes I and J. */
314 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
315 for (i = 0; i < N_REG_CLASSES; i++)
317 for (j = 0; j < N_REG_CLASSES; j++)
319 HARD_REG_SET c;
320 int k;
322 COPY_HARD_REG_SET (c, reg_class_contents[i]);
323 IOR_HARD_REG_SET (c, reg_class_contents[j]);
324 for (k = 0; k < N_REG_CLASSES; k++)
325 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
326 break;
328 reg_class_superunion[i][j] = (enum reg_class) k;
332 /* Initialize the tables of subclasses and superclasses of each reg class.
333 First clear the whole table, then add the elements as they are found. */
335 for (i = 0; i < N_REG_CLASSES; i++)
337 for (j = 0; j < N_REG_CLASSES; j++)
338 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
341 for (i = 0; i < N_REG_CLASSES; i++)
343 if (i == (int) NO_REGS)
344 continue;
346 for (j = i + 1; j < N_REG_CLASSES; j++)
347 if (hard_reg_set_subset_p (reg_class_contents[i],
348 reg_class_contents[j]))
350 /* Reg class I is a subclass of J.
351 Add J to the table of superclasses of I. */
352 enum reg_class *p;
354 /* Add I to the table of superclasses of J. */
355 p = &reg_class_subclasses[j][0];
356 while (*p != LIM_REG_CLASSES) p++;
357 *p = (enum reg_class) i;
361 /* Initialize "constant" tables. */
363 CLEAR_HARD_REG_SET (fixed_reg_set);
364 CLEAR_HARD_REG_SET (call_used_reg_set);
365 CLEAR_HARD_REG_SET (call_fixed_reg_set);
366 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
367 if (!regs_invalidated_by_call_regset)
369 bitmap_obstack_initialize (&persistent_obstack);
370 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
372 else
373 CLEAR_REG_SET (regs_invalidated_by_call_regset);
374 if (!fixed_reg_set_regset)
375 fixed_reg_set_regset = ALLOC_REG_SET (&persistent_obstack);
376 else
377 CLEAR_REG_SET (fixed_reg_set_regset);
379 AND_HARD_REG_SET (operand_reg_set, accessible_reg_set);
380 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
382 /* As a special exception, registers whose class is NO_REGS are
383 not accepted by `register_operand'. The reason for this change
384 is to allow the representation of special architecture artifacts
385 (such as a condition code register) without extending the rtl
386 definitions. Since registers of class NO_REGS cannot be used
387 as registers in any case where register classes are examined,
388 it is better to apply this exception in a target-independent way. */
389 if (REGNO_REG_CLASS (i) == NO_REGS)
390 CLEAR_HARD_REG_BIT (operand_reg_set, i);
392 /* If a register is too limited to be treated as a register operand,
393 then it should never be allocated to a pseudo. */
394 if (!TEST_HARD_REG_BIT (operand_reg_set, i))
396 fixed_regs[i] = 1;
397 call_used_regs[i] = 1;
400 /* call_used_regs must include fixed_regs. */
401 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
402 #ifdef CALL_REALLY_USED_REGISTERS
403 /* call_used_regs must include call_really_used_regs. */
404 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
405 #endif
407 if (fixed_regs[i])
409 SET_HARD_REG_BIT (fixed_reg_set, i);
410 SET_REGNO_REG_SET (fixed_reg_set_regset, i);
413 if (call_used_regs[i])
414 SET_HARD_REG_BIT (call_used_reg_set, i);
416 /* There are a couple of fixed registers that we know are safe to
417 exclude from being clobbered by calls:
419 The frame pointer is always preserved across calls. The arg
420 pointer is if it is fixed. The stack pointer usually is,
421 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
422 CLOBBER will be present. If we are generating PIC code, the
423 PIC offset table register is preserved across calls, though the
424 target can override that. */
426 if (i == STACK_POINTER_REGNUM)
428 else if (global_regs[i])
430 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
431 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
433 else if (i == FRAME_POINTER_REGNUM)
435 else if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
436 && i == HARD_FRAME_POINTER_REGNUM)
438 else if (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
439 && i == ARG_POINTER_REGNUM && fixed_regs[i])
441 else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
442 && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
444 else if (CALL_REALLY_USED_REGNO_P (i))
446 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
447 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
451 COPY_HARD_REG_SET (call_fixed_reg_set, fixed_reg_set);
452 COPY_HARD_REG_SET (fixed_nonglobal_reg_set, fixed_reg_set);
454 /* Preserve global registers if called more than once. */
455 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
457 if (global_regs[i])
459 fixed_regs[i] = call_used_regs[i] = 1;
460 SET_HARD_REG_BIT (fixed_reg_set, i);
461 SET_HARD_REG_BIT (call_used_reg_set, i);
462 SET_HARD_REG_BIT (call_fixed_reg_set, i);
466 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
467 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
468 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
470 HARD_REG_SET ok_regs;
471 CLEAR_HARD_REG_SET (ok_regs);
472 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
473 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (machine_mode) m))
474 SET_HARD_REG_BIT (ok_regs, j);
476 for (i = 0; i < N_REG_CLASSES; i++)
477 if ((targetm.class_max_nregs ((reg_class_t) i, (machine_mode) m)
478 <= reg_class_size[i])
479 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
481 contains_reg_of_mode [i][m] = 1;
482 have_regs_of_mode [m] = 1;
487 /* Compute the table of register modes.
488 These values are used to record death information for individual registers
489 (as opposed to a multi-register mode).
490 This function might be invoked more than once, if the target has support
491 for changing register usage conventions on a per-function basis.
493 void
494 init_reg_modes_target (void)
496 int i, j;
498 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
499 for (j = 0; j < MAX_MACHINE_MODE; j++)
500 hard_regno_nregs[i][j] = HARD_REGNO_NREGS (i, (machine_mode)j);
502 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
504 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
506 /* If we couldn't find a valid mode, just use the previous mode
507 if it is suitable, otherwise fall back on word_mode. */
508 if (reg_raw_mode[i] == VOIDmode)
510 if (i > 0 && hard_regno_nregs[i][reg_raw_mode[i - 1]] == 1)
511 reg_raw_mode[i] = reg_raw_mode[i - 1];
512 else
513 reg_raw_mode[i] = word_mode;
518 /* Finish initializing the register sets and initialize the register modes.
519 This function might be invoked more than once, if the target has support
520 for changing register usage conventions on a per-function basis.
522 void
523 init_regs (void)
525 /* This finishes what was started by init_reg_sets, but couldn't be done
526 until after register usage was specified. */
527 init_reg_sets_1 ();
530 /* The same as previous function plus initializing IRA. */
531 void
532 reinit_regs (void)
534 init_regs ();
535 /* caller_save needs to be re-initialized. */
536 caller_save_initialized_p = false;
537 if (this_target_rtl->target_specific_initialized)
539 ira_init ();
540 recog_init ();
544 /* Initialize some fake stack-frame MEM references for use in
545 memory_move_secondary_cost. */
546 void
547 init_fake_stack_mems (void)
549 int i;
551 for (i = 0; i < MAX_MACHINE_MODE; i++)
552 top_of_stack[i] = gen_rtx_MEM ((machine_mode) i, stack_pointer_rtx);
556 /* Compute cost of moving data from a register of class FROM to one of
557 TO, using MODE. */
560 register_move_cost (machine_mode mode, reg_class_t from, reg_class_t to)
562 return targetm.register_move_cost (mode, from, to);
565 /* Compute cost of moving registers to/from memory. */
568 memory_move_cost (machine_mode mode, reg_class_t rclass, bool in)
570 return targetm.memory_move_cost (mode, rclass, in);
573 /* Compute extra cost of moving registers to/from memory due to reloads.
574 Only needed if secondary reloads are required for memory moves. */
576 memory_move_secondary_cost (machine_mode mode, reg_class_t rclass,
577 bool in)
579 reg_class_t altclass;
580 int partial_cost = 0;
581 /* We need a memory reference to feed to SECONDARY... macros. */
582 /* mem may be unused even if the SECONDARY_ macros are defined. */
583 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
585 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
587 if (altclass == NO_REGS)
588 return 0;
590 if (in)
591 partial_cost = register_move_cost (mode, altclass, rclass);
592 else
593 partial_cost = register_move_cost (mode, rclass, altclass);
595 if (rclass == altclass)
596 /* This isn't simply a copy-to-temporary situation. Can't guess
597 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
598 calling here in that case.
600 I'm tempted to put in an assert here, but returning this will
601 probably only give poor estimates, which is what we would've
602 had before this code anyways. */
603 return partial_cost;
605 /* Check if the secondary reload register will also need a
606 secondary reload. */
607 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
610 /* Return a machine mode that is legitimate for hard reg REGNO and large
611 enough to save nregs. If we can't find one, return VOIDmode.
612 If CALL_SAVED is true, only consider modes that are call saved. */
613 machine_mode
614 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
615 unsigned int nregs, bool call_saved)
617 unsigned int /* machine_mode */ m;
618 machine_mode found_mode = VOIDmode, mode;
620 /* We first look for the largest integer mode that can be validly
621 held in REGNO. If none, we look for the largest floating-point mode.
622 If we still didn't find a valid mode, try CCmode. */
624 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
625 mode != VOIDmode;
626 mode = GET_MODE_WIDER_MODE (mode))
627 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
628 && HARD_REGNO_MODE_OK (regno, mode)
629 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
630 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
631 found_mode = mode;
633 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
634 mode != VOIDmode;
635 mode = GET_MODE_WIDER_MODE (mode))
636 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
637 && HARD_REGNO_MODE_OK (regno, mode)
638 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
639 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
640 found_mode = mode;
642 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
643 mode != VOIDmode;
644 mode = GET_MODE_WIDER_MODE (mode))
645 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
646 && HARD_REGNO_MODE_OK (regno, mode)
647 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
648 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
649 found_mode = mode;
651 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
652 mode != VOIDmode;
653 mode = GET_MODE_WIDER_MODE (mode))
654 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
655 && HARD_REGNO_MODE_OK (regno, mode)
656 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
657 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
658 found_mode = mode;
660 if (found_mode != VOIDmode)
661 return found_mode;
663 /* Iterate over all of the CCmodes. */
664 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
666 mode = (machine_mode) m;
667 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
668 && HARD_REGNO_MODE_OK (regno, mode)
669 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
670 return mode;
673 /* We can't find a mode valid for this register. */
674 return VOIDmode;
677 /* Specify the usage characteristics of the register named NAME.
678 It should be a fixed register if FIXED and a
679 call-used register if CALL_USED. */
680 void
681 fix_register (const char *name, int fixed, int call_used)
683 int i;
684 int reg, nregs;
686 /* Decode the name and update the primary form of
687 the register info. */
689 if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0)
691 gcc_assert (nregs >= 1);
692 for (i = reg; i < reg + nregs; i++)
694 if ((i == STACK_POINTER_REGNUM
695 #ifdef HARD_FRAME_POINTER_REGNUM
696 || i == HARD_FRAME_POINTER_REGNUM
697 #else
698 || i == FRAME_POINTER_REGNUM
699 #endif
701 && (fixed == 0 || call_used == 0))
703 switch (fixed)
705 case 0:
706 switch (call_used)
708 case 0:
709 error ("can%'t use %qs as a call-saved register", name);
710 break;
712 case 1:
713 error ("can%'t use %qs as a call-used register", name);
714 break;
716 default:
717 gcc_unreachable ();
719 break;
721 case 1:
722 switch (call_used)
724 case 1:
725 error ("can%'t use %qs as a fixed register", name);
726 break;
728 case 0:
729 default:
730 gcc_unreachable ();
732 break;
734 default:
735 gcc_unreachable ();
738 else
740 fixed_regs[i] = fixed;
741 call_used_regs[i] = call_used;
742 #ifdef CALL_REALLY_USED_REGISTERS
743 if (fixed == 0)
744 call_really_used_regs[i] = call_used;
745 #endif
749 else
751 warning (0, "unknown register name: %s", name);
755 /* Mark register number I as global. */
756 void
757 globalize_reg (tree decl, int i)
759 location_t loc = DECL_SOURCE_LOCATION (decl);
761 #ifdef STACK_REGS
762 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
764 error ("stack register used for global register variable");
765 return;
767 #endif
769 if (fixed_regs[i] == 0 && no_global_reg_vars)
770 error_at (loc, "global register variable follows a function definition");
772 if (global_regs[i])
774 warning_at (loc, 0,
775 "register of %qD used for multiple global register variables",
776 decl);
777 inform (DECL_SOURCE_LOCATION (global_regs_decl[i]),
778 "conflicts with %qD", global_regs_decl[i]);
779 return;
782 if (call_used_regs[i] && ! fixed_regs[i])
783 warning_at (loc, 0, "call-clobbered register used for global register variable");
785 global_regs[i] = 1;
786 global_regs_decl[i] = decl;
788 /* If we're globalizing the frame pointer, we need to set the
789 appropriate regs_invalidated_by_call bit, even if it's already
790 set in fixed_regs. */
791 if (i != STACK_POINTER_REGNUM)
793 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
794 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
797 /* If already fixed, nothing else to do. */
798 if (fixed_regs[i])
799 return;
801 fixed_regs[i] = call_used_regs[i] = 1;
802 #ifdef CALL_REALLY_USED_REGISTERS
803 call_really_used_regs[i] = 1;
804 #endif
806 SET_HARD_REG_BIT (fixed_reg_set, i);
807 SET_HARD_REG_BIT (call_used_reg_set, i);
808 SET_HARD_REG_BIT (call_fixed_reg_set, i);
810 reinit_regs ();
814 /* Structure used to record preferences of given pseudo. */
815 struct reg_pref
817 /* (enum reg_class) prefclass is the preferred class. May be
818 NO_REGS if no class is better than memory. */
819 char prefclass;
821 /* altclass is a register class that we should use for allocating
822 pseudo if no register in the preferred class is available.
823 If no register in this class is available, memory is preferred.
825 It might appear to be more general to have a bitmask of classes here,
826 but since it is recommended that there be a class corresponding to the
827 union of most major pair of classes, that generality is not required. */
828 char altclass;
830 /* allocnoclass is a register class that IRA uses for allocating
831 the pseudo. */
832 char allocnoclass;
835 /* Record preferences of each pseudo. This is available after RA is
836 run. */
837 static struct reg_pref *reg_pref;
839 /* Current size of reg_info. */
840 static int reg_info_size;
841 /* Max_reg_num still last resize_reg_info call. */
842 static int max_regno_since_last_resize;
844 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
845 This function is sometimes called before the info has been computed.
846 When that happens, just return GENERAL_REGS, which is innocuous. */
847 enum reg_class
848 reg_preferred_class (int regno)
850 if (reg_pref == 0)
851 return GENERAL_REGS;
853 gcc_assert (regno < reg_info_size);
854 return (enum reg_class) reg_pref[regno].prefclass;
857 enum reg_class
858 reg_alternate_class (int regno)
860 if (reg_pref == 0)
861 return ALL_REGS;
863 gcc_assert (regno < reg_info_size);
864 return (enum reg_class) reg_pref[regno].altclass;
867 /* Return the reg_class which is used by IRA for its allocation. */
868 enum reg_class
869 reg_allocno_class (int regno)
871 if (reg_pref == 0)
872 return NO_REGS;
874 gcc_assert (regno < reg_info_size);
875 return (enum reg_class) reg_pref[regno].allocnoclass;
880 /* Allocate space for reg info and initilize it. */
881 static void
882 allocate_reg_info (void)
884 int i;
886 max_regno_since_last_resize = max_reg_num ();
887 reg_info_size = max_regno_since_last_resize * 3 / 2 + 1;
888 gcc_assert (! reg_pref && ! reg_renumber);
889 reg_renumber = XNEWVEC (short, reg_info_size);
890 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
891 memset (reg_renumber, -1, reg_info_size * sizeof (short));
892 for (i = 0; i < reg_info_size; i++)
894 reg_pref[i].prefclass = GENERAL_REGS;
895 reg_pref[i].altclass = ALL_REGS;
896 reg_pref[i].allocnoclass = GENERAL_REGS;
901 /* Resize reg info. The new elements will be initialized. Return TRUE
902 if new pseudos were added since the last call. */
903 bool
904 resize_reg_info (void)
906 int old, i;
907 bool change_p;
909 if (reg_pref == NULL)
911 allocate_reg_info ();
912 return true;
914 change_p = max_regno_since_last_resize != max_reg_num ();
915 max_regno_since_last_resize = max_reg_num ();
916 if (reg_info_size >= max_reg_num ())
917 return change_p;
918 old = reg_info_size;
919 reg_info_size = max_reg_num () * 3 / 2 + 1;
920 gcc_assert (reg_pref && reg_renumber);
921 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
922 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
923 memset (reg_pref + old, -1,
924 (reg_info_size - old) * sizeof (struct reg_pref));
925 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
926 for (i = old; i < reg_info_size; i++)
928 reg_pref[i].prefclass = GENERAL_REGS;
929 reg_pref[i].altclass = ALL_REGS;
930 reg_pref[i].allocnoclass = GENERAL_REGS;
932 return true;
936 /* Free up the space allocated by allocate_reg_info. */
937 void
938 free_reg_info (void)
940 if (reg_pref)
942 free (reg_pref);
943 reg_pref = NULL;
946 if (reg_renumber)
948 free (reg_renumber);
949 reg_renumber = NULL;
953 /* Initialize some global data for this pass. */
954 static unsigned int
955 reginfo_init (void)
957 if (df)
958 df_compute_regs_ever_live (true);
960 /* This prevents dump_reg_info from losing if called
961 before reginfo is run. */
962 reg_pref = NULL;
963 reg_info_size = max_regno_since_last_resize = 0;
964 /* No more global register variables may be declared. */
965 no_global_reg_vars = 1;
966 return 1;
969 namespace {
971 const pass_data pass_data_reginfo_init =
973 RTL_PASS, /* type */
974 "reginfo", /* name */
975 OPTGROUP_NONE, /* optinfo_flags */
976 TV_NONE, /* tv_id */
977 0, /* properties_required */
978 0, /* properties_provided */
979 0, /* properties_destroyed */
980 0, /* todo_flags_start */
981 0, /* todo_flags_finish */
984 class pass_reginfo_init : public rtl_opt_pass
986 public:
987 pass_reginfo_init (gcc::context *ctxt)
988 : rtl_opt_pass (pass_data_reginfo_init, ctxt)
991 /* opt_pass methods: */
992 virtual unsigned int execute (function *) { return reginfo_init (); }
994 }; // class pass_reginfo_init
996 } // anon namespace
998 rtl_opt_pass *
999 make_pass_reginfo_init (gcc::context *ctxt)
1001 return new pass_reginfo_init (ctxt);
1006 /* Set up preferred, alternate, and allocno classes for REGNO as
1007 PREFCLASS, ALTCLASS, and ALLOCNOCLASS. */
1008 void
1009 setup_reg_classes (int regno,
1010 enum reg_class prefclass, enum reg_class altclass,
1011 enum reg_class allocnoclass)
1013 if (reg_pref == NULL)
1014 return;
1015 gcc_assert (reg_info_size >= max_reg_num ());
1016 reg_pref[regno].prefclass = prefclass;
1017 reg_pref[regno].altclass = altclass;
1018 reg_pref[regno].allocnoclass = allocnoclass;
1022 /* This is the `regscan' pass of the compiler, run just before cse and
1023 again just before loop. It finds the first and last use of each
1024 pseudo-register. */
1026 static void reg_scan_mark_refs (rtx, rtx_insn *);
1028 void
1029 reg_scan (rtx_insn *f, unsigned int nregs ATTRIBUTE_UNUSED)
1031 rtx_insn *insn;
1033 timevar_push (TV_REG_SCAN);
1035 for (insn = f; insn; insn = NEXT_INSN (insn))
1036 if (INSN_P (insn))
1038 reg_scan_mark_refs (PATTERN (insn), insn);
1039 if (REG_NOTES (insn))
1040 reg_scan_mark_refs (REG_NOTES (insn), insn);
1043 timevar_pop (TV_REG_SCAN);
1047 /* X is the expression to scan. INSN is the insn it appears in.
1048 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1049 We should only record information for REGs with numbers
1050 greater than or equal to MIN_REGNO. */
1051 static void
1052 reg_scan_mark_refs (rtx x, rtx_insn *insn)
1054 enum rtx_code code;
1055 rtx dest;
1056 rtx note;
1058 if (!x)
1059 return;
1060 code = GET_CODE (x);
1061 switch (code)
1063 case CONST:
1064 CASE_CONST_ANY:
1065 case CC0:
1066 case PC:
1067 case SYMBOL_REF:
1068 case LABEL_REF:
1069 case ADDR_VEC:
1070 case ADDR_DIFF_VEC:
1071 case REG:
1072 return;
1074 case EXPR_LIST:
1075 if (XEXP (x, 0))
1076 reg_scan_mark_refs (XEXP (x, 0), insn);
1077 if (XEXP (x, 1))
1078 reg_scan_mark_refs (XEXP (x, 1), insn);
1079 break;
1081 case INSN_LIST:
1082 case INT_LIST:
1083 if (XEXP (x, 1))
1084 reg_scan_mark_refs (XEXP (x, 1), insn);
1085 break;
1087 case CLOBBER:
1088 if (MEM_P (XEXP (x, 0)))
1089 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1090 break;
1092 case SET:
1093 /* Count a set of the destination if it is a register. */
1094 for (dest = SET_DEST (x);
1095 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1096 || GET_CODE (dest) == ZERO_EXTRACT;
1097 dest = XEXP (dest, 0))
1100 /* If this is setting a pseudo from another pseudo or the sum of a
1101 pseudo and a constant integer and the other pseudo is known to be
1102 a pointer, set the destination to be a pointer as well.
1104 Likewise if it is setting the destination from an address or from a
1105 value equivalent to an address or to the sum of an address and
1106 something else.
1108 But don't do any of this if the pseudo corresponds to a user
1109 variable since it should have already been set as a pointer based
1110 on the type. */
1112 if (REG_P (SET_DEST (x))
1113 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1114 /* If the destination pseudo is set more than once, then other
1115 sets might not be to a pointer value (consider access to a
1116 union in two threads of control in the presence of global
1117 optimizations). So only set REG_POINTER on the destination
1118 pseudo if this is the only set of that pseudo. */
1119 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1120 && ! REG_USERVAR_P (SET_DEST (x))
1121 && ! REG_POINTER (SET_DEST (x))
1122 && ((REG_P (SET_SRC (x))
1123 && REG_POINTER (SET_SRC (x)))
1124 || ((GET_CODE (SET_SRC (x)) == PLUS
1125 || GET_CODE (SET_SRC (x)) == LO_SUM)
1126 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1127 && REG_P (XEXP (SET_SRC (x), 0))
1128 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1129 || GET_CODE (SET_SRC (x)) == CONST
1130 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1131 || GET_CODE (SET_SRC (x)) == LABEL_REF
1132 || (GET_CODE (SET_SRC (x)) == HIGH
1133 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1134 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1135 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1136 || ((GET_CODE (SET_SRC (x)) == PLUS
1137 || GET_CODE (SET_SRC (x)) == LO_SUM)
1138 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1139 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1140 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1141 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1142 && (GET_CODE (XEXP (note, 0)) == CONST
1143 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1144 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1145 REG_POINTER (SET_DEST (x)) = 1;
1147 /* If this is setting a register from a register or from a simple
1148 conversion of a register, propagate REG_EXPR. */
1149 if (REG_P (dest) && !REG_ATTRS (dest))
1150 set_reg_attrs_from_value (dest, SET_SRC (x));
1152 /* ... fall through ... */
1154 default:
1156 const char *fmt = GET_RTX_FORMAT (code);
1157 int i;
1158 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1160 if (fmt[i] == 'e')
1161 reg_scan_mark_refs (XEXP (x, i), insn);
1162 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1164 int j;
1165 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1166 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1174 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1175 is also in C2. */
1177 reg_class_subset_p (reg_class_t c1, reg_class_t c2)
1179 return (c1 == c2
1180 || c2 == ALL_REGS
1181 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1182 reg_class_contents[(int) c2]));
1185 /* Return nonzero if there is a register that is in both C1 and C2. */
1187 reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1189 return (c1 == c2
1190 || c1 == ALL_REGS
1191 || c2 == ALL_REGS
1192 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1193 reg_class_contents[(int) c2]));
1197 inline hashval_t
1198 simplifiable_subregs_hasher::hash (const simplifiable_subreg *value)
1200 return value->shape.unique_id ();
1203 inline bool
1204 simplifiable_subregs_hasher::equal (const simplifiable_subreg *value,
1205 const subreg_shape *compare)
1207 return value->shape == *compare;
1210 inline simplifiable_subreg::simplifiable_subreg (const subreg_shape &shape_in)
1211 : shape (shape_in)
1213 CLEAR_HARD_REG_SET (simplifiable_regs);
1216 /* Return the set of hard registers that are able to form the subreg
1217 described by SHAPE. */
1219 const HARD_REG_SET &
1220 simplifiable_subregs (const subreg_shape &shape)
1222 if (!this_target_hard_regs->x_simplifiable_subregs)
1223 this_target_hard_regs->x_simplifiable_subregs
1224 = new hash_table <simplifiable_subregs_hasher> (30);
1225 simplifiable_subreg **slot
1226 = (this_target_hard_regs->x_simplifiable_subregs
1227 ->find_slot_with_hash (&shape, shape.unique_id (), INSERT));
1229 if (!*slot)
1231 simplifiable_subreg *info = new simplifiable_subreg (shape);
1232 for (unsigned int i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1233 if (HARD_REGNO_MODE_OK (i, shape.inner_mode)
1234 && simplify_subreg_regno (i, shape.inner_mode, shape.offset,
1235 shape.outer_mode) >= 0)
1236 SET_HARD_REG_BIT (info->simplifiable_regs, i);
1237 *slot = info;
1239 return (*slot)->simplifiable_regs;
1242 /* Passes for keeping and updating info about modes of registers
1243 inside subregisters. */
1245 static HARD_REG_SET **valid_mode_changes;
1246 static obstack valid_mode_changes_obstack;
1248 /* Restrict the choice of register for SUBREG_REG (SUBREG) based
1249 on information about SUBREG.
1251 If PARTIAL_DEF, SUBREG is a partial definition of a multipart inner
1252 register and we want to ensure that the other parts of the inner
1253 register are correctly preserved. If !PARTIAL_DEF we need to
1254 ensure that SUBREG itself can be formed. */
1256 static void
1257 record_subregs_of_mode (rtx subreg, bool partial_def)
1259 unsigned int regno;
1261 if (!REG_P (SUBREG_REG (subreg)))
1262 return;
1264 regno = REGNO (SUBREG_REG (subreg));
1265 if (regno < FIRST_PSEUDO_REGISTER)
1266 return;
1268 subreg_shape shape (shape_of_subreg (subreg));
1269 if (partial_def)
1271 /* The number of independently-accessible SHAPE.outer_mode values
1272 in SHAPE.inner_mode is GET_MODE_SIZE (SHAPE.inner_mode) / SIZE.
1273 We need to check that the assignment will preserve all the other
1274 SIZE-byte chunks in the inner register besides the one that
1275 includes SUBREG.
1277 In practice it is enough to check whether an equivalent
1278 SHAPE.inner_mode value in an adjacent SIZE-byte chunk can be formed.
1279 If the underlying registers are small enough, both subregs will
1280 be valid. If the underlying registers are too large, one of the
1281 subregs will be invalid.
1283 This relies on the fact that we've already been passed
1284 SUBREG with PARTIAL_DEF set to false. */
1285 unsigned int size = MAX (REGMODE_NATURAL_SIZE (shape.inner_mode),
1286 GET_MODE_SIZE (shape.outer_mode));
1287 gcc_checking_assert (size < GET_MODE_SIZE (shape.inner_mode));
1288 if (shape.offset >= size)
1289 shape.offset -= size;
1290 else
1291 shape.offset += size;
1294 if (valid_mode_changes[regno])
1295 AND_HARD_REG_SET (*valid_mode_changes[regno],
1296 simplifiable_subregs (shape));
1297 else
1299 valid_mode_changes[regno]
1300 = XOBNEW (&valid_mode_changes_obstack, HARD_REG_SET);
1301 COPY_HARD_REG_SET (*valid_mode_changes[regno],
1302 simplifiable_subregs (shape));
1306 /* Call record_subregs_of_mode for all the subregs in X. */
1307 static void
1308 find_subregs_of_mode (rtx x)
1310 enum rtx_code code = GET_CODE (x);
1311 const char * const fmt = GET_RTX_FORMAT (code);
1312 int i;
1314 if (code == SUBREG)
1315 record_subregs_of_mode (x, false);
1317 /* Time for some deep diving. */
1318 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1320 if (fmt[i] == 'e')
1321 find_subregs_of_mode (XEXP (x, i));
1322 else if (fmt[i] == 'E')
1324 int j;
1325 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1326 find_subregs_of_mode (XVECEXP (x, i, j));
1331 void
1332 init_subregs_of_mode (void)
1334 basic_block bb;
1335 rtx_insn *insn;
1337 gcc_obstack_init (&valid_mode_changes_obstack);
1338 valid_mode_changes = XCNEWVEC (HARD_REG_SET *, max_reg_num ());
1340 FOR_EACH_BB_FN (bb, cfun)
1341 FOR_BB_INSNS (bb, insn)
1342 if (NONDEBUG_INSN_P (insn))
1344 find_subregs_of_mode (PATTERN (insn));
1345 df_ref def;
1346 FOR_EACH_INSN_DEF (def, insn)
1347 if (DF_REF_FLAGS_IS_SET (def, DF_REF_PARTIAL)
1348 && df_read_modify_subreg_p (DF_REF_REG (def)))
1349 record_subregs_of_mode (DF_REF_REG (def), true);
1353 const HARD_REG_SET *
1354 valid_mode_changes_for_regno (unsigned int regno)
1356 return valid_mode_changes[regno];
1359 void
1360 finish_subregs_of_mode (void)
1362 XDELETEVEC (valid_mode_changes);
1363 obstack_free (&valid_mode_changes_obstack, NULL);
1366 /* Free all data attached to the structure. This isn't a destructor because
1367 we don't want to run on exit. */
1369 void
1370 target_hard_regs::finalize ()
1372 delete x_simplifiable_subregs;