| blob | 46c4881f7fcb28e5ab5f7091cf16466d30d0086f |
1 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
3 * config/i386/i386-opts.h (indirect_branch): New.
4 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
5 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
6 with local indirect jump when converting indirect call and jump.
7 (ix86_set_indirect_branch_type): New.
8 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
9 (indirectlabelno): New.
10 (indirect_thunk_needed): Likewise.
11 (indirect_thunk_bnd_needed): Likewise.
12 (indirect_thunks_used): Likewise.
13 (indirect_thunks_bnd_used): Likewise.
14 (INDIRECT_LABEL): Likewise.
15 (indirect_thunk_name): Likewise.
16 (output_indirect_thunk): Likewise.
17 (output_indirect_thunk_function): Likewise.
18 (ix86_output_indirect_branch): Likewise.
19 (ix86_output_indirect_jmp): Likewise.
20 (ix86_code_end): Call output_indirect_thunk_function if needed.
21 (ix86_output_call_insn): Call ix86_output_indirect_branch if
22 needed.
23 (ix86_handle_fndecl_attribute): Handle indirect_branch.
24 (ix86_attribute_table): Add indirect_branch.
25 * config/i386/i386.h (machine_function): Add indirect_branch_type
26 and has_local_indirect_jump.
27 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
28 to true.
29 (tablejump): Likewise.
30 (*indirect_jump): Use ix86_output_indirect_jmp.
31 (*tablejump_1): Likewise.
32 (simple_return_indirect_internal): Likewise.
33 * config/i386/i386.opt (mindirect-branch=): New option.
34 (indirect_branch): New.
35 (keep): Likewise.
36 (thunk): Likewise.
37 (thunk-inline): Likewise.
38 (thunk-extern): Likewise.
39 * doc/extend.texi: Document indirect_branch function attribute.
40 * doc/invoke.texi: Document -mindirect-branch= option.
42 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
44 PR ipa/83051
45 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
47 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
49 * ipa-inline.c (want_inline_small_function_p): Return false if
50 inlining has already failed with CIF_FINAL_ERROR.
51 (update_caller_keys): Call want_inline_small_function_p before
52 can_inline_edge_p.
53 (update_callee_keys): Likewise.
55 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
57 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
58 New function.
59 (rs6000_quadword_masked_address_p): Likewise.
60 (quad_aligned_load_p): Likewise.
61 (quad_aligned_store_p): Likewise.
62 (const_load_sequence_p): Add comment to describe the outer-most loop.
63 (mimic_memory_attributes_and_flags): New function.
64 (rs6000_gen_stvx): Likewise.
65 (replace_swapped_aligned_store): Likewise.
66 (rs6000_gen_lvx): Likewise.
67 (replace_swapped_aligned_load): Likewise.
68 (replace_swapped_load_constant): Capitalize argument name in
69 comment describing this function.
70 (rs6000_analyze_swaps): Add a third pass to search for vector loads
71 and stores that access quad-word aligned addresses and replace
72 with stvx or lvx instructions when appropriate.
73 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
74 New function prototype.
75 (rs6000_quadword_masked_address_p): Likewise.
76 (rs6000_gen_lvx): Likewise.
77 (rs6000_gen_stvx): Likewise.
78 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
79 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
80 when memory address is aligned.
81 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
82 this split to select lvx instruction when memory address is aligned.
83 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
84 instruction when memory address is aligned.
85 (*vsx_le_perm_load_v16qi): Likewise.
86 (four unnamed splitters): Modify to select the stvx instruction
87 when memory is aligned.
89 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
91 * predict.c (determine_unlikely_bbs): Handle correctly BBs
92 which appears in the queue multiple times.
94 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
95 Alan Hayward <alan.hayward@arm.com>
96 David Sherwood <david.sherwood@arm.com>
98 * tree-vectorizer.h (vec_lower_bound): New structure.
99 (_loop_vec_info): Add check_nonzero and lower_bounds.
100 (LOOP_VINFO_CHECK_NONZERO): New macro.
101 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
102 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
103 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
104 fields. Make seg_len the distance travelled, not including the
105 access size.
106 (dr_direction_indicator): Declare.
107 (dr_zero_step_indicator): Likewise.
108 (dr_known_forward_stride_p): Likewise.
109 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
110 tree-ssanames.h.
111 (runtime_alias_check_p): Allow runtime alias checks with
112 variable strides.
113 (operator ==): Compare access_size and align.
114 (prune_runtime_alias_test_list): Rework for new distinction between
115 the access_size and seg_len.
116 (create_intersect_range_checks_index): Likewise. Cope with polynomial
117 segment lengths.
118 (get_segment_min_max): New function.
119 (create_intersect_range_checks): Use it.
120 (dr_step_indicator): New function.
121 (dr_direction_indicator): Likewise.
122 (dr_zero_step_indicator): Likewise.
123 (dr_known_forward_stride_p): Likewise.
124 * tree-loop-distribution.c (data_ref_segment_size): Return
125 DR_STEP * (niters - 1).
126 (compute_alias_check_pairs): Update call to the dr_with_seg_len
127 constructor.
128 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
129 (vect_preserves_scalar_order_p): New function, split out from...
130 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
131 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
132 (vect_vfa_access_size): New function.
133 (vect_vfa_align): Likewise.
134 (vect_compile_time_alias): Take access_size_a and access_b arguments.
135 (dump_lower_bound): New function.
136 (vect_check_lower_bound): Likewise.
137 (vect_small_gap_p): Likewise.
138 (vectorizable_with_step_bound_p): Likewise.
139 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
140 depencies if the vectorization factor is 1. Convert the checks
141 for nonzero steps into checks on the bounds of DR_STEP. Try using
142 a bunds check for variable steps if the minimum required step is
143 relatively small. Update calls to the dr_with_seg_len
144 constructor and to vect_compile_time_alias.
145 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
146 function.
147 (vect_loop_versioning): Call it.
148 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
149 when retrying.
150 (vect_estimate_min_profitable_iters): Account for any bounds checks.
152 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
153 Alan Hayward <alan.hayward@arm.com>
154 David Sherwood <david.sherwood@arm.com>
156 * doc/sourcebuild.texi (vect_scatter_store): Document.
157 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
158 optabs.
159 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
160 Document.
161 * genopinit.c (main): Add supports_vec_scatter_store and
162 supports_vec_scatter_store_cached to target_optabs.
163 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
164 IFN_MASK_SCATTER_STORE.
165 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
166 functions.
167 * internal-fn.h (internal_store_fn_p): Declare.
168 (internal_fn_stored_value_index): Likewise.
169 * internal-fn.c (scatter_store_direct): New macro.
170 (expand_scatter_store_optab_fn): New function.
171 (direct_scatter_store_optab_supported_p): New macro.
172 (internal_store_fn_p): New function.
173 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
174 IFN_MASK_SCATTER_STORE.
175 (internal_fn_mask_index): Likewise.
176 (internal_fn_stored_value_index): New function.
177 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
178 for scatter stores.
179 * optabs-query.h (supports_vec_scatter_store_p): Declare.
180 * optabs-query.c (supports_vec_scatter_store_p): New function.
181 * tree-vectorizer.h (vect_get_store_rhs): Declare.
182 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
183 true for scatter stores.
184 (vect_gather_scatter_fn_p): Handle scatter stores too.
185 (vect_check_gather_scatter): Consider using scatter stores if
186 supports_vec_scatter_store_p.
187 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
188 scatter stores too.
189 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
190 internal_fn_stored_value_index.
191 (check_load_store_masking): Handle scatter stores too.
192 (vect_get_store_rhs): Make public.
193 (vectorizable_call): Use internal_store_fn_p.
194 (vectorizable_store): Handle scatter store internal functions.
195 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
196 when deciding whether the end of the group has been reached.
197 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
198 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
199 (mask_scatter_store<mode>): New insns.
201 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
202 Alan Hayward <alan.hayward@arm.com>
203 David Sherwood <david.sherwood@arm.com>
205 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
206 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
207 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
208 function.
209 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
210 Use vect_truncate_gather_scatter_offset if we can't treat the
211 operation as a normal gather load or scatter store.
212 (get_group_load_store_type): Take the gather_scatter_info
213 as argument. Try using a gather load or scatter store for
214 single-element groups.
215 (get_load_store_type): Update calls to get_group_load_store_type
216 and vect_use_strided_gather_scatters_p.
218 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
219 Alan Hayward <alan.hayward@arm.com>
220 David Sherwood <david.sherwood@arm.com>
222 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
223 optional tree argument.
224 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
225 null target hooks.
226 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
227 but continue to use the current value as a fallback.
228 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
229 to compare the updates.
230 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
231 (get_load_store_type): Use it when handling a strided access.
232 (vect_get_strided_load_store_ops): New function.
233 (vect_get_data_ptr_increment): Likewise.
234 (vectorizable_load): Handle strided gather loads. Always pass
235 a step to vect_create_data_ref_ptr and bump_vector_ptr.
237 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
238 Alan Hayward <alan.hayward@arm.com>
239 David Sherwood <david.sherwood@arm.com>
241 * doc/md.texi (gather_load@var{m}): Document.
242 (mask_gather_load@var{m}): Likewise.
243 * genopinit.c (main): Add supports_vec_gather_load and
244 supports_vec_gather_load_cached to target_optabs.
245 * optabs-tree.c (init_tree_optimization_optabs): Use
246 ggc_cleared_alloc to allocate target_optabs.
247 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
248 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
249 functions.
250 * internal-fn.h (internal_load_fn_p): Declare.
251 (internal_gather_scatter_fn_p): Likewise.
252 (internal_fn_mask_index): Likewise.
253 (internal_gather_scatter_fn_supported_p): Likewise.
254 * internal-fn.c (gather_load_direct): New macro.
255 (expand_gather_load_optab_fn): New function.
256 (direct_gather_load_optab_supported_p): New macro.
257 (direct_internal_fn_optab): New function.
258 (internal_load_fn_p): Likewise.
259 (internal_gather_scatter_fn_p): Likewise.
260 (internal_fn_mask_index): Likewise.
261 (internal_gather_scatter_fn_supported_p): Likewise.
262 * optabs-query.c (supports_at_least_one_mode_p): New function.
263 (supports_vec_gather_load_p): Likewise.
264 * optabs-query.h (supports_vec_gather_load_p): Declare.
265 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
266 and memory_type field.
267 (NUM_PATTERNS): Bump to 15.
268 * tree-vect-data-refs.c: Include internal-fn.h.
269 (vect_gather_scatter_fn_p): New function.
270 (vect_describe_gather_scatter_call): Likewise.
271 (vect_check_gather_scatter): Try using internal functions for
272 gather loads. Recognize existing calls to a gather load function.
273 (vect_analyze_data_refs): Consider using gather loads if
274 supports_vec_gather_load_p.
275 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
276 (vect_get_gather_scatter_offset_type): Likewise.
277 (vect_convert_mask_for_vectype): Likewise.
278 (vect_add_conversion_to_patterm): Likewise.
279 (vect_try_gather_scatter_pattern): Likewise.
280 (vect_recog_gather_scatter_pattern): New pattern recognizer.
281 (vect_vect_recog_func_ptrs): Add it.
282 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
283 internal_fn_mask_index and internal_gather_scatter_fn_p.
284 (check_load_store_masking): Take the gather_scatter_info as an
285 argument and handle gather loads.
286 (vect_get_gather_scatter_ops): New function.
287 (vectorizable_call): Check internal_load_fn_p.
288 (vectorizable_load): Likewise. Handle gather load internal
289 functions.
290 (vectorizable_store): Update call to check_load_store_masking.
291 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
292 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
293 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
294 (aarch64_gather_scale_operand_d): New predicates.
295 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
296 (mask_gather_load<mode>): New insns.
298 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
299 Alan Hayward <alan.hayward@arm.com>
300 David Sherwood <david.sherwood@arm.com>
302 * optabs.def (fold_left_plus_optab): New optab.
303 * doc/md.texi (fold_left_plus_@var{m}): Document.
304 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
305 * internal-fn.c (fold_left_direct): Define.
306 (expand_fold_left_optab_fn): Likewise.
307 (direct_fold_left_optab_supported_p): Likewise.
308 * fold-const-call.c (fold_const_fold_left): New function.
309 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
310 * tree-parloops.c (valid_reduction_p): New function.
311 (gather_scalar_reductions): Use it.
312 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
313 (vect_finish_replace_stmt): Declare.
314 * tree-vect-loop.c (fold_left_reduction_fn): New function.
315 (needs_fold_left_reduction_p): New function, split out from...
316 (vect_is_simple_reduction): ...here. Accept reductions that
317 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
318 (vect_force_simple_reduction): Also store the reduction type in
319 the assignment's STMT_VINFO_REDUC_TYPE.
320 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
321 (merge_with_identity): New function.
322 (vect_expand_fold_left): Likewise.
323 (vectorize_fold_left_reduction): Likewise.
324 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
325 scalar phi in place for it. Check for target support and reject
326 cases that would reassociate the operation. Defer the transform
327 phase to vectorize_fold_left_reduction.
328 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
329 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
330 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
332 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
334 * tree-if-conv.c (predicate_mem_writes): Remove redundant
335 call to ifc_temp_var.
337 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
338 Alan Hayward <alan.hayward@arm.com>
339 David Sherwood <david.sherwood@arm.com>
341 * target.def (legitimize_address_displacement): Take the original
342 offset as a poly_int.
343 * targhooks.h (default_legitimize_address_displacement): Update
344 accordingly.
345 * targhooks.c (default_legitimize_address_displacement): Likewise.
346 * doc/tm.texi: Regenerate.
347 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
348 as an argument, moving assert of ad->disp == ad->disp_term to...
349 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
350 Try calling targetm.legitimize_address_displacement before expanding
351 the address rather than afterwards, and adjust for the new interface.
352 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
353 Match the new hook interface. Handle SVE addresses.
354 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
355 new hook interface.
357 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
359 * Makefile.in (OBJS): Add early-remat.o.
360 * target.def (select_early_remat_modes): New hook.
361 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
362 * doc/tm.texi: Regenerate.
363 * targhooks.h (default_select_early_remat_modes): Declare.
364 * targhooks.c (default_select_early_remat_modes): New function.
365 * timevar.def (TV_EARLY_REMAT): New timevar.
366 * passes.def (pass_early_remat): New pass.
367 * tree-pass.h (make_pass_early_remat): Declare.
368 * early-remat.c: New file.
369 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
370 function.
371 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
373 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
374 Alan Hayward <alan.hayward@arm.com>
375 David Sherwood <david.sherwood@arm.com>
377 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
378 vfm1 with a bound_epilog parameter.
379 (vect_do_peeling): Update calls accordingly, and move the prologue
380 call earlier in the function. Treat the base bound_epilog as 0 for
381 fully-masked loops and retain vf - 1 for other loops. Add 1 to
382 this base when peeling for gaps.
383 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
384 with fully-masked loops.
385 (vect_estimate_min_profitable_iters): Handle the single peeled
386 iteration in that case.
388 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
389 Alan Hayward <alan.hayward@arm.com>
390 David Sherwood <david.sherwood@arm.com>
392 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
393 single-element interleaving even if the size is not a power of 2.
394 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
395 accesses for single-element interleaving if the group size is
396 not a power of 2.
398 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
399 Alan Hayward <alan.hayward@arm.com>
400 David Sherwood <david.sherwood@arm.com>
402 * doc/md.texi (fold_extract_last_@var{m}): Document.
403 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
404 * optabs.def (fold_extract_last_optab): New optab.
405 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
406 * internal-fn.c (fold_extract_direct): New macro.
407 (expand_fold_extract_optab_fn): Likewise.
408 (direct_fold_extract_optab_supported_p): Likewise.
409 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
410 * tree-vect-loop.c (vect_model_reduction_cost): Handle
411 EXTRACT_LAST_REDUCTION.
412 (get_initial_def_for_reduction): Do not create an initial vector
413 for EXTRACT_LAST_REDUCTION reductions.
414 (vectorizable_reduction): Leave the scalar phi in place for
415 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
416 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
417 epilogue code for EXTRACT_LAST_REDUCTION and defer the
418 transform phase to vectorizable_condition.
419 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
420 split out from...
421 (vect_finish_stmt_generation): ...here.
422 (vect_finish_replace_stmt): New function.
423 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
424 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
425 pattern.
426 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
428 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
429 Alan Hayward <alan.hayward@arm.com>
430 David Sherwood <david.sherwood@arm.com>
432 * doc/md.texi (extract_last_@var{m}): Document.
433 * optabs.def (extract_last_optab): New optab.
434 * internal-fn.def (EXTRACT_LAST): New internal function.
435 * internal-fn.c (cond_unary_direct): New macro.
436 (expand_cond_unary_optab_fn): Likewise.
437 (direct_cond_unary_optab_supported_p): Likewise.
438 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
439 loops using EXTRACT_LAST.
440 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
441 (extract_last_<mode>): ...this optab.
442 (vec_extract<mode><Vel>): Update accordingly.
444 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
445 Alan Hayward <alan.hayward@arm.com>
446 David Sherwood <david.sherwood@arm.com>
448 * target.def (empty_mask_is_expensive): New hook.
449 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
450 * doc/tm.texi: Regenerate.
451 * targhooks.h (default_empty_mask_is_expensive): Declare.
452 * targhooks.c (default_empty_mask_is_expensive): New function.
453 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
454 if the target says that empty masks are expensive.
455 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
456 New function.
457 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
459 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
460 Alan Hayward <alan.hayward@arm.com>
461 David Sherwood <david.sherwood@arm.com>
463 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
464 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
465 (vect_use_loop_mask_for_alignment_p): New function.
466 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
467 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
468 niters_skip argument. Make sure that the first niters_skip elements
469 of the first iteration are inactive.
470 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
471 Update call to vect_set_loop_masks_directly.
472 (get_misalign_in_elems): New function, split out from...
473 (vect_gen_prolog_loop_niters): ...here.
474 (vect_update_init_of_dr): Take a code argument that specifies whether
475 the adjustment should be added or subtracted.
476 (vect_update_init_of_drs): Likewise.
477 (vect_prepare_for_masked_peels): New function.
478 (vect_do_peeling): Skip prologue peeling if we're using a mask
479 instead. Update call to vect_update_inits_of_drs.
480 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
481 mask_skip_niters.
482 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
483 alignment. Do not include the number of peeled iterations in
484 the minimum threshold in that case.
485 (vectorizable_induction): Adjust the start value down by
486 LOOP_VINFO_MASK_SKIP_NITERS iterations.
487 (vect_transform_loop): Call vect_prepare_for_masked_peels.
488 Take the number of skipped iterations into account when calculating
489 the loop bounds.
490 * tree-vect-stmts.c (vect_gen_while_not): New function.
492 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
493 Alan Hayward <alan.hayward@arm.com>
494 David Sherwood <david.sherwood@arm.com>
496 * doc/sourcebuild.texi (vect_fully_masked): Document.
497 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
498 default value to 0.
499 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
500 split out from...
501 (vect_analyze_loop_2): ...here. Don't check the vectorization
502 factor against the number of loop iterations if the loop is
503 fully-masked.
505 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
506 Alan Hayward <alan.hayward@arm.com>
507 David Sherwood <david.sherwood@arm.com>
509 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
510 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
511 (dump_groups): Update accordingly.
512 (iv_use::mem_type): New member variable.
513 (address_p): New function.
514 (record_use): Add a mem_type argument and initialize the new
515 mem_type field.
516 (record_group_use): Add a mem_type argument. Use address_p.
517 Remove obsolete null checks of base_object. Update call to record_use.
518 (find_interesting_uses_op): Update call to record_group_use.
519 (find_interesting_uses_cond): Likewise.
520 (find_interesting_uses_address): Likewise.
521 (get_mem_type_for_internal_fn): New function.
522 (find_address_like_use): Likewise.
523 (find_interesting_uses_stmt): Try find_address_like_use before
524 calling find_interesting_uses_op.
525 (addr_offset_valid_p): Use the iv mem_type field as the type
526 of the addressed memory.
527 (add_autoinc_candidates): Likewise.
528 (get_address_cost): Likewise.
529 (split_small_address_groups_p): Use address_p.
530 (split_address_groups): Likewise.
531 (add_iv_candidate_for_use): Likewise.
532 (autoinc_possible_for_pair): Likewise.
533 (rewrite_groups): Likewise.
534 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
535 (determine_group_iv_cost): Update after split of USE_ADDRESS.
536 (get_alias_ptr_type_for_ptr_address): New function.
537 (rewrite_use_address): Rewrite address uses in calls that were
538 identified by find_address_like_use.
540 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
541 Alan Hayward <alan.hayward@arm.com>
542 David Sherwood <david.sherwood@arm.com>
544 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
545 TARGET_MEM_REFs.
546 * gimple-expr.h (is_gimple_addressable: Likewise.
547 * gimple-expr.c (is_gimple_address): Likewise.
548 * internal-fn.c (expand_call_mem_ref): New function.
549 (expand_mask_load_optab_fn): Use it.
550 (expand_mask_store_optab_fn): Likewise.
552 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
553 Alan Hayward <alan.hayward@arm.com>
554 David Sherwood <david.sherwood@arm.com>
556 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
557 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
558 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
559 (cond_umax@var{mode}): Document.
560 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
561 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
562 (cond_umin_optab, cond_umax_optab): New optabs.
563 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
564 (COND_IOR, COND_XOR): New internal functions.
565 * internal-fn.h (get_conditional_internal_fn): Declare.
566 * internal-fn.c (cond_binary_direct): New macro.
567 (expand_cond_binary_optab_fn): Likewise.
568 (direct_cond_binary_optab_supported_p): Likewise.
569 (get_conditional_internal_fn): New function.
570 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
571 Cope with reduction statements that are vectorized as calls rather
572 than assignments.
573 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
574 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
575 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
576 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
577 (UNSPEC_COND_EOR): New unspecs.
578 (optab): Add mappings for them.
579 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
580 (sve_int_op, sve_fp_op): New int attributes.
582 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
583 Alan Hayward <alan.hayward@arm.com>
584 David Sherwood <david.sherwood@arm.com>
586 * optabs.def (while_ult_optab): New optab.
587 * doc/md.texi (while_ult@var{m}@var{n}): Document.
588 * internal-fn.def (WHILE_ULT): New internal function.
589 * internal-fn.h (direct_internal_fn_supported_p): New override
590 that takes two types as argument.
591 * internal-fn.c (while_direct): New macro.
592 (expand_while_optab_fn): New function.
593 (convert_optab_supported_p): Likewise.
594 (direct_while_optab_supported_p): New macro.
595 * wide-int.h (wi::udiv_ceil): New function.
596 * tree-vectorizer.h (rgroup_masks): New structure.
597 (vec_loop_masks): New typedef.
598 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
599 and fully_masked_p.
600 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
601 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
602 (vect_max_vf): New function.
603 (slpeel_make_loop_iterate_ntimes): Delete.
604 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
605 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
606 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
607 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
608 internal-fn.h, stor-layout.h and optabs-query.h.
609 (vect_set_loop_mask): New function.
610 (add_preheader_seq): Likewise.
611 (add_header_seq): Likewise.
612 (interleave_supported_p): Likewise.
613 (vect_maybe_permute_loop_masks): Likewise.
614 (vect_set_loop_masks_directly): Likewise.
615 (vect_set_loop_condition_masked): Likewise.
616 (vect_set_loop_condition_unmasked): New function, split out from
617 slpeel_make_loop_iterate_ntimes.
618 (slpeel_make_loop_iterate_ntimes): Rename to..
619 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
620 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
621 (vect_do_peeling): Update call accordingly.
622 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
623 loops.
624 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
625 mask_compare_type, can_fully_mask_p and fully_masked_p.
626 (release_vec_loop_masks): New function.
627 (_loop_vec_info): Use it to free the loop masks.
628 (can_produce_all_loop_masks_p): New function.
629 (vect_get_max_nscalars_per_iter): Likewise.
630 (vect_verify_full_masking): Likewise.
631 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
632 retries, and free the mask rgroups before retrying. Check loop-wide
633 reasons for disallowing fully-masked loops. Make the final decision
634 about whether use a fully-masked loop or not.
635 (vect_estimate_min_profitable_iters): Do not assume that peeling
636 for the number of iterations will be needed for fully-masked loops.
637 (vectorizable_reduction): Disable fully-masked loops.
638 (vectorizable_live_operation): Likewise.
639 (vect_halve_mask_nunits): New function.
640 (vect_double_mask_nunits): Likewise.
641 (vect_record_loop_mask): Likewise.
642 (vect_get_loop_mask): Likewise.
643 (vect_transform_loop): Handle the case in which the final loop
644 iteration might handle a partial vector. Call vect_set_loop_condition
645 instead of slpeel_make_loop_iterate_ntimes.
646 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
647 (check_load_store_masking): New function.
648 (prepare_load_store_mask): Likewise.
649 (vectorizable_store): Handle fully-masked loops.
650 (vectorizable_load): Likewise.
651 (supportable_widening_operation): Use vect_halve_mask_nunits for
652 booleans.
653 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
654 (vect_gen_while): New function.
655 * config/aarch64/aarch64.md (umax<mode>3): New expander.
656 (aarch64_uqdec<mode>): New insn.
658 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
659 Alan Hayward <alan.hayward@arm.com>
660 David Sherwood <david.sherwood@arm.com>
662 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
663 (reduc_xor_scal_optab): New optabs.
664 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
665 (reduc_xor_scal_@var{m}): Document.
666 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
667 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
668 internal functions.
669 * fold-const-call.c (fold_const_call): Handle them.
670 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
671 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
672 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
673 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
674 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
675 (UNSPEC_XORV): New unspecs.
676 (optab): Add entries for them.
677 (BITWISEV): New int iterator.
678 (bit_reduc_op): New int attributes.
680 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
681 Alan Hayward <alan.hayward@arm.com>
682 David Sherwood <david.sherwood@arm.com>
684 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
685 * internal-fn.def (VEC_SHL_INSERT): New internal function.
686 * optabs.def (vec_shl_insert_optab): New optab.
687 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
688 (duplicate_and_interleave): Likewise.
689 * tree-vect-loop.c: Include internal-fn.h.
690 (neutral_op_for_slp_reduction): New function, split out from
691 get_initial_defs_for_reduction.
692 (get_initial_def_for_reduction): Handle option 2 for variable-length
693 vectors by loading the neutral value into a vector and then shifting
694 the initial value into element 0.
695 (get_initial_defs_for_reduction): Replace the code argument with
696 the neutral value calculated by neutral_op_for_slp_reduction.
697 Use gimple_build_vector for constant-length vectors.
698 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
699 but the first group_size elements have a neutral value.
700 Use duplicate_and_interleave otherwise.
701 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
702 Update call to get_initial_defs_for_reduction. Handle SLP
703 reductions for variable-length vectors by creating one vector
704 result for each scalar result, with the elements associated
705 with other scalar results stubbed out with the neutral value.
706 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
707 Require IFN_VEC_SHL_INSERT for double reductions on
708 variable-length vectors, or SLP reductions that have
709 a neutral value. Require can_duplicate_and_interleave_p
710 support for variable-length unchained SLP reductions if there
711 is no neutral value, such as for MIN/MAX reductions. Also require
712 the number of vector elements to be a multiple of the number of
713 SLP statements when doing variable-length unchained SLP reductions.
714 Update call to vect_create_epilog_for_reduction.
715 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
716 and remove initial values.
717 (duplicate_and_interleave): Make public.
718 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
719 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
721 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
722 Alan Hayward <alan.hayward@arm.com>
723 David Sherwood <david.sherwood@arm.com>
725 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
726 (can_duplicate_and_interleave_p): New function.
727 (vect_get_and_check_slp_defs): Take the vector of statements
728 rather than just the current one. Remove excess parentheses.
729 Restriction rejectinon of vect_constant_def and vect_external_def
730 for variable-length vectors to boolean types, or types for which
731 can_duplicate_and_interleave_p is false.
732 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
733 (duplicate_and_interleave): New function.
734 (vect_get_constant_vectors): Use gimple_build_vector for
735 constant-length vectors and suitable variable-length constant
736 vectors. Use duplicate_and_interleave for other variable-length
737 vectors. Don't defer the update when inserting new statements.
739 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
740 Alan Hayward <alan.hayward@arm.com>
741 David Sherwood <david.sherwood@arm.com>
743 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
744 min_profitable_iters doesn't go negative.
746 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
747 Alan Hayward <alan.hayward@arm.com>
748 David Sherwood <david.sherwood@arm.com>
750 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
751 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
752 * optabs.def (vec_mask_load_lanes_optab): New optab.
753 (vec_mask_store_lanes_optab): Likewise.
754 * internal-fn.def (MASK_LOAD_LANES): New internal function.
755 (MASK_STORE_LANES): Likewise.
756 * internal-fn.c (mask_load_lanes_direct): New macro.
757 (mask_store_lanes_direct): Likewise.
758 (expand_mask_load_optab_fn): Handle masked operations.
759 (expand_mask_load_lanes_optab_fn): New macro.
760 (expand_mask_store_optab_fn): Handle masked operations.
761 (expand_mask_store_lanes_optab_fn): New macro.
762 (direct_mask_load_lanes_optab_supported_p): Likewise.
763 (direct_mask_store_lanes_optab_supported_p): Likewise.
764 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
765 parameter.
766 (vect_load_lanes_supported): Likewise.
767 * tree-vect-data-refs.c (strip_conversion): New function.
768 (can_group_stmts_p): Likewise.
769 (vect_analyze_data_ref_accesses): Use it instead of checking
770 for a pair of assignments.
771 (vect_store_lanes_supported): Take a masked_p parameter.
772 (vect_load_lanes_supported): Likewise.
773 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
774 vect_store_lanes_supported and vect_load_lanes_supported.
775 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
776 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
777 parameter. Don't allow gaps for masked accesses.
778 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
779 and vect_load_lanes_supported.
780 (get_load_store_type): Take a masked_p parameter and update
781 call to get_group_load_store_type.
782 (vectorizable_store): Update call to get_load_store_type.
783 Handle IFN_MASK_STORE_LANES.
784 (vectorizable_load): Update call to get_load_store_type.
785 Handle IFN_MASK_LOAD_LANES.
787 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
788 Alan Hayward <alan.hayward@arm.com>
789 David Sherwood <david.sherwood@arm.com>
791 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
792 modes for SVE.
793 * config/aarch64/aarch64-protos.h
794 (aarch64_sve_struct_memory_operand_p): Declare.
795 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
796 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
797 (VPRED, vpred): Handle SVE structure modes.
798 * config/aarch64/constraints.md (Utx): New constraint.
799 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
800 (aarch64_sve_struct_nonimmediate_operand): New predicates.
801 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
802 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
803 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
804 structure modes. Split into pieces after RA.
805 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
806 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
807 New patterns.
808 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
809 SVE structure modes.
810 (aarch64_classify_address): Likewise.
811 (sizetochar): Move earlier in file.
812 (aarch64_print_operand): Handle SVE register lists.
813 (aarch64_array_mode): New function.
814 (aarch64_sve_struct_memory_operand_p): Likewise.
815 (TARGET_ARRAY_MODE): Redefine.
817 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
818 Alan Hayward <alan.hayward@arm.com>
819 David Sherwood <david.sherwood@arm.com>
821 * target.def (array_mode): New target hook.
822 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
823 * doc/tm.texi: Regenerate.
824 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
825 * hooks.c (hook_optmode_mode_uhwi_none): New function.
826 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
827 targetm.array_mode.
828 * stor-layout.c (mode_for_array): Likewise. Support polynomial
829 type sizes.
831 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
832 Alan Hayward <alan.hayward@arm.com>
833 David Sherwood <david.sherwood@arm.com>
835 * fold-const.c (fold_binary_loc): Check the argument types
836 rather than the result type when testing for a vector operation.
838 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
840 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
841 * doc/tm.texi: Regenerate.
843 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
844 Alan Hayward <alan.hayward@arm.com>
845 David Sherwood <david.sherwood@arm.com>
847 * doc/invoke.texi (-msve-vector-bits=): Document new option.
848 (sve): Document new AArch64 extension.
849 * doc/md.texi (w): Extend the description of the AArch64
850 constraint to include SVE vectors.
851 (Upl, Upa): Document new AArch64 predicate constraints.
852 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
853 enum.
854 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
855 (msve-vector-bits=): New option.
856 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
857 SVE when these are disabled.
858 (sve): New extension.
859 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
860 modes. Adjust their number of units based on aarch64_sve_vg.
861 (MAX_BITSIZE_MODE_ANY_MODE): Define.
862 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
863 aarch64_addr_query_type.
864 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
865 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
866 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
867 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
868 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
869 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
870 (aarch64_simd_imm_zero_p): Delete.
871 (aarch64_check_zero_based_sve_index_immediate): Declare.
872 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
873 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
874 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
875 (aarch64_sve_float_mul_immediate_p): Likewise.
876 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
877 rather than an rtx.
878 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
879 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
880 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
881 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
882 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
883 (aarch64_regmode_natural_size): Likewise.
884 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
885 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
886 left one place.
887 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
888 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
889 for VG and the SVE predicate registers.
890 (V_ALIASES): Add a "z"-prefixed alias.
891 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
892 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
893 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
894 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
895 (REG_CLASS_NAMES): Add entries for them.
896 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
897 and the predicate registers.
898 (aarch64_sve_vg): Declare.
899 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
900 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
901 (REGMODE_NATURAL_SIZE): Define.
902 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
903 SVE macros.
904 * config/aarch64/aarch64.c: Include cfgrtl.h.
905 (simd_immediate_info): Add a constructor for series vectors,
906 and an associated step field.
907 (aarch64_sve_vg): New variable.
908 (aarch64_dbx_register_number): Handle VG and the predicate registers.
909 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
910 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
911 (VEC_ANY_DATA, VEC_STRUCT): New constants.
912 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
913 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
914 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
915 (aarch64_get_mask_mode): New functions.
916 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
917 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
918 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
919 predicate modes and predicate registers. Explicitly restrict
920 GPRs to modes of 16 bytes or smaller. Only allow FP registers
921 to store a vector mode if it is recognized by
922 aarch64_classify_vector_mode.
923 (aarch64_regmode_natural_size): New function.
924 (aarch64_hard_regno_caller_save_mode): Return the original mode
925 for predicates.
926 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
927 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
928 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
929 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
930 functions.
931 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
932 does not overlap dest if the function is frame-related. Handle
933 SVE constants.
934 (aarch64_split_add_offset): New function.
935 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
936 them aarch64_add_offset.
937 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
938 and update call to aarch64_sub_sp.
939 (aarch64_add_cfa_expression): New function.
940 (aarch64_expand_prologue): Pass extra temporary registers to the
941 functions above. Handle the case in which we need to emit new
942 DW_CFA_expressions for registers that were originally saved
943 relative to the stack pointer, but now have to be expressed
944 relative to the frame pointer.
945 (aarch64_output_mi_thunk): Pass extra temporary registers to the
946 functions above.
947 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
948 IP0 and IP1 values for SVE frames.
949 (aarch64_expand_vec_series): New function.
950 (aarch64_expand_sve_widened_duplicate): Likewise.
951 (aarch64_expand_sve_const_vector): Likewise.
952 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
953 Handle SVE constants. Use emit_move_insn to move a force_const_mem
954 into the register, rather than emitting a SET directly.
955 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
956 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
957 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
958 (offset_9bit_signed_scaled_p): New functions.
959 (aarch64_replicate_bitmask_imm): New function.
960 (aarch64_bitmask_imm): Use it.
961 (aarch64_cannot_force_const_mem): Reject expressions involving
962 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
963 (aarch64_classify_index): Handle SVE indices, by requiring
964 a plain register index with a scale that matches the element size.
965 (aarch64_classify_address): Handle SVE addresses. Assert that
966 the mode of the address is VOIDmode or an integer mode.
967 Update call to aarch64_classify_symbol.
968 (aarch64_classify_symbolic_expression): Update call to
969 aarch64_classify_symbol.
970 (aarch64_const_vec_all_in_range_p): New function.
971 (aarch64_print_vector_float_operand): Likewise.
972 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
973 "vN" for FP registers with SVE modes. Handle (const ...) vectors
974 and the FP immediates 1.0 and 0.5.
975 (aarch64_print_address_internal): Handle SVE addresses.
976 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
977 (aarch64_regno_regclass): Handle predicate registers.
978 (aarch64_secondary_reload): Handle big-endian reloads of SVE
979 data modes.
980 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
981 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
982 (aarch64_convert_sve_vector_bits): New function.
983 (aarch64_override_options): Use it to handle -msve-vector-bits=.
984 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
985 rather than an rtx.
986 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
987 Handle SVE vector and predicate modes. Accept VL-based constants
988 that need only one temporary register, and VL offsets that require
989 no temporary registers.
990 (aarch64_conditional_register_usage): Mark the predicate registers
991 as fixed if SVE isn't available.
992 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
993 Return true for SVE vector and predicate modes.
994 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
995 rather than an unsigned int. Handle SVE modes.
996 (aarch64_preferred_simd_mode): Update call accordingly. Handle
997 SVE modes.
998 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
999 if SVE is enabled.
1000 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1001 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1002 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1003 (aarch64_sve_float_mul_immediate_p): New functions.
1004 (aarch64_sve_valid_immediate): New function.
1005 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1006 Explicitly reject structure modes. Check for INDEX constants.
1007 Handle PTRUE and PFALSE constants.
1008 (aarch64_check_zero_based_sve_index_immediate): New function.
1009 (aarch64_simd_imm_zero_p): Delete.
1010 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1011 vector modes. Accept constants in the range of CNT[BHWD].
1012 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1013 ask for an Advanced SIMD mode.
1014 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1015 (aarch64_simd_vector_alignment): Handle SVE predicates.
1016 (aarch64_vectorize_preferred_vector_alignment): New function.
1017 (aarch64_simd_vector_alignment_reachable): Use it instead of
1018 the vector size.
1019 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1020 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1021 functions.
1022 (MAX_VECT_LEN): Delete.
1023 (expand_vec_perm_d): Add a vec_flags field.
1024 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1025 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1026 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1027 for SVE modes.
1028 (aarch64_evpc_rev): Rename to...
1029 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1030 (aarch64_evpc_rev_global): New function.
1031 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1032 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1033 MAX_VECT_LEN.
1034 (aarch64_evpc_sve_tbl): New function.
1035 (aarch64_expand_vec_perm_const_1): Update after rename of
1036 aarch64_evpc_rev. Handle SVE permutes too, trying
1037 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1038 than aarch64_evpc_tbl.
1039 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1040 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1041 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1042 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1043 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1044 (aarch64_expand_sve_vcond): New functions.
1045 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1046 of aarch64_vector_mode_p.
1047 (aarch64_dwarf_poly_indeterminate_value): New function.
1048 (aarch64_compute_pressure_classes): Likewise.
1049 (aarch64_can_change_mode_class): Likewise.
1050 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1051 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1052 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1053 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1054 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1055 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1056 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1057 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1058 constraints.
1059 (Dn, Dl, Dr): Accept const as well as const_vector.
1060 (Dz): Likewise. Compare against CONST0_RTX.
1061 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1062 of "vector" where appropriate.
1063 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1064 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1065 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1066 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1067 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1068 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1069 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1070 (v_int_equiv): Extend to SVE modes.
1071 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1072 mode attributes.
1073 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1074 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1075 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1076 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1077 (SVE_COND_FP_CMP): New int iterators.
1078 (perm_hilo): Handle the new unpack unspecs.
1079 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1080 attributes.
1081 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1082 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1083 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1084 (aarch64_equality_operator, aarch64_constant_vector_operand)
1085 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1086 (aarch64_sve_nonimmediate_operand): Likewise.
1087 (aarch64_sve_general_operand): Likewise.
1088 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1089 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1090 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1091 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1092 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1093 (aarch64_sve_float_arith_immediate): Likewise.
1094 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1095 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1096 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1097 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1098 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1099 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1100 (aarch64_sve_float_arith_operand): Likewise.
1101 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1102 (aarch64_sve_float_mul_operand): Likewise.
1103 (aarch64_sve_vec_perm_operand): Likewise.
1104 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1105 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1106 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1107 as well as const_vector.
1108 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1109 in file. Use CONST0_RTX and CONSTM1_RTX.
1110 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1111 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1112 Use aarch64_simd_imm_zero.
1113 * config/aarch64/aarch64-sve.md: New file.
1114 * config/aarch64/aarch64.md: Include it.
1115 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1116 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1117 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1118 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1119 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1120 (sve): New attribute.
1121 (enabled): Disable instructions with the sve attribute unless
1122 TARGET_SVE.
1123 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1124 aarch64_expand_mov_immediate.
1125 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1126 CNT[BHSD] immediates.
1127 (movti): Split CONST_POLY_INT moves into two halves.
1128 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1129 Split additions that need a temporary here if the destination
1130 is the stack pointer.
1131 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1132 (*add<mode>3_poly_1): New instruction.
1133 (set_clobber_cc): New expander.
1135 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1137 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1138 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1139 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1140 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1141 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1142 Change innermode from fixed_mode_size to machine_mode.
1143 (simplify_subreg): Update call accordingly. Handle a constant-sized
1144 subreg of a variable-length CONST_VECTOR.
1146 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1147 Alan Hayward <alan.hayward@arm.com>
1148 David Sherwood <david.sherwood@arm.com>
1150 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1151 (add_offset_to_base): New function, split out from...
1152 (create_mem_ref): ...here. When handling a scale other than 1,
1153 check first whether the address is valid without the offset.
1154 Add it into the base if so, leaving the index and scale as-is.
1156 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1158 PR c++/83778
1159 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1160 fold_for_warn before checking if arg2 is INTEGER_CST.
1162 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1164 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1165 (store_multiple_operation): Delete.
1166 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1167 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1168 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1169 guarded by TARGET_STRING.
1170 (rs6000_output_load_multiple): Delete.
1171 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1172 OPTION_MASK_STRING / TARGET_STRING handling.
1173 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1174 (const rs6000_opt_masks) <"string">: Change mask to 0.
1175 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1176 (MASK_STRING): Delete.
1177 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1178 parts. Simplify.
1179 (load_multiple): Delete.
1180 (*ldmsi8): Delete.
1181 (*ldmsi7): Delete.
1182 (*ldmsi6): Delete.
1183 (*ldmsi5): Delete.
1184 (*ldmsi4): Delete.
1185 (*ldmsi3): Delete.
1186 (store_multiple): Delete.
1187 (*stmsi8): Delete.
1188 (*stmsi7): Delete.
1189 (*stmsi6): Delete.
1190 (*stmsi5): Delete.
1191 (*stmsi4): Delete.
1192 (*stmsi3): Delete.
1193 (movmemsi_8reg): Delete.
1194 (corresponding unnamed define_insn): Delete.
1195 (movmemsi_6reg): Delete.
1196 (corresponding unnamed define_insn): Delete.
1197 (movmemsi_4reg): Delete.
1198 (corresponding unnamed define_insn): Delete.
1199 (movmemsi_2reg): Delete.
1200 (corresponding unnamed define_insn): Delete.
1201 (movmemsi_1reg): Delete.
1202 (corresponding unnamed define_insn): Delete.
1203 * config/rs6000/rs6000.opt (mno-string): New.
1204 (mstring): Replace by deprecation warning stub.
1205 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1207 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1209 * regrename.c (regrename_do_replace): If replacing the same
1210 reg multiple times, try to reuse last created gen_raw_REG.
1212 PR debug/81155
1213 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1214 main to workaround a bug in GDB.
1216 2018-01-12 Tom de Vries <tom@codesourcery.com>
1218 PR target/83737
1219 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1221 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1223 PR rtl-optimization/80481
1224 * ira-color.c (get_cap_member): New function.
1225 (allocnos_conflict_by_live_ranges_p): Use it.
1226 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1227 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1229 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1231 PR target/83628
1232 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1233 (*saddl_se_1): Ditto.
1234 (*ssubsi_1): Ditto.
1235 (*saddl_se_1): Ditto.
1237 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1239 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1240 rather than wi::to_widest for DR_INITs.
1241 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1242 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1243 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1244 INTEGER_CSTs.
1245 (vect_analyze_group_access_1): Note that here.
1247 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1249 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1250 polynomial type sizes.
1252 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1254 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1255 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1256 (gimple_add_tmp_var): Likewise.
1258 2018-01-12 Martin Liska <mliska@suse.cz>
1260 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1261 (gimple_alloc_sizes): Likewise.
1262 (dump_gimple_statistics): Use PRIu64 in printf format.
1263 * gimple.h: Change uint64_t to int.
1265 2018-01-12 Martin Liska <mliska@suse.cz>
1267 * tree-core.h: Use uint64_t instead of int.
1268 * tree.c (tree_node_counts): Likewise.
1269 (tree_node_sizes): Likewise.
1270 (dump_tree_statistics): Use PRIu64 in printf format.
1272 2018-01-12 Martin Liska <mliska@suse.cz>
1274 * Makefile.in: As qsort_chk is implemented in vec.c, add
1275 vec.o to linkage of gencfn-macros.
1276 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1277 passing the info to record_node_allocation_statistics.
1278 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1279 and pass the info.
1280 * ggc-common.c (struct ggc_usage): Add operator== and use
1281 it in operator< and compare function.
1282 * mem-stats.h (struct mem_usage): Likewise.
1283 * vec.c (struct vec_usage): Remove operator< and compare
1284 function. Can be simply inherited.
1286 2018-01-12 Martin Jambor <mjambor@suse.cz>
1288 PR target/81616
1289 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1290 * tree-ssa-math-opts.c: Include domwalk.h.
1291 (convert_mult_to_fma_1): New function.
1292 (fma_transformation_info): New type.
1293 (fma_deferring_state): Likewise.
1294 (cancel_fma_deferring): New function.
1295 (result_of_phi): Likewise.
1296 (last_fma_candidate_feeds_initial_phi): Likewise.
1297 (convert_mult_to_fma): Added deferring logic, split actual
1298 transformation to convert_mult_to_fma_1.
1299 (math_opts_dom_walker): New type.
1300 (math_opts_dom_walker::after_dom_children): New method, body moved
1301 here from pass_optimize_widening_mul::execute, added deferring logic
1302 bits.
1303 (pass_optimize_widening_mul::execute): Moved most of code to
1304 math_opts_dom_walker::after_dom_children.
1305 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1306 * config/i386/i386.c (ix86_option_override_internal): Added
1307 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1309 2018-01-12 Richard Biener <rguenther@suse.de>
1311 PR debug/83157
1312 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1313 inline instance vars.
1315 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1317 PR target/81819
1318 * config/rx/rx.c (rx_is_restricted_memory_address):
1319 Handle SUBREG case.
1321 2018-01-12 Richard Biener <rguenther@suse.de>
1323 PR tree-optimization/80846
1324 * target.def (split_reduction): New target hook.
1325 * targhooks.c (default_split_reduction): New function.
1326 * targhooks.h (default_split_reduction): Declare.
1327 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1328 target requests first reduce vectors by combining low and high
1329 parts.
1330 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1331 (get_vectype_for_scalar_type_and_size): Export.
1332 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1333 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1334 * doc/tm.texi: Regenerate.
1335 * config/i386/i386.c (ix86_split_reduction): Implement
1336 TARGET_VECTORIZE_SPLIT_REDUCTION.
1338 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1340 PR target/83368
1341 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1342 in PIC mode except for TARGET_VXWORKS_RTP.
1343 * config/sparc/sparc.c: Include cfgrtl.h.
1344 (TARGET_INIT_PIC_REG): Define.
1345 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1346 (sparc_pic_register_p): New predicate.
1347 (sparc_legitimate_address_p): Use it.
1348 (sparc_legitimize_pic_address): Likewise.
1349 (sparc_delegitimize_address): Likewise.
1350 (sparc_mode_dependent_address_p): Likewise.
1351 (gen_load_pcrel_sym): Remove 4th parameter.
1352 (load_got_register): Adjust call to above. Remove obsolete stuff.
1353 (sparc_expand_prologue): Do not call load_got_register here.
1354 (sparc_flat_expand_prologue): Likewise.
1355 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1356 (sparc_use_pseudo_pic_reg): New function.
1357 (sparc_init_pic_reg): Likewise.
1358 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1359 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1361 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1363 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1364 Add item for branch_cost.
1366 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1368 PR rtl-optimization/83565
1369 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1370 not extend the result to a larger mode for rotate operations.
1371 (num_sign_bit_copies1): Likewise.
1373 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1375 PR target/40411
1376 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1377 -symbolic.
1378 Use values-Xc.o for -pedantic.
1379 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1381 2018-01-12 Martin Liska <mliska@suse.cz>
1383 PR ipa/83054
1384 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1385 New function.
1386 (possible_polymorphic_call_targets): Use it.
1387 (ipa_devirt): Likewise.
1389 2018-01-12 Martin Liska <mliska@suse.cz>
1391 * profile-count.h (enum profile_quality): Use 0 as invalid
1392 enum value of profile_quality.
1394 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1396 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1397 -mext-string options.
1399 2018-01-12 Richard Biener <rguenther@suse.de>
1401 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1402 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1403 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1404 Likewise.
1405 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1407 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1409 * configure.ac (--with-long-double-format): Add support for the
1410 configuration option to change the default long double format on
1411 PowerPC systems.
1412 * config.gcc (powerpc*-linux*-*): Likewise.
1413 * configure: Regenerate.
1414 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1415 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1416 used without modification.
1418 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1420 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1421 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1422 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1423 MISC_BUILTIN_SPEC_BARRIER.
1424 (rs6000_init_builtins): Likewise.
1425 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1426 enum value.
1427 (speculation_barrier): New define_insn.
1428 * doc/extend.texi: Document __builtin_speculation_barrier.
1430 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1432 PR target/83203
1433 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1434 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1435 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1436 iterators.
1437 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1438 integral modes instead of "ss" and "sd".
1439 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1440 vectors with 32-bit and 64-bit elements.
1441 (vecdupssescalarmodesuffix): New mode attribute.
1442 (vec_dup<mode>): Use it.
1444 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1446 PR target/83330
1447 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1448 frame if argument is passed on stack.
1450 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1452 PR target/82682
1453 * ree.c (combine_reaching_defs): Optimize also
1454 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1455 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1457 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1459 PR middle-end/83189
1460 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1462 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1464 PR middle-end/83718
1465 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1466 after they are computed.
1468 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1470 PR tree-optimization/83695
1471 * gimple-loop-linterchange.cc
1472 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1473 reset cached scev information after interchange.
1474 (pass_linterchange::execute): Remove call to scev_reset_htab.
1476 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1478 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1479 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1480 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1481 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1482 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1483 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1484 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1485 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1486 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1487 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1488 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1489 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1490 (V_lane_reg): Likewise.
1491 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1492 New define_expand.
1493 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1494 (vfmal_lane_low<mode>_intrinsic,
1495 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1496 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1497 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1498 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1499 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1500 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1502 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1504 * config/arm/arm-cpus.in (fp16fml): New feature.
1505 (ALL_SIMD): Add fp16fml.
1506 (armv8.2-a): Add fp16fml as an option.
1507 (armv8.3-a): Likewise.
1508 (armv8.4-a): Add fp16fml as part of fp16.
1509 * config/arm/arm.h (TARGET_FP16FML): Define.
1510 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1511 when appropriate.
1512 * config/arm/arm-modes.def (V2HF): Define.
1513 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1514 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1515 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1516 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1517 vfmsl_low, vfmsl_high): New set of builtins.
1518 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1519 (vfml_op): New code attribute.
1520 (VFMLHALVES): New int iterator.
1521 (VFML, VFMLSEL): New mode attributes.
1522 (V_reg): Define mapping for V2HF.
1523 (V_hi, V_lo): New mode attributes.
1524 (VF_constraint): Likewise.
1525 (vfml_half, vfml_half_selector): New int attributes.
1526 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1527 define_expand.
1528 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1529 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1530 New define_insn.
1531 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1532 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1533 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1534 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
1535 documentation.
1536 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1537 Document new effective target and option set.
1539 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1541 * config/arm/arm-cpus.in (armv8_4): New feature.
1542 (ARMv8_4a): New fgroup.
1543 (armv8.4-a): New arch.
1544 * config/arm/arm-tables.opt: Regenerate.
1545 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1546 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1547 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1548 Add matching rules for -march=armv8.4-a and extensions.
1549 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1551 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
1553 PR target/81821
1554 * config/rx/rx.md (BW): New mode attribute.
1555 (sync_lock_test_and_setsi): Add mode suffix to insn output.
1557 2018-01-11 Richard Biener <rguenther@suse.de>
1559 PR tree-optimization/83435
1560 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1561 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1562 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1564 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1565 Alan Hayward <alan.hayward@arm.com>
1566 David Sherwood <david.sherwood@arm.com>
1568 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1569 field.
1570 (aarch64_classify_address): Initialize it. Track polynomial offsets.
1571 (aarch64_print_address_internal): Use it to check for a zero offset.
1573 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1574 Alan Hayward <alan.hayward@arm.com>
1575 David Sherwood <david.sherwood@arm.com>
1577 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1578 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1579 Return a poly_int64 rather than a HOST_WIDE_INT.
1580 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1581 rather than a HOST_WIDE_INT.
1582 * config/aarch64/aarch64.h (aarch64_frame): Protect with
1583 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
1584 hard_fp_offset, frame_size, initial_adjust, callee_offset and
1585 final_offset from HOST_WIDE_INT to poly_int64.
1586 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1587 to_constant when getting the number of units in an Advanced SIMD
1588 mode.
1589 (aarch64_builtin_vectorized_function): Check for a constant number
1590 of units.
1591 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1592 GET_MODE_SIZE.
1593 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1594 attribute instead of GET_MODE_NUNITS.
1595 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1596 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1597 GET_MODE_SIZE for fixed-size registers.
1598 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1599 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1600 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1601 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1602 (aarch64_print_operand, aarch64_print_address_internal)
1603 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1604 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1605 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1606 Handle polynomial GET_MODE_SIZE.
1607 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
1608 wider than SImode without modification.
1609 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1610 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1611 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1612 passing and returning SVE modes.
1613 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1614 rather than GEN_INT.
1615 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1616 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1617 (aarch64_allocate_and_probe_stack_space): Likewise.
1618 (aarch64_layout_frame): Cope with polynomial offsets.
1619 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1620 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
1621 polynomial offsets.
1622 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1623 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1624 poly_int64 rather than a HOST_WIDE_INT.
1625 (aarch64_get_separate_components, aarch64_process_components)
1626 (aarch64_expand_prologue, aarch64_expand_epilogue)
1627 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1628 (aarch64_anchor_offset): New function, split out from...
1629 (aarch64_legitimize_address): ...here.
1630 (aarch64_builtin_vectorization_cost): Handle polynomial
1631 TYPE_VECTOR_SUBPARTS.
1632 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1633 GET_MODE_NUNITS.
1634 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1635 number of elements from the PARALLEL rather than the mode.
1636 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1637 rather than GET_MODE_BITSIZE.
1638 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1639 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1640 (aarch64_expand_vec_perm_const_1): Handle polynomial
1641 d->perm.length () and d->perm elements.
1642 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
1643 Apply to_constant to d->perm elements.
1644 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1645 polynomial CONST_VECTOR_NUNITS.
1646 (aarch64_move_pointer): Take amount as a poly_int64 rather
1647 than an int.
1648 (aarch64_progress_pointer): Avoid temporary variable.
1649 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1650 the mode attribute instead of GET_MODE.
1652 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1653 Alan Hayward <alan.hayward@arm.com>
1654 David Sherwood <david.sherwood@arm.com>
1656 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
1657 x exists before using it.
1658 (aarch64_add_constant_internal): Rename to...
1659 (aarch64_add_offset_1): ...this. Replace regnum with separate
1660 src and dest rtxes. Handle the case in which they're different,
1661 including when the offset is zero. Replace scratchreg with an rtx.
1662 Use 2 additions if there is no spare register into which we can
1663 move a 16-bit constant.
1664 (aarch64_add_constant): Delete.
1665 (aarch64_add_offset): Replace reg with separate src and dest
1666 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
1667 Use aarch64_add_offset_1.
1668 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
1669 an rtx rather than an int. Take the delta as a poly_int64
1670 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
1671 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
1672 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
1673 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
1674 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
1675 and aarch64_add_sp.
1676 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
1677 aarch64_add_constant.
1679 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1681 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1682 Use scalar_float_mode.
1684 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1686 * config/aarch64/aarch64-simd.md
1687 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1688 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1689 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1690 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1691 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1692 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1693 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1694 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1695 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1696 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1698 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1700 PR target/83514
1701 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1702 targ_options->x_arm_arch_string is non NULL.
1704 2018-01-11 Tamar Christina <tamar.christina@arm.com>
1706 * config/aarch64/aarch64.h
1707 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
1709 2018-01-11 Sudakshina Das <sudi.das@arm.com>
1711 PR target/82096
1712 * expmed.c (emit_store_flag_force): Swap if const op0
1713 and change VOIDmode to mode of op0.
1715 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1717 PR rtl-optimization/83761
1718 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
1719 than bytes to mode_for_size.
1721 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1723 PR middle-end/83189
1724 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
1725 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
1726 profile.
1728 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1730 PR middle-end/83575
1731 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
1732 when in layout mode.
1733 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
1734 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
1735 partition fixup.
1737 2018-01-10 Michael Collison <michael.collison@arm.com>
1739 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
1740 * config/aarch64/aarch64-option-extension.def: Add
1741 AARCH64_OPT_EXTENSION of 'fp16fml'.
1742 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1743 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
1744 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
1745 * config/aarch64/constraints.md (Ui7): New constraint.
1746 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
1747 (VFMLA_SEL_W): Ditto.
1748 (f16quad): Ditto.
1749 (f16mac1): Ditto.
1750 (VFMLA16_LOW): New int iterator.
1751 (VFMLA16_HIGH): Ditto.
1752 (UNSPEC_FMLAL): New unspec.
1753 (UNSPEC_FMLSL): Ditto.
1754 (UNSPEC_FMLAL2): Ditto.
1755 (UNSPEC_FMLSL2): Ditto.
1756 (f16mac): New code attribute.
1757 * config/aarch64/aarch64-simd-builtins.def
1758 (aarch64_fmlal_lowv2sf): Ditto.
1759 (aarch64_fmlsl_lowv2sf): Ditto.
1760 (aarch64_fmlalq_lowv4sf): Ditto.
1761 (aarch64_fmlslq_lowv4sf): Ditto.
1762 (aarch64_fmlal_highv2sf): Ditto.
1763 (aarch64_fmlsl_highv2sf): Ditto.
1764 (aarch64_fmlalq_highv4sf): Ditto.
1765 (aarch64_fmlslq_highv4sf): Ditto.
1766 (aarch64_fmlal_lane_lowv2sf): Ditto.
1767 (aarch64_fmlsl_lane_lowv2sf): Ditto.
1768 (aarch64_fmlal_laneq_lowv2sf): Ditto.
1769 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
1770 (aarch64_fmlalq_lane_lowv4sf): Ditto.
1771 (aarch64_fmlsl_lane_lowv4sf): Ditto.
1772 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
1773 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
1774 (aarch64_fmlal_lane_highv2sf): Ditto.
1775 (aarch64_fmlsl_lane_highv2sf): Ditto.
1776 (aarch64_fmlal_laneq_highv2sf): Ditto.
1777 (aarch64_fmlsl_laneq_highv2sf): Ditto.
1778 (aarch64_fmlalq_lane_highv4sf): Ditto.
1779 (aarch64_fmlsl_lane_highv4sf): Ditto.
1780 (aarch64_fmlalq_laneq_highv4sf): Ditto.
1781 (aarch64_fmlsl_laneq_highv4sf): Ditto.
1782 * config/aarch64/aarch64-simd.md:
1783 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
1784 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1785 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
1786 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1787 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
1788 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
1789 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
1790 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
1791 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
1792 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
1793 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
1794 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
1795 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
1796 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
1797 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
1798 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
1799 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
1800 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
1801 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
1802 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
1803 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
1804 (vfmlsl_low_u32): Ditto.
1805 (vfmlalq_low_u32): Ditto.
1806 (vfmlslq_low_u32): Ditto.
1807 (vfmlal_high_u32): Ditto.
1808 (vfmlsl_high_u32): Ditto.
1809 (vfmlalq_high_u32): Ditto.
1810 (vfmlslq_high_u32): Ditto.
1811 (vfmlal_lane_low_u32): Ditto.
1812 (vfmlsl_lane_low_u32): Ditto.
1813 (vfmlal_laneq_low_u32): Ditto.
1814 (vfmlsl_laneq_low_u32): Ditto.
1815 (vfmlalq_lane_low_u32): Ditto.
1816 (vfmlslq_lane_low_u32): Ditto.
1817 (vfmlalq_laneq_low_u32): Ditto.
1818 (vfmlslq_laneq_low_u32): Ditto.
1819 (vfmlal_lane_high_u32): Ditto.
1820 (vfmlsl_lane_high_u32): Ditto.
1821 (vfmlal_laneq_high_u32): Ditto.
1822 (vfmlsl_laneq_high_u32): Ditto.
1823 (vfmlalq_lane_high_u32): Ditto.
1824 (vfmlslq_lane_high_u32): Ditto.
1825 (vfmlalq_laneq_high_u32): Ditto.
1826 (vfmlslq_laneq_high_u32): Ditto.
1827 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
1828 (AARCH64_FL_FOR_ARCH8_4): New.
1829 (AARCH64_ISA_F16FML): New ISA flag.
1830 (TARGET_F16FML): New feature flag for fp16fml.
1831 (doc/invoke.texi): Document new fp16fml option.
1833 2018-01-10 Michael Collison <michael.collison@arm.com>
1835 * config/aarch64/aarch64-builtins.c:
1836 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
1837 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1838 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
1839 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
1840 (AARCH64_ISA_SHA3): New ISA flag.
1841 (TARGET_SHA3): New feature flag for sha3.
1842 * config/aarch64/iterators.md (sha512_op): New int attribute.
1843 (CRYPTO_SHA512): New int iterator.
1844 (UNSPEC_SHA512H): New unspec.
1845 (UNSPEC_SHA512H2): Ditto.
1846 (UNSPEC_SHA512SU0): Ditto.
1847 (UNSPEC_SHA512SU1): Ditto.
1848 * config/aarch64/aarch64-simd-builtins.def
1849 (aarch64_crypto_sha512hqv2di): New builtin.
1850 (aarch64_crypto_sha512h2qv2di): Ditto.
1851 (aarch64_crypto_sha512su0qv2di): Ditto.
1852 (aarch64_crypto_sha512su1qv2di): Ditto.
1853 (aarch64_eor3qv8hi): Ditto.
1854 (aarch64_rax1qv2di): Ditto.
1855 (aarch64_xarqv2di): Ditto.
1856 (aarch64_bcaxqv8hi): Ditto.
1857 * config/aarch64/aarch64-simd.md:
1858 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
1859 (aarch64_crypto_sha512su0qv2di): Ditto.
1860 (aarch64_crypto_sha512su1qv2di): Ditto.
1861 (aarch64_eor3qv8hi): Ditto.
1862 (aarch64_rax1qv2di): Ditto.
1863 (aarch64_xarqv2di): Ditto.
1864 (aarch64_bcaxqv8hi): Ditto.
1865 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
1866 (vsha512h2q_u64): Ditto.
1867 (vsha512su0q_u64): Ditto.
1868 (vsha512su1q_u64): Ditto.
1869 (veor3q_u16): Ditto.
1870 (vrax1q_u64): Ditto.
1871 (vxarq_u64): Ditto.
1872 (vbcaxq_u16): Ditto.
1873 * config/arm/types.md (crypto_sha512): New type attribute.
1874 (crypto_sha3): Ditto.
1875 (doc/invoke.texi): Document new sha3 option.
1877 2018-01-10 Michael Collison <michael.collison@arm.com>
1879 * config/aarch64/aarch64-builtins.c:
1880 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
1881 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1882 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
1883 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
1884 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
1885 (AARCH64_ISA_SM4): New ISA flag.
1886 (TARGET_SM4): New feature flag for sm4.
1887 * config/aarch64/aarch64-simd-builtins.def
1888 (aarch64_sm3ss1qv4si): Ditto.
1889 (aarch64_sm3tt1aq4si): Ditto.
1890 (aarch64_sm3tt1bq4si): Ditto.
1891 (aarch64_sm3tt2aq4si): Ditto.
1892 (aarch64_sm3tt2bq4si): Ditto.
1893 (aarch64_sm3partw1qv4si): Ditto.
1894 (aarch64_sm3partw2qv4si): Ditto.
1895 (aarch64_sm4eqv4si): Ditto.
1896 (aarch64_sm4ekeyqv4si): Ditto.
1897 * config/aarch64/aarch64-simd.md:
1898 (aarch64_sm3ss1qv4si): Ditto.
1899 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
1900 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
1901 (aarch64_sm4eqv4si): Ditto.
1902 (aarch64_sm4ekeyqv4si): Ditto.
1903 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
1904 (sm3part_op): Ditto.
1905 (CRYPTO_SM3TT): Ditto.
1906 (CRYPTO_SM3PART): Ditto.
1907 (UNSPEC_SM3SS1): New unspec.
1908 (UNSPEC_SM3TT1A): Ditto.
1909 (UNSPEC_SM3TT1B): Ditto.
1910 (UNSPEC_SM3TT2A): Ditto.
1911 (UNSPEC_SM3TT2B): Ditto.
1912 (UNSPEC_SM3PARTW1): Ditto.
1913 (UNSPEC_SM3PARTW2): Ditto.
1914 (UNSPEC_SM4E): Ditto.
1915 (UNSPEC_SM4EKEY): Ditto.
1916 * config/aarch64/constraints.md (Ui2): New constraint.
1917 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
1918 * config/arm/types.md (crypto_sm3): New type attribute.
1919 (crypto_sm4): Ditto.
1920 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
1921 (vsm3tt1aq_u32): Ditto.
1922 (vsm3tt1bq_u32): Ditto.
1923 (vsm3tt2aq_u32): Ditto.
1924 (vsm3tt2bq_u32): Ditto.
1925 (vsm3partw1q_u32): Ditto.
1926 (vsm3partw2q_u32): Ditto.
1927 (vsm4eq_u32): Ditto.
1928 (vsm4ekeyq_u32): Ditto.
1929 (doc/invoke.texi): Document new sm4 option.
1931 2018-01-10 Michael Collison <michael.collison@arm.com>
1933 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
1934 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
1935 (AARCH64_FL_FOR_ARCH8_4): New.
1936 (AARCH64_FL_V8_4): New flag.
1937 (doc/invoke.texi): Document new armv8.4-a option.
1939 2018-01-10 Michael Collison <michael.collison@arm.com>
1941 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1942 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
1943 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
1944 * config/aarch64/aarch64-option-extension.def: Add
1945 AARCH64_OPT_EXTENSION of 'sha2'.
1946 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
1947 (crypto): Disable sha2 and aes if crypto disabled.
1948 (crypto): Enable aes and sha2 if enabled.
1949 (simd): Disable sha2 and aes if simd disabled.
1950 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
1951 New flags.
1952 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
1953 (TARGET_SHA2): New feature flag for sha2.
1954 (TARGET_AES): New feature flag for aes.
1955 * config/aarch64/aarch64-simd.md:
1956 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
1957 conditional on TARGET_AES.
1958 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
1959 (aarch64_crypto_sha1hsi): Make pattern conditional
1960 on TARGET_SHA2.
1961 (aarch64_crypto_sha1hv4si): Ditto.
1962 (aarch64_be_crypto_sha1hv4si): Ditto.
1963 (aarch64_crypto_sha1su1v4si): Ditto.
1964 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
1965 (aarch64_crypto_sha1su0v4si): Ditto.
1966 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
1967 (aarch64_crypto_sha256su0v4si): Ditto.
1968 (aarch64_crypto_sha256su1v4si): Ditto.
1969 (doc/invoke.texi): Document new aes and sha2 options.
1971 2018-01-10 Martin Sebor <msebor@redhat.com>
1973 PR tree-optimization/83781
1974 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
1975 as string arrays.
1977 2018-01-11 Martin Sebor <msebor@gmail.com>
1978 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1980 PR tree-optimization/83501
1981 PR tree-optimization/81703
1983 * tree-ssa-strlen.c (get_string_cst): Rename...
1984 (get_string_len): ...to this. Handle global constants.
1985 (handle_char_store): Adjust.
1987 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
1988 Jim Wilson <jimw@sifive.com>
1990 * config/riscv/riscv-protos.h (riscv_output_return): New.
1991 * config/riscv/riscv.c (struct machine_function): New naked_p field.
1992 (riscv_attribute_table, riscv_output_return),
1993 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
1994 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
1995 (riscv_compute_frame_info): Only compute frame->mask if not a naked
1996 function.
1997 (riscv_expand_prologue): Add early return for naked function.
1998 (riscv_expand_epilogue): Likewise.
1999 (riscv_function_ok_for_sibcall): Return false for naked function.
2000 (riscv_set_current_function): New.
2001 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2002 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2003 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2004 * doc/extend.texi (RISC-V Function Attributes): New.
2006 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2008 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2009 check for 128-bit long double before checking TCmode.
2010 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2011 128-bit long doubles before checking TFmode or TCmode.
2012 (FLOAT128_IBM_P): Likewise.
2014 2018-01-10 Martin Sebor <msebor@redhat.com>
2016 PR tree-optimization/83671
2017 * builtins.c (c_strlen): Unconditionally return zero for the empty
2018 string.
2019 Use -Warray-bounds for warnings.
2020 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2021 for non-constant array indices with COMPONENT_REF, arrays of
2022 arrays, and pointers to arrays.
2023 (gimple_fold_builtin_strlen): Determine and set length range for
2024 non-constant character arrays.
2026 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2028 PR middle-end/81897
2029 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2030 empty blocks.
2032 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2034 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2036 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2038 PR target/83399
2039 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2040 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2041 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2042 indexed_or_indirect_operand predicate.
2043 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2044 (*vsx_le_perm_load_v8hi): Likewise.
2045 (*vsx_le_perm_load_v16qi): Likewise.
2046 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2047 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2048 (*vsx_le_perm_store_v8hi): Likewise.
2049 (*vsx_le_perm_store_v16qi): Likewise.
2050 (eight unnamed splitters): Likewise.
2052 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2054 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2055 * config/rs6000/emmintrin.h: Likewise.
2056 * config/rs6000/mmintrin.h: Likewise.
2057 * config/rs6000/xmmintrin.h: Likewise.
2059 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2061 PR c++/43486
2062 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2063 "public_flag".
2064 * tree.c (tree_nop_conversion): Return true for location wrapper
2065 nodes.
2066 (maybe_wrap_with_location): New function.
2067 (selftest::check_strip_nops): New function.
2068 (selftest::test_location_wrappers): New function.
2069 (selftest::tree_c_tests): Call it.
2070 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2071 (maybe_wrap_with_location): New decl.
2072 (EXPR_LOCATION_WRAPPER_P): New macro.
2073 (location_wrapper_p): New inline function.
2074 (tree_strip_any_location_wrapper): New inline function.
2076 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2078 PR target/83735
2079 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2080 stack_realign_offset for the largest alignment of stack slot
2081 actually used.
2082 (ix86_find_max_used_stack_alignment): New function.
2083 (ix86_finalize_stack_frame_flags): Use it. Set
2084 max_used_stack_alignment if we don't realign stack.
2085 * config/i386/i386.h (machine_function): Add
2086 max_used_stack_alignment.
2088 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2090 * config/arm/arm.opt (-mbranch-cost): New option.
2091 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2092 account.
2094 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2096 PR target/83629
2097 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2098 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2100 2018-01-10 Richard Biener <rguenther@suse.de>
2102 PR debug/83765
2103 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2104 early out so it also covers the case where we have a non-NULL
2105 origin.
2107 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2109 PR tree-optimization/83753
2110 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2111 for non-strided grouped accesses if the number of elements is 1.
2113 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2115 PR target/81616
2116 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2117 * i386.h (TARGET_USE_GATHER): Define.
2118 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2120 2018-01-10 Martin Liska <mliska@suse.cz>
2122 PR bootstrap/82831
2123 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2124 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2125 partitioning.
2126 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2127 CLEANUP_NO_PARTITIONING is not set.
2129 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2131 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2132 for vectors, as a partial revert of r254296.
2133 * rtl.h (const_vec_p): Delete.
2134 (const_vec_duplicate_p): Don't test for vector CONSTs.
2135 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2136 * expmed.c (make_tree): Likewise.
2138 Revert:
2139 * common.md (E, F): Use CONSTANT_P instead of checking for
2140 CONST_VECTOR.
2141 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2142 checking for CONST_VECTOR.
2144 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2146 PR middle-end/83575
2147 * predict.c (force_edge_cold): Handle in more sane way edges
2148 with no prediction.
2150 2018-01-09 Carl Love <cel@us.ibm.com>
2152 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2153 V4SI, V4SF types.
2154 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2155 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2156 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2157 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2158 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2159 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2160 * config/rs6000/rs6000-protos.h: Add extern defition for
2161 rs6000_generate_float2_double_code.
2162 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2163 function.
2164 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2165 (float2_v2df): Add define_expand.
2167 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2169 PR target/83628
2170 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2171 op_mode in the force_to_mode call.
2173 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2175 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2176 instead of checking each element individually.
2177 (aarch64_evpc_uzp): Likewise.
2178 (aarch64_evpc_zip): Likewise.
2179 (aarch64_evpc_ext): Likewise.
2180 (aarch64_evpc_rev): Likewise.
2181 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2182 instead of checking each element individually. Return true without
2183 generating rtl if
2184 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2185 whether all selected elements come from the same input, instead of
2186 checking each element individually. Remove calls to gen_rtx_REG,
2187 start_sequence and end_sequence and instead assert that no rtl is
2188 generated.
2190 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2192 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2193 order of HIGH and CONST checks.
2195 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2197 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2198 if the destination isn't an SSA_NAME.
2200 2018-01-09 Richard Biener <rguenther@suse.de>
2202 PR tree-optimization/83668
2203 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2204 move prologue...
2205 (canonicalize_loop_form): ... here, renamed from ...
2206 (canonicalize_loop_closed_ssa_form): ... this and amended to
2207 swap successor edges for loop exit blocks to make us use
2208 the RPO order we need for initial schedule generation.
2210 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2212 PR tree-optimization/64811
2213 * match.pd: When optimizing comparisons with Inf, avoid
2214 introducing or losing exceptions from comparisons with NaN.
2216 2018-01-09 Martin Liska <mliska@suse.cz>
2218 PR sanitizer/82517
2219 * asan.c (shadow_mem_size): Add gcc_assert.
2221 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2223 Don't save registers in main().
2225 PR target/83738
2226 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2227 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2228 * config/avr/avr.c (avr_set_current_function): Don't error if
2229 naked, OS_task or OS_main are specified at the same time.
2230 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2231 OS_main.
2232 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2233 attribute.
2234 * common/config/avr/avr-common.c (avr_option_optimization_table):
2235 Switch on -mmain-is-OS_task for optimizing compilations.
2237 2018-01-09 Richard Biener <rguenther@suse.de>
2239 PR tree-optimization/83572
2240 * graphite.c: Include cfganal.h.
2241 (graphite_transform_loops): Connect infinite loops to exit
2242 and remove fake edges at the end.
2244 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2246 * ipa-inline.c (edge_badness): Revert accidental checkin.
2248 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2250 PR ipa/80763
2251 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2252 symbols; not inline clones.
2254 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2256 PR target/83507
2257 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2258 hard registers. Formatting fixes.
2260 PR preprocessor/83722
2261 * gcc.c (try_generate_repro): Pass
2262 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2263 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2264 do_report_bug.
2266 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2267 Kito Cheng <kito.cheng@gmail.com>
2269 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2270 (riscv_leaf_function_p): Delete.
2271 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2273 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2275 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2276 function.
2277 (do_ifelse): New function.
2278 (do_isel): New function.
2279 (do_sub3): New function.
2280 (do_add3): New function.
2281 (do_load_mask_compare): New function.
2282 (do_overlap_load_compare): New function.
2283 (expand_compare_loop): New function.
2284 (expand_block_compare): Call expand_compare_loop() when appropriate.
2285 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2286 option description.
2287 (-mblock-compare-inline-loop-limit): New option.
2289 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2291 PR target/83677
2292 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2293 Reverse order of second and third operands in first alternative.
2294 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2295 of first and second elements in UNSPEC_VPERMR vector.
2296 (altivec_expand_vec_perm_le): Likewise.
2298 2017-01-08 Jeff Law <law@redhat.com>
2300 PR rtl-optimizatin/81308
2301 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2302 (process_switch): If group_case_labels makes a change, then set
2303 cfg_altered.
2304 (pass_convert_switch::execute): If a switch is converted, then
2305 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2307 PR rtl-optimization/81308
2308 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2309 splitting insns.
2311 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2313 PR target/83663 - Revert r255946
2314 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2315 generation for cases where splatting a value is not useful.
2316 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2317 across a vec_duplicate and a paradoxical subreg forming a vector
2318 mode to a vec_concat.
2320 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2322 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2323 -march=armv8.3-a variants.
2324 * config/arm/t-multilib: Likewise.
2325 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2327 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2329 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2330 to generate rtl.
2331 (cceq_ior_compare_complement): Give it a name so I can use it, and
2332 change boolean_or_operator predicate to boolean_operator so it can
2333 be used to generate a crand.
2334 (eqne): New code iterator.
2335 (bd/bd_neg): New code_attrs.
2336 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2337 a single define_insn.
2338 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2339 decrement (bdnzt/bdnzf/bdzt/bdzf).
2340 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2341 with the new names of the branch decrement patterns, and added the
2342 names of the branch decrement conditional patterns.
2344 2018-01-08 Richard Biener <rguenther@suse.de>
2346 PR tree-optimization/83563
2347 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2348 cache.
2350 2018-01-08 Richard Biener <rguenther@suse.de>
2352 PR middle-end/83713
2353 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2355 2018-01-08 Richard Biener <rguenther@suse.de>
2357 PR tree-optimization/83685
2358 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2359 references to abnormals.
2361 2018-01-08 Richard Biener <rguenther@suse.de>
2363 PR lto/83719
2364 * dwarf2out.c (output_indirect_strings): Handle empty
2365 skeleton_debug_str_hash.
2366 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2368 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2370 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2371 (emit_store_direct): Likewise.
2372 (arc_trampoline_adjust_address): Likewise.
2373 (arc_asm_trampoline_template): New function.
2374 (arc_initialize_trampoline): Use asm_trampoline_template.
2375 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2376 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2377 * config/arc/arc.md (flush_icache): Delete pattern.
2379 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2381 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2382 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2383 munaligned-access.
2385 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2387 PR target/83681
2388 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2389 by not USED_FOR_TARGET.
2390 (make_pass_resolve_sw_modes): Likewise.
2392 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2394 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2395 USED_FOR_TARGET.
2397 2018-01-08 Richard Biener <rguenther@suse.de>
2399 PR middle-end/83580
2400 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2402 2018-01-08 Richard Biener <rguenther@suse.de>
2404 PR middle-end/83517
2405 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2407 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2409 PR middle-end/81897
2410 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2411 basic blocks with a small number of successors.
2412 (convert_control_dep_chain_into_preds): Improve handling of
2413 forwarder blocks.
2414 (dump_predicates): Split apart into...
2415 (dump_pred_chain): ...here...
2416 (dump_pred_info): ...and here.
2417 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2418 (can_chain_union_be_invalidated_p): Improve check for invalidation
2419 of paths.
2420 (uninit_uses_cannot_happen): Avoid unnecessary if
2421 convert_control_dep_chain_into_preds yielded nothing.
2423 2018-01-06 Martin Sebor <msebor@redhat.com>
2425 PR tree-optimization/83640
2426 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2427 subtracting negative offset from size.
2428 (builtin_access::overlap): Adjust offset bounds of the access to fall
2429 within the size of the object if possible.
2431 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2433 PR rtl-optimization/83699
2434 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2435 extract_bit_field_as_subreg to cases in which the extracted
2436 value is also a vector.
2438 * lra-constraints.c (process_alt_operands): Test for the equivalence
2439 substitutions when detecting a possible reload cycle.
2441 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2443 PR debug/83480
2444 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2445 by default if flag_selective_schedling{,2}. Formatting fixes.
2447 PR rtl-optimization/83682
2448 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2449 if it has non-VECTOR_MODE element mode.
2450 (vec_duplicate_p): Likewise.
2452 PR middle-end/83694
2453 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2454 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2456 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2458 PR target/83604
2459 * config/i386/i386-builtin.def
2460 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2461 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2462 Require also OPTION_MASK_ISA_AVX512F in addition to
2463 OPTION_MASK_ISA_GFNI.
2464 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2465 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2466 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2467 to OPTION_MASK_ISA_GFNI.
2468 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2469 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2470 OPTION_MASK_ISA_AVX512BW.
2471 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2472 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2473 addition to OPTION_MASK_ISA_GFNI.
2474 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2475 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2476 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2477 to OPTION_MASK_ISA_GFNI.
2478 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2479 a requirement for all ISAs rather than any of them with a few
2480 exceptions.
2481 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2482 processing.
2483 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2484 bitmasks to be enabled with 3 exceptions, instead of requiring any
2485 enabled ISA with lots of exceptions.
2486 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2487 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2488 Change avx512bw in isa attribute to avx512f.
2489 * config/i386/sgxintrin.h: Add license boilerplate.
2490 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2491 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2492 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2493 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2494 defined.
2495 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2496 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2497 temporarily sse2 rather than sse if not enabled already.
2499 PR target/83604
2500 * config/i386/sse.md (VI248_VLBW): Rename to ...
2501 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2502 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2503 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2504 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2505 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2506 mode iterator instead of VI248_VLBW.
2508 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2510 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2511 (record_modified): Skip clobbers; add debug output.
2512 (param_change_prob): Use sreal frequencies.
2514 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2516 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2517 punt for user-aligned variables.
2519 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2521 * tree-chrec.c (chrec_contains_symbols): Return true for
2522 POLY_INT_CST.
2524 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2526 PR target/82439
2527 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2528 of (x|y) == x for BICS pattern.
2530 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2532 PR tree-optimization/83605
2533 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2534 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2535 can throw.
2537 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2539 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2540 * config/epiphany/rtems.h: New file.
2542 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2543 Uros Bizjak <ubizjak@gmail.com>
2545 PR target/83554
2546 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2547 QIreg_operand instead of register_operand predicate.
2548 * config/i386/i386.c (ix86_rop_should_change_byte_p,
2549 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2550 comments instead of -fmitigate[-_]rop.
2552 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2554 PR bootstrap/81926
2555 * cgraphunit.c (symbol_table::compile): Switch to text_section
2556 before calling assembly_start debug hook.
2557 * run-rtl-passes.c (run_rtl_passes): Likewise.
2558 Include output.h.
2560 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2562 * tree-vrp.c (extract_range_from_binary_expr_1): Check
2563 range_int_cst_p rather than !symbolic_range_p before calling
2564 extract_range_from_multiplicative_op_1.
2566 2017-01-04 Jeff Law <law@redhat.com>
2568 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2569 redundant test in assertion.
2571 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2573 * doc/rtl.texi: Document machine_mode wrapper classes.
2575 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2577 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2578 using tree_to_uhwi.
2580 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2582 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2583 the VEC_PERM_EXPR fold to fail.
2585 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2587 PR debug/83585
2588 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2589 to switched_sections.
2591 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2593 PR target/83680
2594 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2595 test for d.testing.
2597 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
2599 PR target/83387
2600 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2601 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2603 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2605 PR debug/83666
2606 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2607 is BLKmode and bitpos not zero or mode change is needed.
2609 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2611 PR target/83675
2612 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2613 TARGET_VIS2.
2615 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
2617 PR target/83628
2618 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2619 instead of MULT rtx. Update all corresponding splitters.
2620 (*saddl_se): Ditto.
2621 (*ssub<modesuffix>): Ditto.
2622 (*ssubl_se): Ditto.
2623 (*cmp_sadd_di): Update split patterns.
2624 (*cmp_sadd_si): Ditto.
2625 (*cmp_sadd_sidi): Ditto.
2626 (*cmp_ssub_di): Ditto.
2627 (*cmp_ssub_si): Ditto.
2628 (*cmp_ssub_sidi): Ditto.
2629 * config/alpha/predicates.md (const23_operand): New predicate.
2630 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2631 Look for ASHIFT, not MULT inner operand.
2632 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2634 2018-01-04 Martin Liska <mliska@suse.cz>
2636 PR gcov-profile/83669
2637 * gcov.c (output_intermediate_file): Add version to intermediate
2638 gcov file.
2639 * doc/gcov.texi: Document new field 'version' in intermediate
2640 file format. Fix location of '-k' option of gcov command.
2642 2018-01-04 Martin Liska <mliska@suse.cz>
2644 PR ipa/82352
2645 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2647 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2649 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
2651 2018-01-03 Martin Sebor <msebor@redhat.com>
2653 PR tree-optimization/83655
2654 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
2655 checking calls with invalid arguments.
2657 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2659 * tree-vect-stmts.c (vect_get_store_rhs): New function.
2660 (vectorizable_mask_load_store): Delete.
2661 (vectorizable_call): Return false for masked loads and stores.
2662 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
2663 instead of gimple_assign_rhs1.
2664 (vectorizable_load): Handle IFN_MASK_LOAD.
2665 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
2667 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2669 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
2670 split out from..,
2671 (vectorizable_mask_load_store): ...here.
2672 (vectorizable_load): ...and here.
2674 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2676 * tree-vect-stmts.c (vect_build_all_ones_mask)
2677 (vect_build_zero_merge_argument): New functions, split out from...
2678 (vectorizable_load): ...here.
2680 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2682 * tree-vect-stmts.c (vect_check_store_rhs): New function,
2683 split out from...
2684 (vectorizable_mask_load_store): ...here.
2685 (vectorizable_store): ...and here.
2687 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2689 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2690 split out from...
2691 (vectorizable_mask_load_store): ...here.
2693 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2695 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2696 (vect_model_store_cost): Take a vec_load_store_type instead of a
2697 vect_def_type.
2698 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2699 (vect_model_store_cost): Take a vec_load_store_type instead of a
2700 vect_def_type.
2701 (vectorizable_mask_load_store): Update accordingly.
2702 (vectorizable_store): Likewise.
2703 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2705 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2707 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
2708 IFN_MASK_LOAD calls here rather than...
2709 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
2711 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2712 Alan Hayward <alan.hayward@arm.com>
2713 David Sherwood <david.sherwood@arm.com>
2715 * expmed.c (extract_bit_field_1): For vector extracts,
2716 fall back to extract_bit_field_as_subreg if vec_extract
2717 isn't available.
2719 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2720 Alan Hayward <alan.hayward@arm.com>
2721 David Sherwood <david.sherwood@arm.com>
2723 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
2724 they are variable or constant sized.
2725 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
2726 slots for constant-sized data.
2728 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2729 Alan Hayward <alan.hayward@arm.com>
2730 David Sherwood <david.sherwood@arm.com>
2732 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
2733 handling COND_EXPRs with boolean comparisons, try to find a better
2734 basis for the mask type than the boolean itself.
2736 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2738 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
2739 is calculated and how it can be overridden.
2740 * genmodes.c (max_bitsize_mode_any_mode): New variable.
2741 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
2742 if defined.
2743 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
2744 if nonzero.
2746 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2747 Alan Hayward <alan.hayward@arm.com>
2748 David Sherwood <david.sherwood@arm.com>
2750 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
2751 Remove the mode argument.
2752 (aarch64_simd_valid_immediate): Remove the mode and inverse
2753 arguments.
2754 * config/aarch64/iterators.md (bitsize): New iterator.
2755 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
2756 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
2757 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
2758 aarch64_simd_valid_immediate.
2759 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
2760 (aarch64_reg_or_bic_imm): Likewise.
2761 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
2762 with an insn_type enum and msl with a modifier_type enum.
2763 Replace element_width with a scalar_mode. Change the shift
2764 to unsigned int. Add constructors for scalar_float_mode and
2765 scalar_int_mode elements.
2766 (aarch64_vect_float_const_representable_p): Delete.
2767 (aarch64_can_const_movi_rtx_p)
2768 (aarch64_simd_scalar_immediate_valid_for_move)
2769 (aarch64_simd_make_constant): Update call to
2770 aarch64_simd_valid_immediate.
2771 (aarch64_advsimd_valid_immediate_hs): New function.
2772 (aarch64_advsimd_valid_immediate): Likewise.
2773 (aarch64_simd_valid_immediate): Remove mode and inverse
2774 arguments. Rewrite to use the above. Use const_vec_duplicate_p
2775 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
2776 and aarch64_float_const_representable_p on the result.
2777 (aarch64_output_simd_mov_immediate): Remove mode argument.
2778 Update call to aarch64_simd_valid_immediate and use of
2779 simd_immediate_info.
2780 (aarch64_output_scalar_simd_mov_immediate): Update call
2781 accordingly.
2783 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2784 Alan Hayward <alan.hayward@arm.com>
2785 David Sherwood <david.sherwood@arm.com>
2787 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
2788 (mode_nunits): Likewise CONST_MODE_NUNITS.
2789 * machmode.def (ADJUST_NUNITS): Document.
2790 * genmodes.c (mode_data::need_nunits_adj): New field.
2791 (blank_mode): Update accordingly.
2792 (adj_nunits): New variable.
2793 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
2794 parameter.
2795 (emit_mode_size_inline): Set need_bytesize_adj for all modes
2796 listed in adj_nunits.
2797 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
2798 listed in adj_nunits. Don't emit case statements for such modes.
2799 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
2800 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
2801 nothing if adj_nunits is nonnull.
2802 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
2803 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
2804 (emit_mode_fbit): Update use of print_maybe_const_decl.
2805 (emit_move_size): Likewise. Treat the array as non-const
2806 if adj_nunits.
2807 (emit_mode_adjustments): Handle adj_nunits.
2809 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2811 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
2812 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
2813 (VECTOR_MODES): Use it.
2814 (make_vector_modes): Take the prefix as an argument.
2816 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2817 Alan Hayward <alan.hayward@arm.com>
2818 David Sherwood <david.sherwood@arm.com>
2820 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
2821 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
2822 for MODE_VECTOR_BOOL.
2823 * machmode.def (VECTOR_BOOL_MODE): Document.
2824 * genmodes.c (VECTOR_BOOL_MODE): New macro.
2825 (make_vector_bool_mode): New function.
2826 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
2827 MODE_VECTOR_BOOL.
2828 * lto-streamer-in.c (lto_input_mode_table): Likewise.
2829 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
2830 Likewise.
2831 * stor-layout.c (int_mode_for_mode): Likewise.
2832 * tree.c (build_vector_type_for_mode): Likewise.
2833 * varasm.c (output_constant_pool_2): Likewise.
2834 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
2835 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
2836 for MODE_VECTOR_BOOL.
2837 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
2838 of mode class checks.
2839 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
2840 instead of a list of mode class checks.
2841 (expand_vector_scalar_condition): Likewise.
2842 (type_for_widest_vector_mode): Handle BImode as an inner mode.
2844 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2845 Alan Hayward <alan.hayward@arm.com>
2846 David Sherwood <david.sherwood@arm.com>
2848 * machmode.h (mode_size): Change from unsigned short to
2849 poly_uint16_pod.
2850 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
2851 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2852 or if measurement_type is not polynomial.
2853 (fixed_size_mode::includes_p): Check for constant-sized modes.
2854 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
2855 return a poly_uint16 rather than an unsigned short.
2856 (emit_mode_size): Change the type of mode_size from unsigned short
2857 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
2858 (emit_mode_adjustments): Cope with polynomial vector sizes.
2859 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2860 for GET_MODE_SIZE.
2861 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2862 for GET_MODE_SIZE.
2863 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
2864 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
2865 * caller-save.c (setup_save_areas): Likewise.
2866 (replace_reg_with_saved_mem): Likewise.
2867 * calls.c (emit_library_call_value_1): Likewise.
2868 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
2869 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
2870 (gen_lowpart_for_combine): Likewise.
2871 * convert.c (convert_to_integer_1): Likewise.
2872 * cse.c (equiv_constant, cse_insn): Likewise.
2873 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
2874 (cselib_subst_to_values): Likewise.
2875 * dce.c (word_dce_process_block): Likewise.
2876 * df-problems.c (df_word_lr_mark_ref): Likewise.
2877 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
2878 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
2879 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
2880 (rtl_for_decl_location): Likewise.
2881 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
2882 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
2883 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
2884 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
2885 (expand_expr_real_1): Likewise.
2886 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
2887 (pad_below): Likewise.
2888 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2889 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
2890 * ira.c (get_subreg_tracking_sizes): Likewise.
2891 * ira-build.c (ira_create_allocno_objects): Likewise.
2892 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
2893 (ira_sort_regnos_for_alter_reg): Likewise.
2894 * ira-costs.c (record_operand_costs): Likewise.
2895 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
2896 (resolve_simple_move): Likewise.
2897 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
2898 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
2899 (lra_constraints): Likewise.
2900 (CONST_POOL_OK_P): Reject variable-sized modes.
2901 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
2902 (add_pseudo_to_slot, lra_spill): Likewise.
2903 * omp-low.c (omp_clause_aligned_alignment): Likewise.
2904 * optabs-query.c (get_best_extraction_insn): Likewise.
2905 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2906 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
2907 (expand_mult_highpart, valid_multiword_target_p): Likewise.
2908 * recog.c (offsettable_address_addr_space_p): Likewise.
2909 * regcprop.c (maybe_mode_change): Likewise.
2910 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
2911 * regrename.c (build_def_use): Likewise.
2912 * regstat.c (dump_reg_info): Likewise.
2913 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
2914 (find_reloads, find_reloads_subreg_address): Likewise.
2915 * reload1.c (eliminate_regs_1): Likewise.
2916 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
2917 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
2918 (simplify_binary_operation_1, simplify_subreg): Likewise.
2919 * targhooks.c (default_function_arg_padding): Likewise.
2920 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
2921 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
2922 (verify_gimple_assign_ternary): Likewise.
2923 * tree-inline.c (estimate_move_cost): Likewise.
2924 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2925 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
2926 (get_address_cost_ainc): Likewise.
2927 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
2928 (vect_supportable_dr_alignment): Likewise.
2929 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2930 (vectorizable_reduction): Likewise.
2931 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
2932 (vectorizable_operation, vectorizable_load): Likewise.
2933 * tree.c (build_same_sized_truth_vector_type): Likewise.
2934 * valtrack.c (cleanup_auto_inc_dec): Likewise.
2935 * var-tracking.c (emit_note_insn_var_location): Likewise.
2936 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
2937 (ADDR_VEC_ALIGN): Likewise.
2939 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2940 Alan Hayward <alan.hayward@arm.com>
2941 David Sherwood <david.sherwood@arm.com>
2943 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
2944 unsigned short.
2945 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2946 or if measurement_type is polynomial.
2947 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
2948 * combine.c (make_extraction): Likewise.
2949 * dse.c (find_shift_sequence): Likewise.
2950 * dwarf2out.c (mem_loc_descriptor): Likewise.
2951 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
2952 (extract_bit_field, extract_low_bits): Likewise.
2953 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
2954 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
2955 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
2956 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
2957 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2958 * reload.c (find_reloads): Likewise.
2959 * reload1.c (alter_reg): Likewise.
2960 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
2961 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
2962 * tree-if-conv.c (predicate_mem_writes): Likewise.
2963 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
2964 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
2965 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
2966 * valtrack.c (dead_debug_insert_temp): Likewise.
2967 * varasm.c (mergeable_constant_section): Likewise.
2968 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
2970 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2971 Alan Hayward <alan.hayward@arm.com>
2972 David Sherwood <david.sherwood@arm.com>
2974 * expr.c (expand_assignment): Cope with polynomial mode sizes
2975 when assigning to a CONCAT.
2977 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2978 Alan Hayward <alan.hayward@arm.com>
2979 David Sherwood <david.sherwood@arm.com>
2981 * machmode.h (mode_precision): Change from unsigned short to
2982 poly_uint16_pod.
2983 (mode_to_precision): Return a poly_uint16 rather than an unsigned
2984 short.
2985 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
2986 or if measurement_type is not polynomial.
2987 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
2988 in which the mode is already known to be a scalar_int_mode.
2989 * genmodes.c (emit_mode_precision): Change the type of mode_precision
2990 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
2991 initializer.
2992 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2993 for GET_MODE_PRECISION.
2994 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2995 for GET_MODE_PRECISION.
2996 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
2997 as polynomial.
2998 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
2999 (expand_field_assignment, make_extraction): Likewise.
3000 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3001 (get_last_value): Likewise.
3002 * convert.c (convert_to_integer_1): Likewise.
3003 * cse.c (cse_insn): Likewise.
3004 * expr.c (expand_expr_real_1): Likewise.
3005 * lra-constraints.c (simplify_operand_subreg): Likewise.
3006 * optabs-query.c (can_atomic_load_p): Likewise.
3007 * optabs.c (expand_atomic_load): Likewise.
3008 (expand_atomic_store): Likewise.
3009 * ree.c (combine_reaching_defs): Likewise.
3010 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3011 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3012 * tree.h (type_has_mode_precision_p): Likewise.
3013 * ubsan.c (instrument_si_overflow): Likewise.
3015 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3016 Alan Hayward <alan.hayward@arm.com>
3017 David Sherwood <david.sherwood@arm.com>
3019 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3020 polynomial numbers of units.
3021 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3022 (valid_vector_subparts_p): New function.
3023 (build_vector_type): Remove temporary shim and take the number
3024 of units as a poly_uint64 rather than an int.
3025 (build_opaque_vector_type): Take the number of units as a
3026 poly_uint64 rather than an int.
3027 * tree.c (build_vector_from_ctor): Handle polynomial
3028 TYPE_VECTOR_SUBPARTS.
3029 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3030 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3031 (build_vector_from_val): If the number of units is variable,
3032 use build_vec_duplicate_cst for constant operands and
3033 VEC_DUPLICATE_EXPR otherwise.
3034 (make_vector_type): Remove temporary is_constant ().
3035 (build_vector_type, build_opaque_vector_type): Take the number of
3036 units as a poly_uint64 rather than an int.
3037 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3038 VECTOR_CST_NELTS.
3039 * cfgexpand.c (expand_debug_expr): Likewise.
3040 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3041 (store_constructor, expand_expr_real_1): Likewise.
3042 (const_scalar_mask_from_tree): Likewise.
3043 * fold-const-call.c (fold_const_reduction): Likewise.
3044 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3045 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3046 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3047 (fold_relational_const): Likewise.
3048 (native_interpret_vector): Likewise. Change the size from an
3049 int to an unsigned int.
3050 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3051 TYPE_VECTOR_SUBPARTS.
3052 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3053 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3054 duplicating a non-constant operand into a variable-length vector.
3055 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3056 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3057 * ipa-icf.c (sem_variable::equals): Likewise.
3058 * match.pd: Likewise.
3059 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3060 * print-tree.c (print_node): Likewise.
3061 * stor-layout.c (layout_type): Likewise.
3062 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3063 * tree-cfg.c (verify_gimple_comparison): Likewise.
3064 (verify_gimple_assign_binary): Likewise.
3065 (verify_gimple_assign_ternary): Likewise.
3066 (verify_gimple_assign_single): Likewise.
3067 * tree-pretty-print.c (dump_generic_node): Likewise.
3068 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3069 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3070 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3071 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3072 (vect_shift_permute_load_chain): Likewise.
3073 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3074 (expand_vector_condition, optimize_vector_constructor): Likewise.
3075 (lower_vec_perm, get_compute_type): Likewise.
3076 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3077 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3078 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3079 (vect_recog_mask_conversion_pattern): Likewise.
3080 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3081 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3082 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3083 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3084 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3085 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3086 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3087 (supportable_widening_operation): Likewise.
3088 (supportable_narrowing_operation): Likewise.
3089 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3090 Likewise.
3091 * varasm.c (output_constant): Likewise.
3093 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3094 Alan Hayward <alan.hayward@arm.com>
3095 David Sherwood <david.sherwood@arm.com>
3097 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3098 so that both the length == 3 and length != 3 cases set up their
3099 own permute vectors. Add comments explaining why we know the
3100 number of elements is constant.
3101 (vect_permute_load_chain): Likewise.
3103 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3104 Alan Hayward <alan.hayward@arm.com>
3105 David Sherwood <david.sherwood@arm.com>
3107 * machmode.h (mode_nunits): Change from unsigned char to
3108 poly_uint16_pod.
3109 (ONLY_FIXED_SIZE_MODES): New macro.
3110 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3111 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3112 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3113 New typedefs.
3114 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3115 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3116 or if measurement_type is not polynomial.
3117 * genmodes.c (ZERO_COEFFS): New macro.
3118 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3119 poly_uint16.
3120 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3121 Use ZERO_COEFFS when emitting initializers.
3122 * data-streamer.h (bp_pack_poly_value): New function.
3123 (bp_unpack_poly_value): Likewise.
3124 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3125 for GET_MODE_NUNITS.
3126 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3127 for GET_MODE_NUNITS.
3128 * tree.c (make_vector_type): Remove temporary shim and make
3129 the real function take the number of units as a poly_uint64
3130 rather than an int.
3131 (build_vector_type_for_mode): Handle polynomial nunits.
3132 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3133 * emit-rtl.c (const_vec_series_p_1): Likewise.
3134 (gen_rtx_CONST_VECTOR): Likewise.
3135 * fold-const.c (test_vec_duplicate_folding): Likewise.
3136 * genrecog.c (validate_pattern): Likewise.
3137 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3138 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3139 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3140 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3141 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3142 * rtlanal.c (subreg_get_info): Likewise.
3143 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3144 (vect_grouped_load_supported): Likewise.
3145 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3146 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3147 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3148 (simplify_const_unary_operation, simplify_binary_operation_1)
3149 (simplify_const_binary_operation, simplify_ternary_operation)
3150 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3151 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3152 instead of CONST_VECTOR_NUNITS.
3153 * varasm.c (output_constant_pool_2): Likewise.
3154 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3155 explicit-encoded elements in the XVEC for variable-length vectors.
3157 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3159 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3161 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3162 Alan Hayward <alan.hayward@arm.com>
3163 David Sherwood <david.sherwood@arm.com>
3165 * coretypes.h (fixed_size_mode): Declare.
3166 (fixed_size_mode_pod): New typedef.
3167 * builtins.h (target_builtins::x_apply_args_mode)
3168 (target_builtins::x_apply_result_mode): Change type to
3169 fixed_size_mode_pod.
3170 * builtins.c (apply_args_size, apply_result_size, result_vector)
3171 (expand_builtin_apply_args_1, expand_builtin_apply)
3172 (expand_builtin_return): Update accordingly.
3174 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3176 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3177 * cselib.c (cselib_hash_rtx): Likewise.
3178 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3179 CONST_VECTOR encoding.
3181 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3182 Jeff Law <law@redhat.com>
3184 PR target/83641
3185 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3186 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3187 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3188 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3190 PR target/83641
3191 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3192 explicitly probe *sp in a noreturn function if there were any callee
3193 register saves or frame pointer is needed.
3195 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3197 PR debug/83621
3198 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3199 BLKmode for ternary, binary or unary expressions.
3201 PR debug/83645
3202 * var-tracking.c (delete_vta_debug_insn): New inline function.
3203 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3204 insns from get_insns () to NULL instead of each bb separately.
3205 Use delete_vta_debug_insn. No longer static.
3206 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3207 delete_vta_debug_insns callers.
3208 * rtl.h (delete_vta_debug_insns): Declare.
3209 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3210 instead of variable_tracking_main.
3212 2018-01-03 Martin Sebor <msebor@redhat.com>
3214 PR tree-optimization/83603
3215 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3216 arguments past the endof the argument list in functions declared
3217 without a prototype.
3218 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3219 Avoid checking when arguments are null.
3221 2018-01-03 Martin Sebor <msebor@redhat.com>
3223 PR c/83559
3224 * doc/extend.texi (attribute const): Fix a typo.
3225 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3226 issuing -Wsuggest-attribute for void functions.
3228 2018-01-03 Martin Sebor <msebor@redhat.com>
3230 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3231 offset_int::from instead of wide_int::to_shwi.
3232 (maybe_diag_overlap): Remove assertion.
3233 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3234 * gimple-ssa-sprintf.c (format_directive): Same.
3235 (parse_directive): Same.
3236 (sprintf_dom_walker::compute_format_length): Same.
3237 (try_substitute_return_value): Same.
3239 2017-01-03 Jeff Law <law@redhat.com>
3241 PR middle-end/83654
3242 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3243 non-constant residual for zero at runtime and avoid probing in
3244 that case. Reorganize code for trailing problem to mirror handling
3245 of the residual.
3247 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3249 PR tree-optimization/83501
3250 * tree-ssa-strlen.c (get_string_cst): New.
3251 (handle_char_store): Call get_string_cst.
3253 2018-01-03 Martin Liska <mliska@suse.cz>
3255 PR tree-optimization/83593
3256 * tree-ssa-strlen.c: Include tree-cfg.h.
3257 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3258 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3259 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3260 to false.
3261 (strlen_dom_walker::before_dom_children): Call
3262 gimple_purge_dead_eh_edges. Dump tranformation with details
3263 dump flags.
3264 (strlen_dom_walker::before_dom_children): Update call by adding
3265 new argument cleanup_eh.
3266 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3268 2018-01-03 Martin Liska <mliska@suse.cz>
3270 PR ipa/83549
3271 * cif-code.def (VARIADIC_THUNK): New enum value.
3272 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3273 thunks.
3275 2018-01-03 Jan Beulich <jbeulich@suse.com>
3277 * sse.md (mov<mode>_internal): Tighten condition for when to use
3278 vmovdqu<ssescalarsize> for TI and OI modes.
3280 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3282 Update copyright years.
3284 2018-01-03 Martin Liska <mliska@suse.cz>
3286 PR ipa/83594
3287 * ipa-visibility.c (function_and_variable_visibility): Skip
3288 functions with noipa attribure.
3290 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3292 * gcc.c (process_command): Update copyright notice dates.
3293 * gcov-dump.c (print_version): Ditto.
3294 * gcov.c (print_version): Ditto.
3295 * gcov-tool.c (print_version): Ditto.
3296 * gengtype.c (create_file): Ditto.
3297 * doc/cpp.texi: Bump @copying's copyright year.
3298 * doc/cppinternals.texi: Ditto.
3299 * doc/gcc.texi: Ditto.
3300 * doc/gccint.texi: Ditto.
3301 * doc/gcov.texi: Ditto.
3302 * doc/install.texi: Ditto.
3303 * doc/invoke.texi: Ditto.
3305 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3307 * vector-builder.h (vector_builder::m_full_nelts): Change from
3308 unsigned int to poly_uint64.
3309 (vector_builder::full_nelts): Update prototype accordingly.
3310 (vector_builder::new_vector): Likewise.
3311 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3312 (vector_builder::operator ==): Likewise.
3313 (vector_builder::finalize): Likewise.
3314 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3315 Take the number of elements as a poly_uint64 rather than an
3316 unsigned int.
3317 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3318 from unsigned int to poly_uint64.
3319 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3320 (vec_perm_indices::new_vector): Likewise.
3321 (vec_perm_indices::length): Likewise.
3322 (vec_perm_indices::nelts_per_input): Likewise.
3323 (vec_perm_indices::input_nelts): Likewise.
3324 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3325 number of elements per input as a poly_uint64 rather than an
3326 unsigned int. Use the original encoding for variable-length
3327 vectors, rather than clamping each individual element.
3328 For the second and subsequent elements in each pattern,
3329 clamp the step and base before clamping their sum.
3330 (vec_perm_indices::series_p): Handle polynomial element counts.
3331 (vec_perm_indices::all_in_range_p): Likewise.
3332 (vec_perm_indices_to_tree): Likewise.
3333 (vec_perm_indices_to_rtx): Likewise.
3334 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3335 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3336 (tree_vector_builder::new_binary_operation): Handle polynomial
3337 element counts. Return false if we need to know the number
3338 of elements at compile time.
3339 * fold-const.c (fold_vec_perm): Punt if the number of elements
3340 isn't known at compile time.
3342 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3344 * vec-perm-indices.h (vec_perm_builder): Change element type
3345 from HOST_WIDE_INT to poly_int64.
3346 (vec_perm_indices::element_type): Update accordingly.
3347 (vec_perm_indices::clamp): Handle polynomial element_types.
3348 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3349 (vec_perm_indices::all_in_range_p): Likewise.
3350 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3351 than shwi trees.
3352 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3353 polynomial vec_perm_indices element types.
3354 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3355 * fold-const.c (fold_vec_perm): Likewise.
3356 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3357 * tree-vect-generic.c (lower_vec_perm): Likewise.
3358 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3359 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3360 element type to HOST_WIDE_INT.
3362 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3363 Alan Hayward <alan.hayward@arm.com>
3364 David Sherwood <david.sherwood@arm.com>
3366 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3367 rather than an int. Use plus_constant.
3368 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3369 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3371 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3372 Alan Hayward <alan.hayward@arm.com>
3373 David Sherwood <david.sherwood@arm.com>
3375 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3376 a HOST_WIDE_INT to a poly_int64.
3378 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3379 Alan Hayward <alan.hayward@arm.com>
3380 David Sherwood <david.sherwood@arm.com>
3382 * calls.c (load_register_parameters): Cope with polynomial
3383 mode sizes. Require a constant size for BLKmode parameters
3384 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3385 forces a parameter to be padded at the lsb end in order to
3386 fill a complete number of words, require the parameter size
3387 to be ordered wrt UNITS_PER_WORD.
3389 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3390 Alan Hayward <alan.hayward@arm.com>
3391 David Sherwood <david.sherwood@arm.com>
3393 * reload1.c (spill_stack_slot_width): Change element type
3394 from unsigned int to poly_uint64_pod.
3395 (alter_reg): Treat mode sizes as polynomial.
3397 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3398 Alan Hayward <alan.hayward@arm.com>
3399 David Sherwood <david.sherwood@arm.com>
3401 * reload.c (complex_word_subreg_p): New function.
3402 (reload_inner_reg_of_subreg, push_reload): Use it.
3404 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3405 Alan Hayward <alan.hayward@arm.com>
3406 David Sherwood <david.sherwood@arm.com>
3408 * lra-constraints.c (process_alt_operands): Reject matched
3409 operands whose sizes aren't ordered.
3410 (match_reload): Refer to this check here.
3412 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3413 Alan Hayward <alan.hayward@arm.com>
3414 David Sherwood <david.sherwood@arm.com>
3416 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3417 that the mode size is in the set {1, 2, 4, 8, 16}.
3419 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3420 Alan Hayward <alan.hayward@arm.com>
3421 David Sherwood <david.sherwood@arm.com>
3423 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3424 Use plus_constant instead of gen_rtx_PLUS.
3426 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3427 Alan Hayward <alan.hayward@arm.com>
3428 David Sherwood <david.sherwood@arm.com>
3430 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3431 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3432 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3433 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3434 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3435 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3436 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3437 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3438 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3439 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3440 a poly_int64.
3441 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3442 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3443 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3444 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3445 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3446 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3447 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3448 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3449 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3450 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3451 function.
3452 * expr.c (emit_move_resolve_push): Treat the input and result
3453 of PUSH_ROUNDING as a poly_int64.
3454 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3455 (emit_push_insn): Likewise.
3456 * lra-eliminations.c (mark_not_eliminable): Likewise.
3457 * recog.c (push_operand): Likewise.
3458 * reload1.c (elimination_effects): Likewise.
3459 * rtlanal.c (nonzero_bits1): Likewise.
3460 * calls.c (store_one_arg): Likewise. Require the padding to be
3461 known at compile time.
3463 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3464 Alan Hayward <alan.hayward@arm.com>
3465 David Sherwood <david.sherwood@arm.com>
3467 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3468 Use plus_constant instead of gen_rtx_PLUS.
3470 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3471 Alan Hayward <alan.hayward@arm.com>
3472 David Sherwood <david.sherwood@arm.com>
3474 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3475 rather than an int.
3477 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3478 Alan Hayward <alan.hayward@arm.com>
3479 David Sherwood <david.sherwood@arm.com>
3481 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3482 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3483 via stack temporaries. Treat the mode size as polynomial too.
3485 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3486 Alan Hayward <alan.hayward@arm.com>
3487 David Sherwood <david.sherwood@arm.com>
3489 * expr.c (expand_expr_real_2): When handling conversions involving
3490 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3491 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3492 as a poly_uint64 too.
3494 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3495 Alan Hayward <alan.hayward@arm.com>
3496 David Sherwood <david.sherwood@arm.com>
3498 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3500 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3501 Alan Hayward <alan.hayward@arm.com>
3502 David Sherwood <david.sherwood@arm.com>
3504 * combine.c (can_change_dest_mode): Handle polynomial
3505 REGMODE_NATURAL_SIZE.
3506 * expmed.c (store_bit_field_1): Likewise.
3507 * expr.c (store_constructor): Likewise.
3508 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3509 and polynomial REGMODE_NATURAL_SIZE.
3510 (gen_lowpart_common): Likewise.
3511 * reginfo.c (record_subregs_of_mode): Likewise.
3512 * rtlanal.c (read_modify_subreg_p): Likewise.
3514 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3515 Alan Hayward <alan.hayward@arm.com>
3516 David Sherwood <david.sherwood@arm.com>
3518 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3519 numbers of elements.
3521 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3522 Alan Hayward <alan.hayward@arm.com>
3523 David Sherwood <david.sherwood@arm.com>
3525 * match.pd: Cope with polynomial numbers of vector elements.
3527 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3528 Alan Hayward <alan.hayward@arm.com>
3529 David Sherwood <david.sherwood@arm.com>
3531 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3532 in a POINTER_PLUS_EXPR.
3534 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3535 Alan Hayward <alan.hayward@arm.com>
3536 David Sherwood <david.sherwood@arm.com>
3538 * omp-simd-clone.c (simd_clone_subparts): New function.
3539 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3540 (ipa_simd_modify_function_body): Likewise.
3542 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3543 Alan Hayward <alan.hayward@arm.com>
3544 David Sherwood <david.sherwood@arm.com>
3546 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3547 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3548 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3549 (expand_vector_condition, vector_element): Likewise.
3550 (subparts_gt): New function.
3551 (get_compute_type): Use subparts_gt.
3552 (count_type_subparts): Delete.
3553 (expand_vector_operations_1): Use subparts_gt instead of
3554 count_type_subparts.
3556 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3557 Alan Hayward <alan.hayward@arm.com>
3558 David Sherwood <david.sherwood@arm.com>
3560 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3561 (vect_compile_time_alias): ...this new function. Do the calculation
3562 on poly_ints rather than trees.
3563 (vect_prune_runtime_alias_test_list): Update call accordingly.
3565 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3566 Alan Hayward <alan.hayward@arm.com>
3567 David Sherwood <david.sherwood@arm.com>
3569 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3570 numbers of units.
3571 (vect_schedule_slp_instance): Likewise.
3573 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3574 Alan Hayward <alan.hayward@arm.com>
3575 David Sherwood <david.sherwood@arm.com>
3577 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3578 constant and extern definitions for variable-length vectors.
3579 (vect_get_constant_vectors): Note that the number of units
3580 is known to be constant.
3582 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3583 Alan Hayward <alan.hayward@arm.com>
3584 David Sherwood <david.sherwood@arm.com>
3586 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3587 of units as polynomial. Choose between WIDE and NARROW based
3588 on multiple_p.
3590 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3591 Alan Hayward <alan.hayward@arm.com>
3592 David Sherwood <david.sherwood@arm.com>
3594 * tree-vect-stmts.c (simd_clone_subparts): New function.
3595 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3597 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3598 Alan Hayward <alan.hayward@arm.com>
3599 David Sherwood <david.sherwood@arm.com>
3601 * tree-vect-stmts.c (vectorizable_call): Treat the number of
3602 vectors as polynomial. Use build_index_vector for
3603 IFN_GOMP_SIMD_LANE.
3605 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3606 Alan Hayward <alan.hayward@arm.com>
3607 David Sherwood <david.sherwood@arm.com>
3609 * tree-vect-stmts.c (get_load_store_type): Treat the number of
3610 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3611 for variable-length vectors.
3612 (vectorizable_mask_load_store): Treat the number of units as
3613 polynomial, asserting that it is constant if the condition has
3614 already been enforced.
3615 (vectorizable_store, vectorizable_load): Likewise.
3617 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3618 Alan Hayward <alan.hayward@arm.com>
3619 David Sherwood <david.sherwood@arm.com>
3621 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3622 of units as polynomial. Punt if we can't tell at compile time
3623 which vector contains the final result.
3625 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3626 Alan Hayward <alan.hayward@arm.com>
3627 David Sherwood <david.sherwood@arm.com>
3629 * tree-vect-loop.c (vectorizable_induction): Treat the number
3630 of units as polynomial. Punt on SLP inductions. Use an integer
3631 VEC_SERIES_EXPR for variable-length integer reductions. Use a
3632 cast of such a series for variable-length floating-point
3633 reductions.
3635 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3636 Alan Hayward <alan.hayward@arm.com>
3637 David Sherwood <david.sherwood@arm.com>
3639 * tree.h (build_index_vector): Declare.
3640 * tree.c (build_index_vector): New function.
3641 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3642 of units as polynomial, forcibly converting it to a constant if
3643 vectorizable_reduction has already enforced the condition.
3644 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
3645 to create a {1,2,3,...} vector.
3646 (vectorizable_reduction): Treat the number of units as polynomial.
3647 Choose vectype_in based on the largest scalar element size rather
3648 than the smallest number of units. Enforce the restrictions
3649 relied on above.
3651 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3652 Alan Hayward <alan.hayward@arm.com>
3653 David Sherwood <david.sherwood@arm.com>
3655 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
3656 number of units as polynomial.
3658 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3659 Alan Hayward <alan.hayward@arm.com>
3660 David Sherwood <david.sherwood@arm.com>
3662 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
3663 * target.def (autovectorize_vector_sizes): Return the vector sizes
3664 by pointer, using vector_sizes rather than a bitmask.
3665 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
3666 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
3667 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
3668 Likewise.
3669 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
3670 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
3671 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
3672 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
3673 * omp-general.c (omp_max_vf): Likewise.
3674 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3675 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
3676 * tree-vect-loop.c (vect_analyze_loop): Likewise.
3677 * tree-vect-slp.c (vect_slp_bb): Likewise.
3678 * doc/tm.texi: Regenerate.
3679 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3680 to a poly_uint64.
3681 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3682 the vector size as a poly_uint64 rather than an unsigned int.
3683 (current_vector_size): Change from an unsigned int to a poly_uint64.
3684 (get_vectype_for_scalar_type): Update accordingly.
3685 * tree.h (build_truth_vector_type): Take the size and number of
3686 units as a poly_uint64 rather than an unsigned int.
3687 (build_vector_type): Add a temporary overload that takes
3688 the number of units as a poly_uint64 rather than an unsigned int.
3689 * tree.c (make_vector_type): Likewise.
3690 (build_truth_vector_type): Take the number of units as a poly_uint64
3691 rather than an unsigned int.
3693 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3694 Alan Hayward <alan.hayward@arm.com>
3695 David Sherwood <david.sherwood@arm.com>
3697 * target.def (get_mask_mode): Take the number of units and length
3698 as poly_uint64s rather than unsigned ints.
3699 * targhooks.h (default_get_mask_mode): Update accordingly.
3700 * targhooks.c (default_get_mask_mode): Likewise.
3701 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3702 * doc/tm.texi: Regenerate.
3704 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3705 Alan Hayward <alan.hayward@arm.com>
3706 David Sherwood <david.sherwood@arm.com>
3708 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
3709 * omp-general.c (omp_max_vf): Likewise.
3710 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
3711 (expand_omp_simd): Handle polynomial safelen.
3712 * omp-low.c (omplow_simd_context): Add a default constructor.
3713 (omplow_simd_context::max_vf): Change from int to poly_uint64.
3714 (lower_rec_simd_input_clauses): Update accordingly.
3715 (lower_rec_input_clauses): Likewise.
3717 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3718 Alan Hayward <alan.hayward@arm.com>
3719 David Sherwood <david.sherwood@arm.com>
3721 * tree-vectorizer.h (vect_nunits_for_cost): New function.
3722 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
3723 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
3724 (vect_analyze_slp_cost): Likewise.
3725 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
3726 (vect_model_load_cost): Likewise.
3728 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3729 Alan Hayward <alan.hayward@arm.com>
3730 David Sherwood <david.sherwood@arm.com>
3732 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
3733 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
3734 from an unsigned int * to a poly_uint64_pod *.
3735 (calculate_unrolling_factor): New function.
3736 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
3738 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3739 Alan Hayward <alan.hayward@arm.com>
3740 David Sherwood <david.sherwood@arm.com>
3742 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
3743 from an unsigned int to a poly_uint64.
3744 (_loop_vec_info::slp_unrolling_factor): Likewise.
3745 (_loop_vec_info::vectorization_factor): Change from an int
3746 to a poly_uint64.
3747 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
3748 (vect_get_num_vectors): New function.
3749 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
3750 (vect_get_num_copies): Use vect_get_num_vectors.
3751 (vect_analyze_data_ref_dependences): Change max_vf from an int *
3752 to an unsigned int *.
3753 (vect_analyze_data_refs): Change min_vf from an int * to a
3754 poly_uint64 *.
3755 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3756 than an unsigned HOST_WIDE_INT.
3757 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
3758 (vect_analyze_data_ref_dependence): Change max_vf from an int *
3759 to an unsigned int *.
3760 (vect_analyze_data_ref_dependences): Likewise.
3761 (vect_compute_data_ref_alignment): Handle polynomial vf.
3762 (vect_enhance_data_refs_alignment): Likewise.
3763 (vect_prune_runtime_alias_test_list): Likewise.
3764 (vect_shift_permute_load_chain): Likewise.
3765 (vect_supportable_dr_alignment): Likewise.
3766 (dependence_distance_ge_vf): Take the vectorization factor as a
3767 poly_uint64 rather than an unsigned HOST_WIDE_INT.
3768 (vect_analyze_data_refs): Change min_vf from an int * to a
3769 poly_uint64 *.
3770 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
3771 vfm1 as a poly_uint64 rather than an int. Make the same change
3772 for the returned bound_scalar.
3773 (vect_gen_vector_loop_niters): Handle polynomial vf.
3774 (vect_do_peeling): Likewise. Update call to
3775 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
3776 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
3777 be constant.
3778 * tree-vect-loop.c (vect_determine_vectorization_factor)
3779 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
3780 (vect_get_known_peeling_cost): Likewise.
3781 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
3782 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
3783 (vect_transform_loop): Likewise. Use the lowest possible VF when
3784 updating the upper bounds of the loop.
3785 (vect_min_worthwhile_factor): Make static. Return an unsigned int
3786 rather than an int.
3787 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
3788 polynomial unroll factors.
3789 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
3790 (vect_make_slp_decision): Likewise.
3791 (vect_supported_load_permutation_p): Likewise, and polynomial
3792 vf too.
3793 (vect_analyze_slp_cost): Handle polynomial vf.
3794 (vect_slp_analyze_node_operations): Likewise.
3795 (vect_slp_analyze_bb_1): Likewise.
3796 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3797 than an unsigned HOST_WIDE_INT.
3798 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
3799 (vectorizable_load): Handle polynomial vf.
3800 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
3801 a poly_uint64.
3802 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
3804 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3805 Alan Hayward <alan.hayward@arm.com>
3806 David Sherwood <david.sherwood@arm.com>
3808 * match.pd: Handle bit operations involving three constants
3809 and try to fold one pair.
3811 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3813 * tree-vect-loop-manip.c: Include gimple-fold.h.
3814 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
3815 niters_maybe_zero parameters. Handle other cases besides a step of 1.
3816 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
3817 Add a path that uses a step of VF instead of 1, but disable it
3818 for now.
3819 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
3820 and niters_no_overflow parameters. Update calls to
3821 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
3822 Create a new SSA name if the latter choses to use a ste other
3823 than zero, and return it via niters_vector_mult_vf_var.
3824 * tree-vect-loop.c (vect_transform_loop): Update calls to
3825 vect_do_peeling, vect_gen_vector_loop_niters and
3826 slpeel_make_loop_iterate_ntimes.
3827 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
3828 (vect_gen_vector_loop_niters): Update declarations after above changes.
3830 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
3832 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
3833 128-bit round to integer instructions.
3834 (ceil<mode>2): Likewise.
3835 (btrunc<mode>2): Likewise.
3836 (round<mode>2): Likewise.
3838 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3840 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
3841 unaligned VSX load/store on P8/P9.
3842 (expand_block_clear): Allow the use of unaligned VSX
3843 load/store on P8/P9.
3845 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
3847 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
3848 New function.
3849 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
3850 swap associated with both a load and a store.
3852 2018-01-02 Andrew Waterman <andrew@sifive.com>
3854 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
3855 * config/riscv/riscv.md (clear_cache): Use it.
3857 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
3859 * web.c: Remove out-of-date comment.
3861 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3863 * expr.c (fixup_args_size_notes): Check that any existing
3864 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
3865 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
3866 (emit_single_push_insn): ...here.
3868 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3870 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
3871 (const_vector_encoded_nelts): New function.
3872 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
3873 (const_vector_int_elt, const_vector_elt): Declare.
3874 * emit-rtl.c (const_vector_int_elt_1): New function.
3875 (const_vector_elt): Likewise.
3876 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
3877 of CONST_VECTOR_ELT.
3879 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3881 * expr.c: Include rtx-vector-builder.h.
3882 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
3883 directly on the tree encoding.
3884 (const_vector_from_tree): Likewise.
3885 * optabs.c: Include rtx-vector-builder.h.
3886 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
3887 sequence of "u" values.
3888 * vec-perm-indices.c: Include rtx-vector-builder.h.
3889 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
3890 directly on the vec_perm_indices encoding.
3892 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3894 * doc/rtl.texi (const_vector): Describe new encoding scheme.
3895 * Makefile.in (OBJS): Add rtx-vector-builder.o.
3896 * rtx-vector-builder.h: New file.
3897 * rtx-vector-builder.c: Likewise.
3898 * rtl.h (rtx_def::u2): Add a const_vector field.
3899 (CONST_VECTOR_NPATTERNS): New macro.
3900 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
3901 (CONST_VECTOR_DUPLICATE_P): Likewise.
3902 (CONST_VECTOR_STEPPED_P): Likewise.
3903 (CONST_VECTOR_ENCODED_ELT): Likewise.
3904 (const_vec_duplicate_p): Check for a duplicated vector encoding.
3905 (unwrap_const_vec_duplicate): Likewise.
3906 (const_vec_series_p): Check for a non-duplicated vector encoding.
3907 Say that the function only returns true for integer vectors.
3908 * emit-rtl.c: Include rtx-vector-builder.h.
3909 (gen_const_vec_duplicate_1): Delete.
3910 (gen_const_vector): Call gen_const_vec_duplicate instead of
3911 gen_const_vec_duplicate_1.
3912 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
3913 (gen_const_vec_duplicate): Use rtx_vector_builder.
3914 (gen_const_vec_series): Likewise.
3915 (gen_rtx_CONST_VECTOR): Likewise.
3916 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
3917 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3918 Build a new vector rather than modifying a CONST_VECTOR in-place.
3919 (handle_special_swappables): Update call accordingly.
3920 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
3921 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3922 Build a new vector rather than modifying a CONST_VECTOR in-place.
3923 (handle_special_swappables): Update call accordingly.
3925 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3927 * simplify-rtx.c (simplify_const_binary_operation): Use
3928 CONST_VECTOR_ELT instead of XVECEXP.
3930 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3932 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
3933 the selector elements to be different from the data elements
3934 if the selector is a VECTOR_CST.
3935 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
3936 ssizetype for the selector.
3938 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3940 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
3941 before testing each element individually.
3942 * tree-vect-generic.c (lower_vec_perm): Likewise.
3944 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3946 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
3947 * selftest-run-tests.c (selftest::run_tests): Call it.
3948 * vector-builder.h (vector_builder::operator ==): New function.
3949 (vector_builder::operator !=): Likewise.
3950 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
3951 (vec_perm_indices::all_from_input_p): New function.
3952 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3953 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
3954 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
3955 instead of reading the VECTOR_CST directly. Detect whether both
3956 vector inputs are the same before constructing the vec_perm_indices,
3957 and update the number of inputs argument accordingly. Use the
3958 utility functions added above. Only construct sel2 if we need to.
3960 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3962 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
3963 the broadcast of the low byte.
3964 (expand_mult_highpart): Use an explicit encoding for the permutes.
3965 * optabs-query.c (can_mult_highpart_p): Likewise.
3966 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
3967 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3968 (vectorizable_bswap): Likewise.
3969 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
3970 explicit encoding for the power-of-2 permutes.
3971 (vect_permute_store_chain): Likewise.
3972 (vect_grouped_load_supported): Likewise.
3973 (vect_permute_load_chain): Likewise.
3975 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3977 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
3978 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
3979 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
3980 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3981 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
3982 (vect_gen_perm_mask_any): Likewise.
3984 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3986 * int-vector-builder.h: New file.
3987 * vec-perm-indices.h: Include int-vector-builder.h.
3988 (vec_perm_indices): Redefine as an int_vector_builder.
3989 (auto_vec_perm_indices): Delete.
3990 (vec_perm_builder): Redefine as a stand-alone class.
3991 (vec_perm_indices::vec_perm_indices): New function.
3992 (vec_perm_indices::clamp): Likewise.
3993 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
3994 (vec_perm_indices::new_vector): New function.
3995 (vec_perm_indices::new_expanded_vector): Update for new
3996 vec_perm_indices class.
3997 (vec_perm_indices::rotate_inputs): New function.
3998 (vec_perm_indices::all_in_range_p): Operate directly on the
3999 encoded form, without computing elided elements.
4000 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4001 encoding. Update for new vec_perm_indices class.
4002 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4003 the given vec_perm_builder.
4004 (expand_vec_perm_var): Update vec_perm_builder constructor.
4005 (expand_mult_highpart): Use vec_perm_builder instead of
4006 auto_vec_perm_indices.
4007 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4008 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4009 or double series encoding as appropriate.
4010 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4011 vec_perm_indices instead of auto_vec_perm_indices.
4012 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4013 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4014 (vect_permute_store_chain): Likewise.
4015 (vect_grouped_load_supported): Likewise.
4016 (vect_permute_load_chain): Likewise.
4017 (vect_shift_permute_load_chain): Likewise.
4018 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4019 (vect_transform_slp_perm_load): Likewise.
4020 (vect_schedule_slp_instance): Likewise.
4021 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4022 (vectorizable_mask_load_store): Likewise.
4023 (vectorizable_bswap): Likewise.
4024 (vectorizable_store): Likewise.
4025 (vectorizable_load): Likewise.
4026 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4027 vec_perm_indices instead of auto_vec_perm_indices. Use
4028 tree_to_vec_perm_builder to read the vector from a tree.
4029 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4030 vec_perm_builder instead of a vec_perm_indices.
4031 (have_whole_vector_shift): Use vec_perm_builder and
4032 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4033 truncation to calc_vec_perm_mask_for_shift.
4034 (vect_create_epilog_for_reduction): Likewise.
4035 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4036 from auto_vec_perm_indices to vec_perm_indices.
4037 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4038 instead of changing individual elements.
4039 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4040 the vector in d.perm.
4041 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4042 from auto_vec_perm_indices to vec_perm_indices.
4043 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4044 instead of changing individual elements.
4045 (arm_vectorize_vec_perm_const): Use new_vector to install
4046 the vector in d.perm.
4047 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4048 Update vec_perm_builder constructor.
4049 (rs6000_expand_interleave): Likewise.
4050 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4051 (rs6000_expand_interleave): Likewise.
4053 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4055 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4056 to qimode could truncate the indices.
4057 * optabs.c (expand_vec_perm_var): Likewise.
4059 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4061 * Makefile.in (OBJS): Add vec-perm-indices.o.
4062 * vec-perm-indices.h: New file.
4063 * vec-perm-indices.c: Likewise.
4064 * target.h (vec_perm_indices): Replace with a forward class
4065 declaration.
4066 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4067 * optabs.h: Include vec-perm-indices.h.
4068 (expand_vec_perm): Delete.
4069 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4070 (expand_vec_perm_const): Declare.
4071 * target.def (vec_perm_const_ok): Replace with...
4072 (vec_perm_const): ...this new hook.
4073 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4074 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4075 * doc/tm.texi: Regenerate.
4076 * optabs.def (vec_perm_const): Delete.
4077 * doc/md.texi (vec_perm_const): Likewise.
4078 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4079 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4080 expand_vec_perm for constant permutation vectors. Assert that
4081 the mode of variable permutation vectors is the integer equivalent
4082 of the mode that is being permuted.
4083 * optabs-query.h (selector_fits_mode_p): Declare.
4084 * optabs-query.c: Include vec-perm-indices.h.
4085 (selector_fits_mode_p): New function.
4086 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4087 is defined, instead of checking whether the vec_perm_const_optab
4088 exists. Use targetm.vectorize.vec_perm_const instead of
4089 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4090 fit in the vector mode before using a variable permute.
4091 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4092 vec_perm_indices instead of an rtx.
4093 (expand_vec_perm): Replace with...
4094 (expand_vec_perm_const): ...this new function. Take the selector
4095 as a vec_perm_indices rather than an rtx. Also take the mode of
4096 the selector. Update call to shift_amt_for_vec_perm_mask.
4097 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4098 Use vec_perm_indices::new_expanded_vector to expand the original
4099 selector into bytes. Check whether the indices fit in the vector
4100 mode before using a variable permute.
4101 (expand_vec_perm_var): Make global.
4102 (expand_mult_highpart): Use expand_vec_perm_const.
4103 * fold-const.c: Includes vec-perm-indices.h.
4104 * tree-ssa-forwprop.c: Likewise.
4105 * tree-vect-data-refs.c: Likewise.
4106 * tree-vect-generic.c: Likewise.
4107 * tree-vect-loop.c: Likewise.
4108 * tree-vect-slp.c: Likewise.
4109 * tree-vect-stmts.c: Likewise.
4110 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4111 Delete.
4112 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4113 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4114 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4115 (aarch64_vectorize_vec_perm_const): ...this new function.
4116 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4117 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4118 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4119 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4120 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4121 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4122 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4123 into...
4124 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4125 check for NEON modes.
4126 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4127 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4128 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4129 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4130 into...
4131 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4132 the old VEC_PERM_CONST conditions.
4133 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4134 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4135 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4136 (ia64_vectorize_vec_perm_const_ok): Merge into...
4137 (ia64_vectorize_vec_perm_const): ...this new function.
4138 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4139 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4140 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4141 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4142 * config/mips/mips.c (mips_expand_vec_perm_const)
4143 (mips_vectorize_vec_perm_const_ok): Merge into...
4144 (mips_vectorize_vec_perm_const): ...this new function.
4145 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4146 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4147 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4148 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4149 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4150 (rs6000_expand_vec_perm_const): Delete.
4151 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4152 Delete.
4153 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4154 (altivec_expand_vec_perm_const_le): Take each operand individually.
4155 Operate on constant selectors rather than rtxes.
4156 (altivec_expand_vec_perm_const): Likewise. Update call to
4157 altivec_expand_vec_perm_const_le.
4158 (rs6000_expand_vec_perm_const): Delete.
4159 (rs6000_vectorize_vec_perm_const_ok): Delete.
4160 (rs6000_vectorize_vec_perm_const): New function.
4161 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4162 an element count and rtx array.
4163 (rs6000_expand_extract_even): Update call accordingly.
4164 (rs6000_expand_interleave): Likewise.
4165 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4166 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4167 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4168 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4169 (rs6000_expand_vec_perm_const): Delete.
4170 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4171 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4172 (altivec_expand_vec_perm_const_le): Take each operand individually.
4173 Operate on constant selectors rather than rtxes.
4174 (altivec_expand_vec_perm_const): Likewise. Update call to
4175 altivec_expand_vec_perm_const_le.
4176 (rs6000_expand_vec_perm_const): Delete.
4177 (rs6000_vectorize_vec_perm_const_ok): Delete.
4178 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4179 reference to the SPE evmerge intructions.
4180 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4181 an element count and rtx array.
4182 (rs6000_expand_extract_even): Update call accordingly.
4183 (rs6000_expand_interleave): Likewise.
4184 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4185 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4186 new function.
4187 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4189 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4191 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4192 vector mode and that that mode matches the mode of the data
4193 being permuted.
4194 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4195 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4196 directly using expand_vec_perm_1 when forcing selectors into
4197 registers.
4198 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4200 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4202 * optabs-query.h (can_vec_perm_p): Delete.
4203 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4204 * optabs-query.c (can_vec_perm_p): Split into...
4205 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4206 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4207 particular selector is valid.
4208 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4209 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4210 (vect_grouped_load_supported): Likewise.
4211 (vect_shift_permute_load_chain): Likewise.
4212 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4213 (vect_transform_slp_perm_load): Likewise.
4214 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4215 (vectorizable_bswap): Likewise.
4216 (vect_gen_perm_mask_checked): Likewise.
4217 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4218 implementations of variable permutation vectors into account
4219 when deciding which selector to use.
4220 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4221 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4222 with a false third argument.
4223 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4224 to test whether the constant selector is valid and can_vec_perm_var_p
4225 to test whether a variable selector is valid.
4227 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4229 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4230 * optabs-query.c (can_vec_perm_p): Likewise.
4231 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4232 instead of vec_perm_indices.
4233 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4234 (vect_gen_perm_mask_checked): Likewise,
4235 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4236 (vect_gen_perm_mask_checked): Likewise,
4238 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4240 * optabs-query.h (qimode_for_vec_perm): Declare.
4241 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4242 (qimode_for_vec_perm): ...this new function.
4243 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4245 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4247 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4248 does not have a conditional at the top.
4250 2018-01-02 Richard Biener <rguenther@suse.de>
4252 * ipa-inline.c (big_speedup_p): Fix expression.
4254 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4256 PR target/81616
4257 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4258 for generic 4->6.
4260 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4262 PR target/81616
4263 Generic tuning.
4264 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4265 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4266 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4267 cond_taken_branch_cost 3->4.
4269 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4271 PR tree-optimization/83581
4272 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4273 TODO_cleanup_cfg if any changes have been made.
4275 PR middle-end/83608
4276 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4277 convert_modes if target mode has the right side, but different mode
4278 class.
4280 PR middle-end/83609
4281 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4282 last argument when extracting from CONCAT. If either from_real or
4283 from_imag is NULL, use expansion through memory. If result is not
4284 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4285 the parts directly to inner mode, if even that fails, use expansion
4286 through memory.
4288 PR middle-end/83623
4289 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4290 check for bswap in mode rather than HImode and use that in expand_unop
4291 too.
4292 \f
4293 Copyright (C) 2018 Free Software Foundation, Inc.
4295 Copying and distribution of this file, with or without modification,
4296 are permitted in any medium without royalty provided the copyright
4297 notice and this notice are preserved.