1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
24 /* This module looks for cases where matching constraints would force
25 an instruction to need a reload, and this reload would be a register
26 to register move. It then attempts to change the registers used by the
27 instruction to avoid the move instruction. */
31 #include "coretypes.h"
33 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
35 #include "insn-config.h"
39 #include "hard-reg-set.h"
43 #include "basic-block.h"
48 #include "tree-pass.h"
51 static int perhaps_ends_bb_p (rtx
);
52 static int optimize_reg_copy_1 (rtx
, rtx
, rtx
);
53 static void optimize_reg_copy_2 (rtx
, rtx
, rtx
);
54 static void optimize_reg_copy_3 (rtx
, rtx
, rtx
);
55 static void copy_src_to_dest (rtx
, rtx
, rtx
);
58 int with
[MAX_RECOG_OPERANDS
];
59 enum { READ
, WRITE
, READWRITE
} use
[MAX_RECOG_OPERANDS
];
60 int commutative
[MAX_RECOG_OPERANDS
];
61 int early_clobber
[MAX_RECOG_OPERANDS
];
64 static rtx
discover_flags_reg (void);
65 static void mark_flags_life_zones (rtx
);
66 static void flags_set_1 (rtx
, rtx
, void *);
68 static int try_auto_increment (rtx
, rtx
, rtx
, rtx
, HOST_WIDE_INT
, int);
69 static int find_matches (rtx
, struct match
*);
70 static void replace_in_call_usage (rtx
*, unsigned int, rtx
, rtx
);
71 static int fixup_match_1 (rtx
, rtx
, rtx
, rtx
, rtx
, int, int, int);
72 static int stable_and_no_regs_but_for_p (rtx
, rtx
, rtx
);
73 static int regclass_compatible_p (int, int);
74 static int replacement_quality (rtx
);
75 static int fixup_match_2 (rtx
, rtx
, rtx
, rtx
);
77 /* Return nonzero if registers with CLASS1 and CLASS2 can be merged without
78 causing too much register allocation problems. */
80 regclass_compatible_p (int class0
, int class1
)
82 return (class0
== class1
83 || (reg_class_subset_p (class0
, class1
)
84 && ! CLASS_LIKELY_SPILLED_P (class0
))
85 || (reg_class_subset_p (class1
, class0
)
86 && ! CLASS_LIKELY_SPILLED_P (class1
)));
89 /* Find the place in the rtx X where REG is used as a memory address.
90 Return the MEM rtx that so uses it.
91 If PLUSCONST is nonzero, search instead for a memory address equivalent to
92 (plus REG (const_int PLUSCONST)).
94 If such an address does not appear, return 0.
95 If REG appears more than once, or is used other than in such an address,
99 find_use_as_address (rtx x
, rtx reg
, HOST_WIDE_INT plusconst
)
101 enum rtx_code code
= GET_CODE (x
);
102 const char * const fmt
= GET_RTX_FORMAT (code
);
107 if (code
== MEM
&& XEXP (x
, 0) == reg
&& plusconst
== 0)
110 if (code
== MEM
&& GET_CODE (XEXP (x
, 0)) == PLUS
111 && XEXP (XEXP (x
, 0), 0) == reg
112 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
113 && INTVAL (XEXP (XEXP (x
, 0), 1)) == plusconst
)
116 if (code
== SIGN_EXTRACT
|| code
== ZERO_EXTRACT
)
118 /* If REG occurs inside a MEM used in a bit-field reference,
119 that is unacceptable. */
120 if (find_use_as_address (XEXP (x
, 0), reg
, 0) != 0)
121 return (rtx
) (size_t) 1;
125 return (rtx
) (size_t) 1;
127 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
131 tem
= find_use_as_address (XEXP (x
, i
), reg
, plusconst
);
135 return (rtx
) (size_t) 1;
137 else if (fmt
[i
] == 'E')
140 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
142 tem
= find_use_as_address (XVECEXP (x
, i
, j
), reg
, plusconst
);
146 return (rtx
) (size_t) 1;
155 /* INC_INSN is an instruction that adds INCREMENT to REG.
156 Try to fold INC_INSN as a post/pre in/decrement into INSN.
157 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
158 Return nonzero for success. */
160 try_auto_increment (rtx insn
, rtx inc_insn
, rtx inc_insn_set
, rtx reg
,
161 HOST_WIDE_INT increment
, int pre
)
163 enum rtx_code inc_code
;
165 rtx pset
= single_set (insn
);
168 /* Can't use the size of SET_SRC, we might have something like
169 (sign_extend:SI (mem:QI ... */
170 rtx use
= find_use_as_address (pset
, reg
, 0);
171 if (use
!= 0 && use
!= (rtx
) (size_t) 1)
173 int size
= GET_MODE_SIZE (GET_MODE (use
));
175 || (HAVE_POST_INCREMENT
176 && pre
== 0 && (inc_code
= POST_INC
, increment
== size
))
177 || (HAVE_PRE_INCREMENT
178 && pre
== 1 && (inc_code
= PRE_INC
, increment
== size
))
179 || (HAVE_POST_DECREMENT
180 && pre
== 0 && (inc_code
= POST_DEC
, increment
== -size
))
181 || (HAVE_PRE_DECREMENT
182 && pre
== 1 && (inc_code
= PRE_DEC
, increment
== -size
))
188 &SET_SRC (inc_insn_set
),
189 XEXP (SET_SRC (inc_insn_set
), 0), 1);
190 validate_change (insn
, &XEXP (use
, 0),
191 gen_rtx_fmt_e (inc_code
, Pmode
, reg
), 1);
192 if (apply_change_group ())
194 /* If there is a REG_DEAD note on this insn, we must
195 change this not to REG_UNUSED meaning that the register
196 is set, but the value is dead. Failure to do so will
197 result in a sched1 dieing -- when it recomputes lifetime
198 information, the number of REG_DEAD notes will have
200 rtx note
= find_reg_note (insn
, REG_DEAD
, reg
);
202 PUT_MODE (note
, REG_UNUSED
);
205 = gen_rtx_EXPR_LIST (REG_INC
,
206 reg
, REG_NOTES (insn
));
208 delete_insn (inc_insn
);
217 /* Determine if the pattern generated by add_optab has a clobber,
218 such as might be issued for a flags hard register. To make the
219 code elsewhere simpler, we handle cc0 in this same framework.
221 Return the register if one was discovered. Return NULL_RTX if
222 if no flags were found. Return pc_rtx if we got confused. */
225 discover_flags_reg (void)
228 tmp
= gen_rtx_REG (word_mode
, 10000);
229 tmp
= gen_add3_insn (tmp
, tmp
, const2_rtx
);
231 /* If we get something that isn't a simple set, or a
232 [(set ..) (clobber ..)], this whole function will go wrong. */
233 if (GET_CODE (tmp
) == SET
)
235 else if (GET_CODE (tmp
) == PARALLEL
)
239 if (XVECLEN (tmp
, 0) != 2)
241 tmp
= XVECEXP (tmp
, 0, 1);
242 if (GET_CODE (tmp
) != CLOBBER
)
246 /* Don't do anything foolish if the md wanted to clobber a
247 scratch or something. We only care about hard regs.
248 Moreover we don't like the notion of subregs of hard regs. */
249 if (GET_CODE (tmp
) == SUBREG
250 && REG_P (SUBREG_REG (tmp
))
251 && REGNO (SUBREG_REG (tmp
)) < FIRST_PSEUDO_REGISTER
)
253 found
= (REG_P (tmp
) && REGNO (tmp
) < FIRST_PSEUDO_REGISTER
);
255 return (found
? tmp
: NULL_RTX
);
261 /* It is a tedious task identifying when the flags register is live and
262 when it is safe to optimize. Since we process the instruction stream
263 multiple times, locate and record these live zones by marking the
264 mode of the instructions --
266 QImode is used on the instruction at which the flags becomes live.
268 HImode is used within the range (exclusive) that the flags are
269 live. Thus the user of the flags is not marked.
271 All other instructions are cleared to VOIDmode. */
273 /* Used to communicate with flags_set_1. */
274 static rtx flags_set_1_rtx
;
275 static int flags_set_1_set
;
278 mark_flags_life_zones (rtx flags
)
285 /* If we found a flags register on a cc0 host, bail. */
286 if (flags
== NULL_RTX
)
288 else if (flags
!= cc0_rtx
)
292 /* Simple cases first: if no flags, clear all modes. If confusing,
293 mark the entire function as being in a flags shadow. */
294 if (flags
== NULL_RTX
|| flags
== pc_rtx
)
296 enum machine_mode mode
= (flags
? HImode
: VOIDmode
);
298 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
299 PUT_MODE (insn
, mode
);
307 flags_regno
= REGNO (flags
);
308 flags_nregs
= hard_regno_nregs
[flags_regno
][GET_MODE (flags
)];
310 flags_set_1_rtx
= flags
;
312 /* Process each basic block. */
313 FOR_EACH_BB_REVERSE (block
)
318 insn
= BB_HEAD (block
);
319 end
= BB_END (block
);
321 /* Look out for the (unlikely) case of flags being live across
322 basic block boundaries. */
327 for (i
= 0; i
< flags_nregs
; ++i
)
328 live
|= REGNO_REG_SET_P (df_get_live_in (block
), flags_regno
+ i
);
334 /* Process liveness in reverse order of importance --
335 alive, death, birth. This lets more important info
336 overwrite the mode of lesser info. */
341 /* In the cc0 case, death is not marked in reg notes,
342 but is instead the mere use of cc0 when it is alive. */
343 if (live
&& reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
346 /* In the hard reg case, we watch death notes. */
347 if (live
&& find_regno_note (insn
, REG_DEAD
, flags_regno
))
350 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
352 /* In either case, birth is denoted simply by its presence
353 as the destination of a set. */
355 note_stores (PATTERN (insn
), flags_set_1
, NULL
);
359 PUT_MODE (insn
, QImode
);
363 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
367 insn
= NEXT_INSN (insn
);
372 /* A subroutine of mark_flags_life_zones, called through note_stores. */
375 flags_set_1 (rtx x
, rtx pat
, void *data ATTRIBUTE_UNUSED
)
377 if (GET_CODE (pat
) == SET
378 && reg_overlap_mentioned_p (x
, flags_set_1_rtx
))
382 static int *regno_src_regno
;
384 /* Indicate how good a choice REG (which appears as a source) is to replace
385 a destination register with. The higher the returned value, the better
386 the choice. The main objective is to avoid using a register that is
387 a candidate for tying to a hard register, since the output might in
388 turn be a candidate to be tied to a different hard register. */
390 replacement_quality (rtx reg
)
394 /* Bad if this isn't a register at all. */
398 /* If this register is not meant to get a hard register,
399 it is a poor choice. */
400 if (REG_LIVE_LENGTH (REGNO (reg
)) < 0)
403 src_regno
= regno_src_regno
[REGNO (reg
)];
405 /* If it was not copied from another register, it is fine. */
409 /* Copied from a hard register? */
410 if (src_regno
< FIRST_PSEUDO_REGISTER
)
413 /* Copied from a pseudo register - not as bad as from a hard register,
414 yet still cumbersome, since the register live length will be lengthened
415 when the registers get tied. */
419 /* Return 1 if INSN might end a basic block. */
421 static int perhaps_ends_bb_p (rtx insn
)
423 switch (GET_CODE (insn
))
427 /* These always end a basic block. */
431 /* A CALL_INSN might be the last insn of a basic block, if it is inside
432 an EH region or if there are nonlocal gotos. Note that this test is
433 very conservative. */
434 if (nonlocal_goto_handler_labels
)
438 return can_throw_internal (insn
);
442 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
445 Search forward to see if SRC dies before either it or DEST is modified,
446 but don't scan past the end of a basic block. If so, we can replace SRC
447 with DEST and let SRC die in INSN.
449 This will reduce the number of registers live in that range and may enable
450 DEST to be tied to SRC, thus often saving one register in addition to a
451 register-register copy. */
454 optimize_reg_copy_1 (rtx insn
, rtx dest
, rtx src
)
459 int sregno
= REGNO (src
);
460 int dregno
= REGNO (dest
);
462 /* We don't want to mess with hard regs if register classes are small. */
464 || (SMALL_REGISTER_CLASSES
465 && (sregno
< FIRST_PSEUDO_REGISTER
466 || dregno
< FIRST_PSEUDO_REGISTER
))
467 /* We don't see all updates to SP if they are in an auto-inc memory
468 reference, so we must disallow this optimization on them. */
469 || sregno
== STACK_POINTER_REGNUM
|| dregno
== STACK_POINTER_REGNUM
)
472 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
474 /* ??? We can't scan past the end of a basic block without updating
475 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
476 if (perhaps_ends_bb_p (p
))
478 else if (! INSN_P (p
))
481 if (reg_set_p (src
, p
) || reg_set_p (dest
, p
)
482 /* If SRC is an asm-declared register, it must not be replaced
483 in any asm. Unfortunately, the REG_EXPR tree for the asm
484 variable may be absent in the SRC rtx, so we can't check the
485 actual register declaration easily (the asm operand will have
486 it, though). To avoid complicating the test for a rare case,
487 we just don't perform register replacement for a hard reg
488 mentioned in an asm. */
489 || (sregno
< FIRST_PSEUDO_REGISTER
490 && asm_noperands (PATTERN (p
)) >= 0
491 && reg_overlap_mentioned_p (src
, PATTERN (p
)))
492 /* Don't change hard registers used by a call. */
493 || (CALL_P (p
) && sregno
< FIRST_PSEUDO_REGISTER
494 && find_reg_fusage (p
, USE
, src
))
495 /* Don't change a USE of a register. */
496 || (GET_CODE (PATTERN (p
)) == USE
497 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
500 /* See if all of SRC dies in P. This test is slightly more
501 conservative than it needs to be. */
502 if ((note
= find_regno_note (p
, REG_DEAD
, sregno
)) != 0
503 && GET_MODE (XEXP (note
, 0)) == GET_MODE (src
))
511 /* We can do the optimization. Scan forward from INSN again,
512 replacing regs as we go. Set FAILED if a replacement can't
513 be done. In that case, we can't move the death note for SRC.
514 This should be rare. */
516 /* Set to stop at next insn. */
517 for (q
= next_real_insn (insn
);
518 q
!= next_real_insn (p
);
519 q
= next_real_insn (q
))
521 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
523 /* If SRC is a hard register, we might miss some
524 overlapping registers with validate_replace_rtx,
525 so we would have to undo it. We can't if DEST is
526 present in the insn, so fail in that combination
528 if (sregno
< FIRST_PSEUDO_REGISTER
529 && reg_mentioned_p (dest
, PATTERN (q
)))
532 /* Attempt to replace all uses. */
533 else if (!validate_replace_rtx (src
, dest
, q
))
536 /* If this succeeded, but some part of the register
537 is still present, undo the replacement. */
538 else if (sregno
< FIRST_PSEUDO_REGISTER
539 && reg_overlap_mentioned_p (src
, PATTERN (q
)))
541 validate_replace_rtx (dest
, src
, q
);
546 /* For SREGNO, count the total number of insns scanned.
547 For DREGNO, count the total number of insns scanned after
548 passing the death note for DREGNO. */
553 /* If the insn in which SRC dies is a CALL_INSN, don't count it
554 as a call that has been crossed. Otherwise, count it. */
555 if (q
!= p
&& CALL_P (q
))
557 /* Similarly, total calls for SREGNO, total calls beyond
558 the death note for DREGNO. */
564 /* If DEST dies here, remove the death note and save it for
565 later. Make sure ALL of DEST dies here; again, this is
566 overly conservative. */
568 && (dest_death
= find_regno_note (q
, REG_DEAD
, dregno
)) != 0)
570 if (GET_MODE (XEXP (dest_death
, 0)) != GET_MODE (dest
))
571 failed
= 1, dest_death
= 0;
573 remove_note (q
, dest_death
);
579 /* These counters need to be updated if and only if we are
580 going to move the REG_DEAD note. */
581 if (sregno
>= FIRST_PSEUDO_REGISTER
)
583 if (REG_LIVE_LENGTH (sregno
) >= 0)
585 REG_LIVE_LENGTH (sregno
) -= s_length
;
586 /* REG_LIVE_LENGTH is only an approximation after
587 combine if sched is not run, so make sure that we
588 still have a reasonable value. */
589 if (REG_LIVE_LENGTH (sregno
) < 2)
590 REG_LIVE_LENGTH (sregno
) = 2;
593 REG_N_CALLS_CROSSED (sregno
) -= s_n_calls
;
596 /* Move death note of SRC from P to INSN. */
597 remove_note (p
, note
);
598 XEXP (note
, 1) = REG_NOTES (insn
);
599 REG_NOTES (insn
) = note
;
602 /* DEST is also dead if INSN has a REG_UNUSED note for DEST. */
604 && (dest_death
= find_regno_note (insn
, REG_UNUSED
, dregno
)))
606 PUT_REG_NOTE_KIND (dest_death
, REG_DEAD
);
607 remove_note (insn
, dest_death
);
610 /* Put death note of DEST on P if we saw it die. */
613 XEXP (dest_death
, 1) = REG_NOTES (p
);
614 REG_NOTES (p
) = dest_death
;
616 if (dregno
>= FIRST_PSEUDO_REGISTER
)
618 /* If and only if we are moving the death note for DREGNO,
619 then we need to update its counters. */
620 if (REG_LIVE_LENGTH (dregno
) >= 0)
621 REG_LIVE_LENGTH (dregno
) += d_length
;
622 REG_N_CALLS_CROSSED (dregno
) += d_n_calls
;
629 /* If SRC is a hard register which is set or killed in some other
630 way, we can't do this optimization. */
631 else if (sregno
< FIRST_PSEUDO_REGISTER
632 && dead_or_set_p (p
, src
))
638 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
639 a sequence of insns that modify DEST followed by an insn that sets
640 SRC to DEST in which DEST dies, with no prior modification of DEST.
641 (There is no need to check if the insns in between actually modify
642 DEST. We should not have cases where DEST is not modified, but
643 the optimization is safe if no such modification is detected.)
644 In that case, we can replace all uses of DEST, starting with INSN and
645 ending with the set of SRC to DEST, with SRC. We do not do this
646 optimization if a CALL_INSN is crossed unless SRC already crosses a
647 call or if DEST dies before the copy back to SRC.
649 It is assumed that DEST and SRC are pseudos; it is too complicated to do
650 this for hard registers since the substitutions we may make might fail. */
653 optimize_reg_copy_2 (rtx insn
, rtx dest
, rtx src
)
657 int sregno
= REGNO (src
);
658 int dregno
= REGNO (dest
);
660 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
662 /* ??? We can't scan past the end of a basic block without updating
663 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
664 if (perhaps_ends_bb_p (p
))
666 else if (! INSN_P (p
))
669 set
= single_set (p
);
670 if (set
&& SET_SRC (set
) == dest
&& SET_DEST (set
) == src
671 && find_reg_note (p
, REG_DEAD
, dest
))
673 /* We can do the optimization. Scan forward from INSN again,
674 replacing regs as we go. */
676 /* Set to stop at next insn. */
677 for (q
= insn
; q
!= NEXT_INSN (p
); q
= NEXT_INSN (q
))
680 if (reg_mentioned_p (dest
, PATTERN (q
)))
682 PATTERN (q
) = replace_rtx (PATTERN (q
), dest
, src
);
688 REG_N_CALLS_CROSSED (dregno
)--;
689 REG_N_CALLS_CROSSED (sregno
)++;
693 remove_note (p
, find_reg_note (p
, REG_DEAD
, dest
));
694 REG_N_DEATHS (dregno
)--;
695 remove_note (insn
, find_reg_note (insn
, REG_DEAD
, src
));
696 REG_N_DEATHS (sregno
)--;
700 if (reg_set_p (src
, p
)
701 || find_reg_note (p
, REG_DEAD
, dest
)
702 || (CALL_P (p
) && REG_N_CALLS_CROSSED (sregno
) == 0))
707 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
708 Look if SRC dies there, and if it is only set once, by loading
709 it from memory. If so, try to incorporate the zero/sign extension
710 into the memory read, change SRC to the mode of DEST, and alter
711 the remaining accesses to use the appropriate SUBREG. This allows
712 SRC and DEST to be tied later. */
714 optimize_reg_copy_3 (rtx insn
, rtx dest
, rtx src
)
716 rtx src_reg
= XEXP (src
, 0);
717 int src_no
= REGNO (src_reg
);
718 int dst_no
= REGNO (dest
);
720 enum machine_mode old_mode
;
722 if (src_no
< FIRST_PSEUDO_REGISTER
723 || dst_no
< FIRST_PSEUDO_REGISTER
724 || ! find_reg_note (insn
, REG_DEAD
, src_reg
)
725 || REG_N_DEATHS (src_no
) != 1
726 || REG_N_SETS (src_no
) != 1)
728 for (p
= PREV_INSN (insn
); p
&& ! reg_set_p (src_reg
, p
); p
= PREV_INSN (p
))
729 /* ??? We can't scan past the end of a basic block without updating
730 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
731 if (perhaps_ends_bb_p (p
))
737 if (! (set
= single_set (p
))
738 || !MEM_P (SET_SRC (set
))
739 /* If there's a REG_EQUIV note, this must be an insn that loads an
740 argument. Prefer keeping the note over doing this optimization. */
741 || find_reg_note (p
, REG_EQUIV
, NULL_RTX
)
742 || SET_DEST (set
) != src_reg
)
745 /* Be conservative: although this optimization is also valid for
746 volatile memory references, that could cause trouble in later passes. */
747 if (MEM_VOLATILE_P (SET_SRC (set
)))
750 /* Do not use a SUBREG to truncate from one mode to another if truncation
752 if (GET_MODE_BITSIZE (GET_MODE (src_reg
)) <= GET_MODE_BITSIZE (GET_MODE (src
))
753 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src
)),
754 GET_MODE_BITSIZE (GET_MODE (src_reg
))))
757 old_mode
= GET_MODE (src_reg
);
758 PUT_MODE (src_reg
, GET_MODE (src
));
759 XEXP (src
, 0) = SET_SRC (set
);
761 /* Include this change in the group so that it's easily undone if
762 one of the changes in the group is invalid. */
763 validate_change (p
, &SET_SRC (set
), src
, 1);
765 /* Now walk forward making additional replacements. We want to be able
766 to undo all the changes if a later substitution fails. */
767 while (p
= NEXT_INSN (p
), p
!= insn
)
772 /* Make a tentative change. */
773 validate_replace_rtx_group (src_reg
,
774 gen_lowpart_SUBREG (old_mode
, src_reg
),
778 validate_replace_rtx_group (src
, src_reg
, insn
);
780 /* Now see if all the changes are valid. */
781 if (! apply_change_group ())
783 /* One or more changes were no good. Back out everything. */
784 PUT_MODE (src_reg
, old_mode
);
785 XEXP (src
, 0) = src_reg
;
789 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
791 remove_note (p
, note
);
796 /* If we were not able to update the users of src to use dest directly, try
797 instead moving the value to dest directly before the operation. */
800 copy_src_to_dest (rtx insn
, rtx src
, rtx dest
)
814 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
815 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
816 parameter when there is no frame pointer that is not allocated a register.
817 For now, we just reject them, rather than incrementing the live length. */
820 && REG_LIVE_LENGTH (REGNO (src
)) > 0
822 && REG_LIVE_LENGTH (REGNO (dest
)) > 0
823 && (set
= single_set (insn
)) != NULL_RTX
824 && !reg_mentioned_p (dest
, SET_SRC (set
))
825 && GET_MODE (src
) == GET_MODE (dest
))
827 int old_num_regs
= reg_rtx_no
;
829 /* Generate the src->dest move. */
831 emit_move_insn (dest
, src
);
834 /* If this sequence uses new registers, we may not use it. */
835 if (old_num_regs
!= reg_rtx_no
836 || ! validate_replace_rtx (src
, dest
, insn
))
838 /* We have to restore reg_rtx_no to its old value, lest
839 recompute_reg_usage will try to compute the usage of the
840 new regs, yet reg_n_info is not valid for them. */
841 reg_rtx_no
= old_num_regs
;
844 emit_insn_before (seq
, insn
);
845 move_insn
= PREV_INSN (insn
);
846 p_move_notes
= ®_NOTES (move_insn
);
847 p_insn_notes
= ®_NOTES (insn
);
849 /* Move any notes mentioning src to the move instruction. */
850 for (link
= REG_NOTES (insn
); link
!= NULL_RTX
; link
= next
)
852 next
= XEXP (link
, 1);
853 if (XEXP (link
, 0) == src
)
855 *p_move_notes
= link
;
856 p_move_notes
= &XEXP (link
, 1);
860 *p_insn_notes
= link
;
861 p_insn_notes
= &XEXP (link
, 1);
865 *p_move_notes
= NULL_RTX
;
866 *p_insn_notes
= NULL_RTX
;
868 insn_uid
= INSN_UID (insn
);
869 move_uid
= INSN_UID (move_insn
);
871 /* Update the various register tables. */
872 dest_regno
= REGNO (dest
);
873 INC_REG_N_SETS (dest_regno
, 1);
874 REG_LIVE_LENGTH (dest_regno
)++;
875 src_regno
= REGNO (src
);
876 if (! find_reg_note (move_insn
, REG_DEAD
, src
))
877 REG_LIVE_LENGTH (src_regno
)++;
881 /* reg_set_in_bb[REGNO] points to basic block iff the register is set
882 only once in the given block and has REG_EQUAL note. */
884 basic_block
*reg_set_in_bb
;
886 /* Size of reg_set_in_bb array. */
887 static unsigned int max_reg_computed
;
890 /* Return whether REG is set in only one location, and is set to a
891 constant, but is set in a different basic block from INSN (an
892 instructions which uses REG). In this case REG is equivalent to a
893 constant, and we don't want to break that equivalence, because that
894 may increase register pressure and make reload harder. If REG is
895 set in the same basic block as INSN, we don't worry about it,
896 because we'll probably need a register anyhow (??? but what if REG
897 is used in a different basic block as well as this one?). */
900 reg_is_remote_constant_p (rtx reg
, rtx insn
)
908 max_reg_computed
= max
= max_reg_num ();
909 reg_set_in_bb
= xcalloc (max
, sizeof (*reg_set_in_bb
));
919 /* This is the instruction which sets REG. If there is a
920 REG_EQUAL note, then REG is equivalent to a constant. */
922 && REG_P (SET_DEST (s
))
923 && REG_N_SETS (REGNO (SET_DEST (s
))) == 1
924 && find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
925 reg_set_in_bb
[REGNO (SET_DEST (s
))] = bb
;
929 gcc_assert (REGNO (reg
) < max_reg_computed
);
930 if (reg_set_in_bb
[REGNO (reg
)] == NULL
)
932 return (reg_set_in_bb
[REGNO (reg
)] != BLOCK_FOR_INSN (insn
));
935 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
936 another add immediate instruction with the same source and dest registers,
937 and if we find one, we change INSN to an increment, and return 1. If
938 no changes are made, we return 0.
941 (set (reg100) (plus reg1 offset1))
943 (set (reg100) (plus reg1 offset2))
945 (set (reg100) (plus reg1 offset1))
947 (set (reg100) (plus reg100 offset2-offset1)) */
949 /* ??? What does this comment mean? */
950 /* cse disrupts preincrement / postdecrement sequences when it finds a
951 hard register as ultimate source, like the frame pointer. */
954 fixup_match_2 (rtx insn
, rtx dst
, rtx src
, rtx offset
)
956 rtx p
, dst_death
= 0;
957 int length
, num_calls
= 0;
959 /* If SRC dies in INSN, we'd have to move the death note. This is
960 considered to be very unlikely, so we just skip the optimization
962 if (find_regno_note (insn
, REG_DEAD
, REGNO (src
)))
965 /* Scan backward to find the first instruction that sets DST. */
967 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
971 /* ??? We can't scan past the end of a basic block without updating
972 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
973 if (perhaps_ends_bb_p (p
))
975 else if (! INSN_P (p
))
978 if (find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
983 pset
= single_set (p
);
984 if (pset
&& SET_DEST (pset
) == dst
985 && GET_CODE (SET_SRC (pset
)) == PLUS
986 && XEXP (SET_SRC (pset
), 0) == src
987 && GET_CODE (XEXP (SET_SRC (pset
), 1)) == CONST_INT
)
989 HOST_WIDE_INT newconst
990 = INTVAL (offset
) - INTVAL (XEXP (SET_SRC (pset
), 1));
991 rtx add
= gen_add3_insn (dst
, dst
, GEN_INT (newconst
));
993 if (add
&& validate_change (insn
, &PATTERN (insn
), add
, 0))
995 /* Remove the death note for DST from DST_DEATH. */
998 remove_death (REGNO (dst
), dst_death
);
999 REG_LIVE_LENGTH (REGNO (dst
)) += length
;
1000 REG_N_CALLS_CROSSED (REGNO (dst
)) += num_calls
;
1005 "Fixed operand of insn %d.\n",
1009 for (p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1016 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1018 if (try_auto_increment (p
, insn
, 0, dst
, newconst
, 0))
1023 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1030 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1032 try_auto_increment (p
, insn
, 0, dst
, newconst
, 1);
1041 if (reg_set_p (dst
, PATTERN (p
)))
1044 /* If we have passed a call instruction, and the
1045 pseudo-reg SRC is not already live across a call,
1046 then don't perform the optimization. */
1047 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1048 hard regs are clobbered. Thus, we only use it for src for
1055 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1058 if (call_used_regs
[REGNO (dst
)]
1059 || find_reg_fusage (p
, CLOBBER
, dst
))
1062 else if (reg_set_p (src
, PATTERN (p
)))
1069 /* Main entry for the register move optimization.
1070 F is the first instruction.
1071 NREGS is one plus the highest pseudo-reg number used in the instruction.
1072 REGMOVE_DUMP_FILE is a stream for output of a trace of actions taken
1073 (or 0 if none should be output). */
1076 regmove_optimize (rtx f
, int nregs
)
1082 rtx copy_src
, copy_dst
;
1084 /* ??? Hack. Regmove doesn't examine the CFG, and gets mightily
1085 confused by non-call exceptions ending blocks. */
1086 if (flag_non_call_exceptions
)
1089 df_note_add_problem ();
1092 regstat_init_n_sets_and_refs ();
1093 regstat_compute_ri ();
1095 /* Find out where a potential flags register is live, and so that we
1096 can suppress some optimizations in those zones. */
1097 mark_flags_life_zones (discover_flags_reg ());
1099 regno_src_regno
= XNEWVEC (int, nregs
);
1100 for (i
= nregs
; --i
>= 0; )
1101 regno_src_regno
[i
] = -1;
1103 /* A forward/backward pass. Replace output operands with input operands. */
1105 for (pass
= 0; pass
<= 2; pass
++)
1107 if (! flag_regmove
&& pass
>= flag_expensive_optimizations
)
1111 fprintf (dump_file
, "Starting %s pass...\n",
1112 pass
? "backward" : "forward");
1114 for (insn
= pass
? get_last_insn () : f
; insn
;
1115 insn
= pass
? PREV_INSN (insn
) : NEXT_INSN (insn
))
1118 int op_no
, match_no
;
1120 set
= single_set (insn
);
1124 if (flag_expensive_optimizations
&& ! pass
1125 && (GET_CODE (SET_SRC (set
)) == SIGN_EXTEND
1126 || GET_CODE (SET_SRC (set
)) == ZERO_EXTEND
)
1127 && REG_P (XEXP (SET_SRC (set
), 0))
1128 && REG_P (SET_DEST (set
)))
1129 optimize_reg_copy_3 (insn
, SET_DEST (set
), SET_SRC (set
));
1131 if (flag_expensive_optimizations
&& ! pass
1132 && REG_P (SET_SRC (set
))
1133 && REG_P (SET_DEST (set
)))
1135 /* If this is a register-register copy where SRC is not dead,
1136 see if we can optimize it. If this optimization succeeds,
1137 it will become a copy where SRC is dead. */
1138 if ((find_reg_note (insn
, REG_DEAD
, SET_SRC (set
))
1139 || optimize_reg_copy_1 (insn
, SET_DEST (set
), SET_SRC (set
)))
1140 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
1142 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1143 if (REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
)
1144 optimize_reg_copy_2 (insn
, SET_DEST (set
), SET_SRC (set
));
1145 if (regno_src_regno
[REGNO (SET_DEST (set
))] < 0
1146 && SET_SRC (set
) != SET_DEST (set
))
1148 int srcregno
= REGNO (SET_SRC (set
));
1149 if (regno_src_regno
[srcregno
] >= 0)
1150 srcregno
= regno_src_regno
[srcregno
];
1151 regno_src_regno
[REGNO (SET_DEST (set
))] = srcregno
;
1158 if (! find_matches (insn
, &match
))
1161 /* Now scan through the operands looking for a source operand
1162 which is supposed to match the destination operand.
1163 Then scan forward for an instruction which uses the dest
1165 If it dies there, then replace the dest in both operands with
1166 the source operand. */
1168 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1170 rtx src
, dst
, src_subreg
;
1171 enum reg_class src_class
, dst_class
;
1173 match_no
= match
.with
[op_no
];
1175 /* Nothing to do if the two operands aren't supposed to match. */
1179 src
= recog_data
.operand
[op_no
];
1180 dst
= recog_data
.operand
[match_no
];
1186 if (GET_CODE (dst
) == SUBREG
1187 && GET_MODE_SIZE (GET_MODE (dst
))
1188 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst
))))
1190 dst
= SUBREG_REG (dst
);
1191 src_subreg
= lowpart_subreg (GET_MODE (dst
),
1192 src
, GET_MODE (src
));
1197 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
1200 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1202 if (match
.commutative
[op_no
] < op_no
)
1203 regno_src_regno
[REGNO (dst
)] = REGNO (src
);
1207 if (REG_LIVE_LENGTH (REGNO (src
)) < 0)
1210 /* op_no/src must be a read-only operand, and
1211 match_operand/dst must be a write-only operand. */
1212 if (match
.use
[op_no
] != READ
1213 || match
.use
[match_no
] != WRITE
)
1216 if (match
.early_clobber
[match_no
]
1217 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1220 /* Make sure match_operand is the destination. */
1221 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1224 /* If the operands already match, then there is nothing to do. */
1225 if (operands_match_p (src
, dst
))
1228 /* But in the commutative case, we might find a better match. */
1229 if (match
.commutative
[op_no
] >= 0)
1231 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1232 if (operands_match_p (comm
, dst
)
1233 && (replacement_quality (comm
)
1234 >= replacement_quality (src
)))
1238 src_class
= reg_preferred_class (REGNO (src
));
1239 dst_class
= reg_preferred_class (REGNO (dst
));
1240 if (! regclass_compatible_p (src_class
, dst_class
))
1243 if (GET_MODE (src
) != GET_MODE (dst
))
1246 if (fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, pass
,
1253 /* A backward pass. Replace input operands with output operands. */
1256 fprintf (dump_file
, "Starting backward pass...\n");
1258 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
1262 int op_no
, match_no
;
1265 if (! find_matches (insn
, &match
))
1268 /* Now scan through the operands looking for a destination operand
1269 which is supposed to match a source operand.
1270 Then scan backward for an instruction which sets the source
1271 operand. If safe, then replace the source operand with the
1272 dest operand in both instructions. */
1274 copy_src
= NULL_RTX
;
1275 copy_dst
= NULL_RTX
;
1276 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1278 rtx set
, p
, src
, dst
;
1279 rtx src_note
, dst_note
;
1281 enum reg_class src_class
, dst_class
;
1284 match_no
= match
.with
[op_no
];
1286 /* Nothing to do if the two operands aren't supposed to match. */
1290 dst
= recog_data
.operand
[match_no
];
1291 src
= recog_data
.operand
[op_no
];
1297 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
1298 || REG_LIVE_LENGTH (REGNO (dst
)) < 0
1299 || GET_MODE (src
) != GET_MODE (dst
))
1302 /* If the operands already match, then there is nothing to do. */
1303 if (operands_match_p (src
, dst
))
1306 if (match
.commutative
[op_no
] >= 0)
1308 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1309 if (operands_match_p (comm
, dst
))
1313 set
= single_set (insn
);
1317 /* Note that single_set ignores parts of a parallel set for
1318 which one of the destinations is REG_UNUSED. We can't
1319 handle that here, since we can wind up rewriting things
1320 such that a single register is set twice within a single
1322 if (reg_set_p (src
, insn
))
1325 /* match_no/dst must be a write-only operand, and
1326 operand_operand/src must be a read-only operand. */
1327 if (match
.use
[op_no
] != READ
1328 || match
.use
[match_no
] != WRITE
)
1331 if (match
.early_clobber
[match_no
]
1332 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1335 /* Make sure match_no is the destination. */
1336 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1339 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1341 if (GET_CODE (SET_SRC (set
)) == PLUS
1342 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
1343 && XEXP (SET_SRC (set
), 0) == src
1344 && fixup_match_2 (insn
, dst
, src
,
1345 XEXP (SET_SRC (set
), 1)))
1349 src_class
= reg_preferred_class (REGNO (src
));
1350 dst_class
= reg_preferred_class (REGNO (dst
));
1352 if (! (src_note
= find_reg_note (insn
, REG_DEAD
, src
)))
1354 /* We used to force the copy here like in other cases, but
1355 it produces worse code, as it eliminates no copy
1356 instructions and the copy emitted will be produced by
1357 reload anyway. On patterns with multiple alternatives,
1358 there may be better solution available.
1360 In particular this change produced slower code for numeric
1366 if (! regclass_compatible_p (src_class
, dst_class
))
1376 /* Can not modify an earlier insn to set dst if this insn
1377 uses an old value in the source. */
1378 if (reg_overlap_mentioned_p (dst
, SET_SRC (set
)))
1388 /* If src is set once in a different basic block,
1389 and is set equal to a constant, then do not use
1390 it for this optimization, as this would make it
1391 no longer equivalent to a constant. */
1393 if (reg_is_remote_constant_p (src
, insn
))
1406 "Could fix operand %d of insn %d matching operand %d.\n",
1407 op_no
, INSN_UID (insn
), match_no
);
1409 /* Scan backward to find the first instruction that uses
1410 the input operand. If the operand is set here, then
1411 replace it in both instructions with match_no. */
1413 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1417 /* ??? We can't scan past the end of a basic block without
1418 updating the register lifetime info
1419 (REG_DEAD/basic_block_live_at_start). */
1420 if (perhaps_ends_bb_p (p
))
1422 else if (! INSN_P (p
))
1427 /* ??? See if all of SRC is set in P. This test is much
1428 more conservative than it needs to be. */
1429 pset
= single_set (p
);
1430 if (pset
&& SET_DEST (pset
) == src
)
1432 /* We use validate_replace_rtx, in case there
1433 are multiple identical source operands. All of
1434 them have to be changed at the same time. */
1435 if (validate_replace_rtx (src
, dst
, insn
))
1437 if (validate_change (p
, &SET_DEST (pset
),
1442 /* Change all source operands back.
1443 This modifies the dst as a side-effect. */
1444 validate_replace_rtx (dst
, src
, insn
);
1445 /* Now make sure the dst is right. */
1446 validate_change (insn
,
1447 recog_data
.operand_loc
[match_no
],
1454 /* We can't make this change if SRC is read or
1455 partially written in P, since we are going to
1456 eliminate SRC. We can't make this change
1457 if DST is mentioned at all in P,
1458 since we are going to change its value. */
1459 if (reg_overlap_mentioned_p (src
, PATTERN (p
))
1460 || reg_mentioned_p (dst
, PATTERN (p
)))
1463 /* If we have passed a call instruction, and the
1464 pseudo-reg DST is not already live across a call,
1465 then don't perform the optimization. */
1470 if (REG_N_CALLS_CROSSED (REGNO (dst
)) == 0)
1479 /* Remove the death note for SRC from INSN. */
1480 remove_note (insn
, src_note
);
1481 /* Move the death note for SRC to P if it is used
1483 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1485 XEXP (src_note
, 1) = REG_NOTES (p
);
1486 REG_NOTES (p
) = src_note
;
1488 /* If there is a REG_DEAD note for DST on P, then remove
1489 it, because DST is now set there. */
1490 if ((dst_note
= find_reg_note (p
, REG_DEAD
, dst
)))
1491 remove_note (p
, dst_note
);
1493 dstno
= REGNO (dst
);
1494 srcno
= REGNO (src
);
1496 INC_REG_N_SETS (dstno
, 1);
1497 INC_REG_N_SETS (srcno
, -1);
1499 REG_N_CALLS_CROSSED (dstno
) += num_calls
;
1500 REG_N_CALLS_CROSSED (srcno
) -= num_calls
;
1502 REG_LIVE_LENGTH (dstno
) += length
;
1503 if (REG_LIVE_LENGTH (srcno
) >= 0)
1505 REG_LIVE_LENGTH (srcno
) -= length
;
1506 /* REG_LIVE_LENGTH is only an approximation after
1507 combine if sched is not run, so make sure that we
1508 still have a reasonable value. */
1509 if (REG_LIVE_LENGTH (srcno
) < 2)
1510 REG_LIVE_LENGTH (srcno
) = 2;
1515 "Fixed operand %d of insn %d matching operand %d.\n",
1516 op_no
, INSN_UID (insn
), match_no
);
1522 /* If we weren't able to replace any of the alternatives, try an
1523 alternative approach of copying the source to the destination. */
1524 if (!success
&& copy_src
!= NULL_RTX
)
1525 copy_src_to_dest (insn
, copy_src
, copy_dst
);
1531 free (regno_src_regno
);
1534 free (reg_set_in_bb
);
1535 reg_set_in_bb
= NULL
;
1537 regstat_free_n_sets_and_refs ();
1541 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1542 Returns 0 if INSN can't be recognized, or if the alternative can't be
1545 Initialize the info in MATCHP based on the constraints. */
1548 find_matches (rtx insn
, struct match
*matchp
)
1550 int likely_spilled
[MAX_RECOG_OPERANDS
];
1552 int any_matches
= 0;
1554 extract_insn (insn
);
1555 if (! constrain_operands (0))
1558 /* Must initialize this before main loop, because the code for
1559 the commutative case may set matches for operands other than
1561 for (op_no
= recog_data
.n_operands
; --op_no
>= 0; )
1562 matchp
->with
[op_no
] = matchp
->commutative
[op_no
] = -1;
1564 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1570 p
= recog_data
.constraints
[op_no
];
1572 likely_spilled
[op_no
] = 0;
1573 matchp
->use
[op_no
] = READ
;
1574 matchp
->early_clobber
[op_no
] = 0;
1576 matchp
->use
[op_no
] = WRITE
;
1578 matchp
->use
[op_no
] = READWRITE
;
1580 for (;*p
&& i
< which_alternative
; p
++)
1584 while ((c
= *p
) != '\0' && c
!= ',')
1593 matchp
->early_clobber
[op_no
] = 1;
1596 matchp
->commutative
[op_no
] = op_no
+ 1;
1597 matchp
->commutative
[op_no
+ 1] = op_no
;
1600 case '0': case '1': case '2': case '3': case '4':
1601 case '5': case '6': case '7': case '8': case '9':
1604 unsigned long match_ul
= strtoul (p
, &end
, 10);
1605 int match
= match_ul
;
1609 if (match
< op_no
&& likely_spilled
[match
])
1611 matchp
->with
[op_no
] = match
;
1613 if (matchp
->commutative
[op_no
] >= 0)
1614 matchp
->with
[matchp
->commutative
[op_no
]] = match
;
1618 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1619 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1620 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1621 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1622 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_CONSTRAINT ((unsigned char) c
, p
) ))
1623 likely_spilled
[op_no
] = 1;
1626 p
+= CONSTRAINT_LEN (c
, p
);
1632 /* Try to replace all occurrences of DST_REG with SRC in LOC, that is
1633 assumed to be in INSN. */
1636 replace_in_call_usage (rtx
*loc
, unsigned int dst_reg
, rtx src
, rtx insn
)
1646 code
= GET_CODE (x
);
1649 if (REGNO (x
) != dst_reg
)
1652 validate_change (insn
, loc
, src
, 1);
1657 /* Process each of our operands recursively. */
1658 fmt
= GET_RTX_FORMAT (code
);
1659 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++, fmt
++)
1661 replace_in_call_usage (&XEXP (x
, i
), dst_reg
, src
, insn
);
1662 else if (*fmt
== 'E')
1663 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1664 replace_in_call_usage (& XVECEXP (x
, i
, j
), dst_reg
, src
, insn
);
1667 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1668 the only set in INSN. INSN has just been recognized and constrained.
1669 SRC is operand number OPERAND_NUMBER in INSN.
1670 DST is operand number MATCH_NUMBER in INSN.
1671 If BACKWARD is nonzero, we have been called in a backward pass.
1672 Return nonzero for success. */
1675 fixup_match_1 (rtx insn
, rtx set
, rtx src
, rtx src_subreg
, rtx dst
,
1676 int backward
, int operand_number
, int match_number
)
1679 rtx post_inc
= 0, post_inc_set
= 0, search_end
= 0;
1681 int num_calls
= 0, s_num_calls
= 0;
1682 enum rtx_code code
= NOTE
;
1683 HOST_WIDE_INT insn_const
= 0, newconst
= 0;
1684 rtx overlap
= 0; /* need to move insn ? */
1685 rtx src_note
= find_reg_note (insn
, REG_DEAD
, src
), dst_note
= NULL_RTX
;
1686 int length
, s_length
;
1690 /* Look for (set (regX) (op regA constX))
1691 (set (regY) (op regA constY))
1693 (set (regA) (op regA constX)).
1694 (set (regY) (op regA constY-constX)).
1695 This works for add and shift operations, if
1696 regA is dead after or set by the second insn. */
1698 code
= GET_CODE (SET_SRC (set
));
1699 if ((code
== PLUS
|| code
== LSHIFTRT
1700 || code
== ASHIFT
|| code
== ASHIFTRT
)
1701 && XEXP (SET_SRC (set
), 0) == src
1702 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
)
1703 insn_const
= INTVAL (XEXP (SET_SRC (set
), 1));
1704 else if (! stable_and_no_regs_but_for_p (SET_SRC (set
), src
, dst
))
1707 /* We might find a src_note while scanning. */
1713 "Could fix operand %d of insn %d matching operand %d.\n",
1714 operand_number
, INSN_UID (insn
), match_number
);
1716 /* If SRC is equivalent to a constant set in a different basic block,
1717 then do not use it for this optimization. We want the equivalence
1718 so that if we have to reload this register, we can reload the
1719 constant, rather than extending the lifespan of the register. */
1720 if (reg_is_remote_constant_p (src
, insn
))
1723 /* Scan forward to find the next instruction that
1724 uses the output operand. If the operand dies here,
1725 then replace it in both instructions with
1728 for (length
= s_length
= 0, p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1731 replace_in_call_usage (& CALL_INSN_FUNCTION_USAGE (p
),
1732 REGNO (dst
), src
, p
);
1734 /* ??? We can't scan past the end of a basic block without updating
1735 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
1736 if (perhaps_ends_bb_p (p
))
1738 else if (! INSN_P (p
))
1745 if (reg_set_p (src
, p
) || reg_set_p (dst
, p
)
1746 || (GET_CODE (PATTERN (p
)) == USE
1747 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
1750 /* See if all of DST dies in P. This test is
1751 slightly more conservative than it needs to be. */
1752 if ((dst_note
= find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
1753 && (GET_MODE (XEXP (dst_note
, 0)) == GET_MODE (dst
)))
1755 /* If we would be moving INSN, check that we won't move it
1756 into the shadow of a live a live flags register. */
1757 /* ??? We only try to move it in front of P, although
1758 we could move it anywhere between OVERLAP and P. */
1759 if (overlap
&& GET_MODE (PREV_INSN (p
)) != VOIDmode
)
1765 rtx set2
= NULL_RTX
;
1767 /* If an optimization is done, the value of SRC while P
1768 is executed will be changed. Check that this is OK. */
1769 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1771 for (q
= p
; q
; q
= NEXT_INSN (q
))
1773 /* ??? We can't scan past the end of a basic block without
1774 updating the register lifetime info
1775 (REG_DEAD/basic_block_live_at_start). */
1776 if (perhaps_ends_bb_p (q
))
1781 else if (! INSN_P (q
))
1783 else if (reg_overlap_mentioned_p (src
, PATTERN (q
))
1784 || reg_set_p (src
, q
))
1788 set2
= single_set (q
);
1789 if (! q
|| ! set2
|| GET_CODE (SET_SRC (set2
)) != code
1790 || XEXP (SET_SRC (set2
), 0) != src
1791 || GET_CODE (XEXP (SET_SRC (set2
), 1)) != CONST_INT
1792 || (SET_DEST (set2
) != src
1793 && ! find_reg_note (q
, REG_DEAD
, src
)))
1795 /* If this is a PLUS, we can still save a register by doing
1798 src -= insn_const; .
1799 This also gives opportunities for subsequent
1800 optimizations in the backward pass, so do it there. */
1801 if (code
== PLUS
&& backward
1802 /* Don't do this if we can likely tie DST to SET_DEST
1803 of P later; we can't do this tying here if we got a
1805 && ! (dst_note
&& ! REG_N_CALLS_CROSSED (REGNO (dst
))
1807 && REG_P (SET_DEST (single_set (p
)))
1808 && (REGNO (SET_DEST (single_set (p
)))
1809 < FIRST_PSEUDO_REGISTER
))
1810 /* We may only emit an insn directly after P if we
1811 are not in the shadow of a live flags register. */
1812 && GET_MODE (p
) == VOIDmode
)
1817 newconst
= -insn_const
;
1825 newconst
= INTVAL (XEXP (SET_SRC (set2
), 1)) - insn_const
;
1826 /* Reject out of range shifts. */
1829 || ((unsigned HOST_WIDE_INT
) newconst
1830 >= (GET_MODE_BITSIZE (GET_MODE
1831 (SET_SRC (set2
)))))))
1836 if (SET_DEST (set2
) != src
)
1837 post_inc_set
= set2
;
1840 /* We use 1 as last argument to validate_change so that all
1841 changes are accepted or rejected together by apply_change_group
1842 when it is called by validate_replace_rtx . */
1843 validate_change (q
, &XEXP (SET_SRC (set2
), 1),
1844 GEN_INT (newconst
), 1);
1846 validate_change (insn
, recog_data
.operand_loc
[match_number
], src
, 1);
1847 if (validate_replace_rtx (dst
, src_subreg
, p
))
1852 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1854 if (! src_note
&& reg_overlap_mentioned_p (src
, PATTERN (p
)))
1856 /* INSN was already checked to be movable wrt. the registers that it
1857 sets / uses when we found no REG_DEAD note for src on it, but it
1858 still might clobber the flags register. We'll have to check that
1859 we won't insert it into the shadow of a live flags register when
1860 we finally know where we are to move it. */
1862 src_note
= find_reg_note (p
, REG_DEAD
, src
);
1865 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1866 already live across a call, then don't perform the optimization. */
1869 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1883 /* Remove the death note for DST from P. */
1884 remove_note (p
, dst_note
);
1887 post_inc
= emit_insn_after (copy_rtx (PATTERN (insn
)), p
);
1888 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1890 && try_auto_increment (search_end
, post_inc
, 0, src
, newconst
, 1))
1892 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (insn_const
), 0);
1893 INC_REG_N_SETS (REGNO (src
), 1);
1894 REG_LIVE_LENGTH (REGNO (src
))++;
1898 /* The lifetime of src and dest overlap,
1899 but we can change this by moving insn. */
1900 rtx pat
= PATTERN (insn
);
1902 remove_note (overlap
, src_note
);
1903 if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1905 && try_auto_increment (overlap
, insn
, 0, src
, insn_const
, 0))
1909 rtx notes
= REG_NOTES (insn
);
1911 p
= emit_insn_after_setloc (pat
, PREV_INSN (p
), INSN_LOCATOR (insn
));
1913 REG_NOTES (p
) = notes
;
1914 df_notes_rescan (p
);
1917 /* Sometimes we'd generate src = const; src += n;
1918 if so, replace the instruction that set src
1919 in the first place. */
1921 if (! overlap
&& (code
== PLUS
|| code
== MINUS
))
1923 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
1924 rtx q
, set2
= NULL_RTX
;
1925 int num_calls2
= 0, s_length2
= 0;
1927 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1929 for (q
= PREV_INSN (insn
); q
; q
= PREV_INSN (q
))
1931 /* ??? We can't scan past the end of a basic block without
1932 updating the register lifetime info
1933 (REG_DEAD/basic_block_live_at_start). */
1934 if (perhaps_ends_bb_p (q
))
1939 else if (! INSN_P (q
))
1943 if (reg_set_p (src
, q
))
1945 set2
= single_set (q
);
1948 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
1956 if (q
&& set2
&& SET_DEST (set2
) == src
&& CONSTANT_P (SET_SRC (set2
))
1957 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
1960 INC_REG_N_SETS (REGNO (src
), -1);
1961 REG_N_CALLS_CROSSED (REGNO (src
)) -= num_calls2
;
1962 REG_LIVE_LENGTH (REGNO (src
)) -= s_length2
;
1968 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1969 && (code
== PLUS
|| code
== MINUS
) && insn_const
1970 && try_auto_increment (p
, insn
, 0, src
, insn_const
, 1))
1972 else if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1974 && try_auto_increment (p
, post_inc
, post_inc_set
, src
, newconst
, 0))
1976 /* If post_inc still prevails, try to find an
1977 insn where it can be used as a pre-in/decrement.
1978 If code is MINUS, this was already tried. */
1979 if (post_inc
&& code
== PLUS
1980 /* Check that newconst is likely to be usable
1981 in a pre-in/decrement before starting the search. */
1982 && ((HAVE_PRE_INCREMENT
&& newconst
> 0 && newconst
<= MOVE_MAX
)
1983 || (HAVE_PRE_DECREMENT
&& newconst
< 0 && newconst
>= -MOVE_MAX
))
1984 && exact_log2 (newconst
))
1988 inc_dest
= post_inc_set
? SET_DEST (post_inc_set
) : src
;
1989 for (q
= post_inc
; (q
= NEXT_INSN (q
)); )
1991 /* ??? We can't scan past the end of a basic block without updating
1992 the register lifetime info
1993 (REG_DEAD/basic_block_live_at_start). */
1994 if (perhaps_ends_bb_p (q
))
1996 else if (! INSN_P (q
))
1998 else if (src
!= inc_dest
1999 && (reg_overlap_mentioned_p (src
, PATTERN (q
))
2000 || reg_set_p (src
, q
)))
2002 else if (reg_set_p (inc_dest
, q
))
2004 else if (reg_overlap_mentioned_p (inc_dest
, PATTERN (q
)))
2006 try_auto_increment (q
, post_inc
,
2007 post_inc_set
, inc_dest
, newconst
, 1);
2013 /* Move the death note for DST to INSN if it is used
2015 if (reg_overlap_mentioned_p (dst
, PATTERN (insn
)))
2017 XEXP (dst_note
, 1) = REG_NOTES (insn
);
2018 REG_NOTES (insn
) = dst_note
;
2023 /* Move the death note for SRC from INSN to P. */
2025 remove_note (insn
, src_note
);
2026 XEXP (src_note
, 1) = REG_NOTES (p
);
2027 REG_NOTES (p
) = src_note
;
2029 REG_N_CALLS_CROSSED (REGNO (src
)) += s_num_calls
;
2032 INC_REG_N_SETS (REGNO (src
), 1);
2033 INC_REG_N_SETS (REGNO (dst
), -1);
2035 REG_N_CALLS_CROSSED (REGNO (dst
)) -= num_calls
;
2037 REG_LIVE_LENGTH (REGNO (src
)) += s_length
;
2038 if (REG_LIVE_LENGTH (REGNO (dst
)) >= 0)
2040 REG_LIVE_LENGTH (REGNO (dst
)) -= length
;
2041 /* REG_LIVE_LENGTH is only an approximation after
2042 combine if sched is not run, so make sure that we
2043 still have a reasonable value. */
2044 if (REG_LIVE_LENGTH (REGNO (dst
)) < 2)
2045 REG_LIVE_LENGTH (REGNO (dst
)) = 2;
2049 "Fixed operand %d of insn %d matching operand %d.\n",
2050 operand_number
, INSN_UID (insn
), match_number
);
2055 /* Return nonzero if X is stable and mentions no registers but for
2056 mentioning SRC or mentioning / changing DST . If in doubt, presume
2058 The rationale is that we want to check if we can move an insn easily
2059 while just paying attention to SRC and DST. */
2061 stable_and_no_regs_but_for_p (rtx x
, rtx src
, rtx dst
)
2063 RTX_CODE code
= GET_CODE (x
);
2064 switch (GET_RTX_CLASS (code
))
2068 case RTX_COMM_ARITH
:
2070 case RTX_COMM_COMPARE
:
2072 case RTX_BITFIELD_OPS
:
2075 const char *fmt
= GET_RTX_FORMAT (code
);
2076 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2078 && ! stable_and_no_regs_but_for_p (XEXP (x
, i
), src
, dst
))
2084 return x
== src
|| x
== dst
;
2085 /* If this is a MEM, look inside - there might be a register hidden in
2086 the address of an unchanging MEM. */
2088 && ! stable_and_no_regs_but_for_p (XEXP (x
, 0), src
, dst
))
2092 return ! rtx_unstable_p (x
);
2098 gate_handle_regmove (void)
2100 return (optimize
> 0 && flag_regmove
);
2103 /* Register allocation pre-pass, to reduce number of moves necessary
2104 for two-address machines. */
2106 rest_of_handle_regmove (void)
2108 regmove_optimize (get_insns (), max_reg_num ());
2112 struct tree_opt_pass pass_regmove
=
2114 "regmove", /* name */
2115 gate_handle_regmove
, /* gate */
2116 rest_of_handle_regmove
, /* execute */
2119 0, /* static_pass_number */
2120 TV_REGMOVE
, /* tv_id */
2121 0, /* properties_required */
2122 0, /* properties_provided */
2123 0, /* properties_destroyed */
2124 0, /* todo_flags_start */
2127 TODO_ggc_collect
, /* todo_flags_finish */