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1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
20 02110-1301, USA. */
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "rtl.h"
27 #include "regs.h"
28 #include "insn-config.h"
29 #include "flags.h"
30 #include "hard-reg-set.h"
31 #include "recog.h"
32 #include "basic-block.h"
33 #include "reload.h"
34 #include "function.h"
35 #include "expr.h"
36 #include "toplev.h"
37 #include "tm_p.h"
38 #include "addresses.h"
39 #include "df.h"
41 #ifndef MAX_MOVE_MAX
42 #define MAX_MOVE_MAX MOVE_MAX
43 #endif
45 #ifndef MIN_UNITS_PER_WORD
46 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
47 #endif
49 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
51 /* Modes for each hard register that we can save. The smallest mode is wide
52 enough to save the entire contents of the register. When saving the
53 register because it is live we first try to save in multi-register modes.
54 If that is not possible the save is done one register at a time. */
56 static enum machine_mode
57 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
59 /* For each hard register, a place on the stack where it can be saved,
60 if needed. */
62 static rtx
63 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
65 /* We will only make a register eligible for caller-save if it can be
66 saved in its widest mode with a simple SET insn as long as the memory
67 address is valid. We record the INSN_CODE is those insns here since
68 when we emit them, the addresses might not be valid, so they might not
69 be recognized. */
71 static int
72 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
73 static int
74 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
76 /* Set of hard regs currently residing in save area (during insn scan). */
78 static HARD_REG_SET hard_regs_saved;
80 /* Number of registers currently in hard_regs_saved. */
82 static int n_regs_saved;
84 /* Computed by mark_referenced_regs, all regs referenced in a given
85 insn. */
86 static HARD_REG_SET referenced_regs;
89 static void mark_set_regs (rtx, rtx, void *);
90 static void mark_referenced_regs (rtx);
91 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
92 enum machine_mode *);
93 static int insert_restore (struct insn_chain *, int, int, int,
94 enum machine_mode *);
95 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
96 rtx);
97 static void add_stored_regs (rtx, rtx, void *);
99 /* Initialize for caller-save.
101 Look at all the hard registers that are used by a call and for which
102 regclass.c has not already excluded from being used across a call.
104 Ensure that we can find a mode to save the register and that there is a
105 simple insn to save and restore the register. This latter check avoids
106 problems that would occur if we tried to save the MQ register of some
107 machines directly into memory. */
109 void
110 init_caller_save (void)
112 rtx addr_reg;
113 int offset;
114 rtx address;
115 int i, j;
116 enum machine_mode mode;
117 rtx savepat, restpat;
118 rtx test_reg, test_mem;
119 rtx saveinsn, restinsn;
121 /* First find all the registers that we need to deal with and all
122 the modes that they can have. If we can't find a mode to use,
123 we can't have the register live over calls. */
125 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
127 if (call_used_regs[i] && ! call_fixed_regs[i])
129 for (j = 1; j <= MOVE_MAX_WORDS; j++)
131 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
132 VOIDmode);
133 if (regno_save_mode[i][j] == VOIDmode && j == 1)
135 call_fixed_regs[i] = 1;
136 SET_HARD_REG_BIT (call_fixed_reg_set, i);
140 else
141 regno_save_mode[i][1] = VOIDmode;
144 /* The following code tries to approximate the conditions under which
145 we can easily save and restore a register without scratch registers or
146 other complexities. It will usually work, except under conditions where
147 the validity of an insn operand is dependent on the address offset.
148 No such cases are currently known.
150 We first find a typical offset from some BASE_REG_CLASS register.
151 This address is chosen by finding the first register in the class
152 and by finding the smallest power of two that is a valid offset from
153 that register in every mode we will use to save registers. */
155 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
156 if (TEST_HARD_REG_BIT
157 (reg_class_contents
158 [(int) base_reg_class (regno_save_mode [i][1], PLUS, CONST_INT)], i))
159 break;
161 gcc_assert (i < FIRST_PSEUDO_REGISTER);
163 addr_reg = gen_rtx_REG (Pmode, i);
165 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
167 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
169 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
170 if (regno_save_mode[i][1] != VOIDmode
171 && ! strict_memory_address_p (regno_save_mode[i][1], address))
172 break;
174 if (i == FIRST_PSEUDO_REGISTER)
175 break;
178 /* If we didn't find a valid address, we must use register indirect. */
179 if (offset == 0)
180 address = addr_reg;
182 /* Next we try to form an insn to save and restore the register. We
183 see if such an insn is recognized and meets its constraints.
185 To avoid lots of unnecessary RTL allocation, we construct all the RTL
186 once, then modify the memory and register operands in-place. */
188 test_reg = gen_rtx_REG (VOIDmode, 0);
189 test_mem = gen_rtx_MEM (VOIDmode, address);
190 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
191 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
193 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0);
194 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0);
196 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
197 for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++)
198 if (HARD_REGNO_MODE_OK (i, mode))
200 int ok;
202 /* Update the register number and modes of the register
203 and memory operand. */
204 SET_REGNO (test_reg, i);
205 PUT_MODE (test_reg, mode);
206 PUT_MODE (test_mem, mode);
208 /* Force re-recognition of the modified insns. */
209 INSN_CODE (saveinsn) = -1;
210 INSN_CODE (restinsn) = -1;
212 reg_save_code[i][mode] = recog_memoized (saveinsn);
213 reg_restore_code[i][mode] = recog_memoized (restinsn);
215 /* Now extract both insns and see if we can meet their
216 constraints. */
217 ok = (reg_save_code[i][mode] != -1
218 && reg_restore_code[i][mode] != -1);
219 if (ok)
221 extract_insn (saveinsn);
222 ok = constrain_operands (1);
223 extract_insn (restinsn);
224 ok &= constrain_operands (1);
227 if (! ok)
229 reg_save_code[i][mode] = -1;
230 reg_restore_code[i][mode] = -1;
233 else
235 reg_save_code[i][mode] = -1;
236 reg_restore_code[i][mode] = -1;
239 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
240 for (j = 1; j <= MOVE_MAX_WORDS; j++)
241 if (reg_save_code [i][regno_save_mode[i][j]] == -1)
243 regno_save_mode[i][j] = VOIDmode;
244 if (j == 1)
246 call_fixed_regs[i] = 1;
247 SET_HARD_REG_BIT (call_fixed_reg_set, i);
252 /* Initialize save areas by showing that we haven't allocated any yet. */
254 void
255 init_save_areas (void)
257 int i, j;
259 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
260 for (j = 1; j <= MOVE_MAX_WORDS; j++)
261 regno_save_mem[i][j] = 0;
264 /* Allocate save areas for any hard registers that might need saving.
265 We take a conservative approach here and look for call-clobbered hard
266 registers that are assigned to pseudos that cross calls. This may
267 overestimate slightly (especially if some of these registers are later
268 used as spill registers), but it should not be significant.
270 Future work:
272 In the fallback case we should iterate backwards across all possible
273 modes for the save, choosing the largest available one instead of
274 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
276 We do not try to use "move multiple" instructions that exist
277 on some machines (such as the 68k moveml). It could be a win to try
278 and use them when possible. The hard part is doing it in a way that is
279 machine independent since they might be saving non-consecutive
280 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
282 void
283 setup_save_areas (void)
285 int i, j, k;
286 unsigned int r;
287 HARD_REG_SET hard_regs_used;
289 /* Allocate space in the save area for the largest multi-register
290 pseudos first, then work backwards to single register
291 pseudos. */
293 /* Find and record all call-used hard-registers in this function. */
294 CLEAR_HARD_REG_SET (hard_regs_used);
295 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
296 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
298 unsigned int regno = reg_renumber[i];
299 unsigned int endregno
300 = end_hard_regno (GET_MODE (regno_reg_rtx[i]), regno);
302 for (r = regno; r < endregno; r++)
303 if (call_used_regs[r])
304 SET_HARD_REG_BIT (hard_regs_used, r);
307 /* Now run through all the call-used hard-registers and allocate
308 space for them in the caller-save area. Try to allocate space
309 in a manner which allows multi-register saves/restores to be done. */
311 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
312 for (j = MOVE_MAX_WORDS; j > 0; j--)
314 int do_save = 1;
316 /* If no mode exists for this size, try another. Also break out
317 if we have already saved this hard register. */
318 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
319 continue;
321 /* See if any register in this group has been saved. */
322 for (k = 0; k < j; k++)
323 if (regno_save_mem[i + k][1])
325 do_save = 0;
326 break;
328 if (! do_save)
329 continue;
331 for (k = 0; k < j; k++)
332 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
334 do_save = 0;
335 break;
337 if (! do_save)
338 continue;
340 /* We have found an acceptable mode to store in. */
341 regno_save_mem[i][j]
342 = assign_stack_local (regno_save_mode[i][j],
343 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
345 /* Setup single word save area just in case... */
346 for (k = 0; k < j; k++)
347 /* This should not depend on WORDS_BIG_ENDIAN.
348 The order of words in regs is the same as in memory. */
349 regno_save_mem[i + k][1]
350 = adjust_address_nv (regno_save_mem[i][j],
351 regno_save_mode[i + k][1],
352 k * UNITS_PER_WORD);
355 /* Now loop again and set the alias set of any save areas we made to
356 the alias set used to represent frame objects. */
357 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
358 for (j = MOVE_MAX_WORDS; j > 0; j--)
359 if (regno_save_mem[i][j] != 0)
360 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
363 /* Find the places where hard regs are live across calls and save them. */
365 void
366 save_call_clobbered_regs (void)
368 struct insn_chain *chain, *next;
369 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
371 /* Computed in mark_set_regs, holds all registers set by the current
372 instruction. */
373 HARD_REG_SET this_insn_sets;
375 CLEAR_HARD_REG_SET (hard_regs_saved);
376 n_regs_saved = 0;
378 for (chain = reload_insn_chain; chain != 0; chain = next)
380 rtx insn = chain->insn;
381 enum rtx_code code = GET_CODE (insn);
383 next = chain->next;
385 gcc_assert (!chain->is_caller_save_insn);
387 if (INSN_P (insn))
389 /* If some registers have been saved, see if INSN references
390 any of them. We must restore them before the insn if so. */
392 if (n_regs_saved)
394 int regno;
396 if (code == JUMP_INSN)
397 /* Restore all registers if this is a JUMP_INSN. */
398 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
399 else
401 CLEAR_HARD_REG_SET (referenced_regs);
402 mark_referenced_regs (PATTERN (insn));
403 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
406 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
407 if (TEST_HARD_REG_BIT (referenced_regs, regno))
408 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
411 if (code == CALL_INSN
412 && ! SIBLING_CALL_P (insn)
413 && ! find_reg_note (insn, REG_NORETURN, NULL))
415 unsigned regno;
416 HARD_REG_SET hard_regs_to_save;
417 reg_set_iterator rsi;
419 /* Use the register life information in CHAIN to compute which
420 regs are live during the call. */
421 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
422 &chain->live_throughout);
423 /* Save hard registers always in the widest mode available. */
424 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
425 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
426 save_mode [regno] = regno_save_mode [regno][1];
427 else
428 save_mode [regno] = VOIDmode;
430 /* Look through all live pseudos, mark their hard registers
431 and choose proper mode for saving. */
432 EXECUTE_IF_SET_IN_REG_SET
433 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
435 int r = reg_renumber[regno];
436 int nregs;
437 enum machine_mode mode;
439 gcc_assert (r >= 0);
440 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
441 mode = HARD_REGNO_CALLER_SAVE_MODE
442 (r, nregs, PSEUDO_REGNO_MODE (regno));
443 if (GET_MODE_BITSIZE (mode)
444 > GET_MODE_BITSIZE (save_mode[r]))
445 save_mode[r] = mode;
446 while (nregs-- > 0)
447 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
450 /* Record all registers set in this call insn. These don't need
451 to be saved. N.B. the call insn might set a subreg of a
452 multi-hard-reg pseudo; then the pseudo is considered live
453 during the call, but the subreg that is set isn't. */
454 CLEAR_HARD_REG_SET (this_insn_sets);
455 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
457 /* Compute which hard regs must be saved before this call. */
458 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
459 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
460 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
461 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
463 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
464 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
465 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
467 /* Must recompute n_regs_saved. */
468 n_regs_saved = 0;
469 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
470 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
471 n_regs_saved++;
475 if (chain->next == 0 || chain->next->block > chain->block)
477 int regno;
478 /* At the end of the basic block, we must restore any registers that
479 remain saved. If the last insn in the block is a JUMP_INSN, put
480 the restore before the insn, otherwise, put it after the insn. */
482 if (n_regs_saved)
483 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
484 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
485 regno += insert_restore (chain, JUMP_P (insn),
486 regno, MOVE_MAX_WORDS, save_mode);
491 /* Here from note_stores, or directly from save_call_clobbered_regs, when
492 an insn stores a value in a register.
493 Set the proper bit or bits in this_insn_sets. All pseudos that have
494 been assigned hard regs have had their register number changed already,
495 so we can ignore pseudos. */
496 static void
497 mark_set_regs (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *data)
499 int regno, endregno, i;
500 HARD_REG_SET *this_insn_sets = data;
502 if (GET_CODE (reg) == SUBREG)
504 rtx inner = SUBREG_REG (reg);
505 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
506 return;
507 regno = subreg_regno (reg);
508 endregno = regno + subreg_nregs (reg);
510 else if (REG_P (reg)
511 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
513 regno = REGNO (reg);
514 endregno = END_HARD_REGNO (reg);
516 else
517 return;
519 for (i = regno; i < endregno; i++)
520 SET_HARD_REG_BIT (*this_insn_sets, i);
523 /* Here from note_stores when an insn stores a value in a register.
524 Set the proper bit or bits in the passed regset. All pseudos that have
525 been assigned hard regs have had their register number changed already,
526 so we can ignore pseudos. */
527 static void
528 add_stored_regs (rtx reg, rtx setter, void *data)
530 int regno, endregno, i;
531 enum machine_mode mode = GET_MODE (reg);
532 int offset = 0;
534 if (GET_CODE (setter) == CLOBBER)
535 return;
537 if (GET_CODE (reg) == SUBREG
538 && REG_P (SUBREG_REG (reg))
539 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER)
541 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
542 GET_MODE (SUBREG_REG (reg)),
543 SUBREG_BYTE (reg),
544 GET_MODE (reg));
545 regno = REGNO (SUBREG_REG (reg)) + offset;
546 endregno = regno + subreg_nregs (reg);
548 else
550 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
551 return;
553 regno = REGNO (reg) + offset;
554 endregno = end_hard_regno (mode, regno);
557 for (i = regno; i < endregno; i++)
558 SET_REGNO_REG_SET ((regset) data, i);
561 /* Walk X and record all referenced registers in REFERENCED_REGS. */
562 static void
563 mark_referenced_regs (rtx x)
565 enum rtx_code code = GET_CODE (x);
566 const char *fmt;
567 int i, j;
569 if (code == SET)
570 mark_referenced_regs (SET_SRC (x));
571 if (code == SET || code == CLOBBER)
573 x = SET_DEST (x);
574 code = GET_CODE (x);
575 if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
576 || code == PC || code == CC0
577 || (code == SUBREG && REG_P (SUBREG_REG (x))
578 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
579 /* If we're setting only part of a multi-word register,
580 we shall mark it as referenced, because the words
581 that are not being set should be restored. */
582 && ((GET_MODE_SIZE (GET_MODE (x))
583 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
584 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
585 <= UNITS_PER_WORD))))
586 return;
588 if (code == MEM || code == SUBREG)
590 x = XEXP (x, 0);
591 code = GET_CODE (x);
594 if (code == REG)
596 int regno = REGNO (x);
597 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
598 : reg_renumber[regno]);
600 if (hardregno >= 0)
601 add_to_hard_reg_set (&referenced_regs, GET_MODE (x), hardregno);
602 /* If this is a pseudo that did not get a hard register, scan its
603 memory location, since it might involve the use of another
604 register, which might be saved. */
605 else if (reg_equiv_mem[regno] != 0)
606 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
607 else if (reg_equiv_address[regno] != 0)
608 mark_referenced_regs (reg_equiv_address[regno]);
609 return;
612 fmt = GET_RTX_FORMAT (code);
613 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
615 if (fmt[i] == 'e')
616 mark_referenced_regs (XEXP (x, i));
617 else if (fmt[i] == 'E')
618 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
619 mark_referenced_regs (XVECEXP (x, i, j));
623 /* Insert a sequence of insns to restore. Place these insns in front of
624 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
625 the maximum number of registers which should be restored during this call.
626 It should never be less than 1 since we only work with entire registers.
628 Note that we have verified in init_caller_save that we can do this
629 with a simple SET, so use it. Set INSN_CODE to what we save there
630 since the address might not be valid so the insn might not be recognized.
631 These insns will be reloaded and have register elimination done by
632 find_reload, so we need not worry about that here.
634 Return the extra number of registers saved. */
636 static int
637 insert_restore (struct insn_chain *chain, int before_p, int regno,
638 int maxrestore, enum machine_mode *save_mode)
640 int i, k;
641 rtx pat = NULL_RTX;
642 int code;
643 unsigned int numregs = 0;
644 struct insn_chain *new;
645 rtx mem;
647 /* A common failure mode if register status is not correct in the
648 RTL is for this routine to be called with a REGNO we didn't
649 expect to save. That will cause us to write an insn with a (nil)
650 SET_DEST or SET_SRC. Instead of doing so and causing a crash
651 later, check for this common case here instead. This will remove
652 one step in debugging such problems. */
653 gcc_assert (regno_save_mem[regno][1]);
655 /* Get the pattern to emit and update our status.
657 See if we can restore `maxrestore' registers at once. Work
658 backwards to the single register case. */
659 for (i = maxrestore; i > 0; i--)
661 int j;
662 int ok = 1;
664 if (regno_save_mem[regno][i] == 0)
665 continue;
667 for (j = 0; j < i; j++)
668 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
670 ok = 0;
671 break;
673 /* Must do this one restore at a time. */
674 if (! ok)
675 continue;
677 numregs = i;
678 break;
681 mem = regno_save_mem [regno][numregs];
682 if (save_mode [regno] != VOIDmode
683 && save_mode [regno] != GET_MODE (mem)
684 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
685 mem = adjust_address (mem, save_mode[regno], 0);
686 else
687 mem = copy_rtx (mem);
688 pat = gen_rtx_SET (VOIDmode,
689 gen_rtx_REG (GET_MODE (mem),
690 regno), mem);
691 code = reg_restore_code[regno][GET_MODE (mem)];
692 new = insert_one_insn (chain, before_p, code, pat);
694 /* Clear status for all registers we restored. */
695 for (k = 0; k < i; k++)
697 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
698 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
699 n_regs_saved--;
702 /* Tell our callers how many extra registers we saved/restored. */
703 return numregs - 1;
706 /* Like insert_restore above, but save registers instead. */
708 static int
709 insert_save (struct insn_chain *chain, int before_p, int regno,
710 HARD_REG_SET (*to_save), enum machine_mode *save_mode)
712 int i;
713 unsigned int k;
714 rtx pat = NULL_RTX;
715 int code;
716 unsigned int numregs = 0;
717 struct insn_chain *new;
718 rtx mem;
720 /* A common failure mode if register status is not correct in the
721 RTL is for this routine to be called with a REGNO we didn't
722 expect to save. That will cause us to write an insn with a (nil)
723 SET_DEST or SET_SRC. Instead of doing so and causing a crash
724 later, check for this common case here. This will remove one
725 step in debugging such problems. */
726 gcc_assert (regno_save_mem[regno][1]);
728 /* Get the pattern to emit and update our status.
730 See if we can save several registers with a single instruction.
731 Work backwards to the single register case. */
732 for (i = MOVE_MAX_WORDS; i > 0; i--)
734 int j;
735 int ok = 1;
736 if (regno_save_mem[regno][i] == 0)
737 continue;
739 for (j = 0; j < i; j++)
740 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
742 ok = 0;
743 break;
745 /* Must do this one save at a time. */
746 if (! ok)
747 continue;
749 numregs = i;
750 break;
753 mem = regno_save_mem [regno][numregs];
754 if (save_mode [regno] != VOIDmode
755 && save_mode [regno] != GET_MODE (mem)
756 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
757 mem = adjust_address (mem, save_mode[regno], 0);
758 else
759 mem = copy_rtx (mem);
760 pat = gen_rtx_SET (VOIDmode, mem,
761 gen_rtx_REG (GET_MODE (mem),
762 regno));
763 code = reg_save_code[regno][GET_MODE (mem)];
764 new = insert_one_insn (chain, before_p, code, pat);
766 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
767 for (k = 0; k < numregs; k++)
769 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
770 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
771 n_regs_saved++;
774 /* Tell our callers how many extra registers we saved/restored. */
775 return numregs - 1;
778 /* Emit a new caller-save insn and set the code. */
779 static struct insn_chain *
780 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
782 rtx insn = chain->insn;
783 struct insn_chain *new;
785 #ifdef HAVE_cc0
786 /* If INSN references CC0, put our insns in front of the insn that sets
787 CC0. This is always safe, since the only way we could be passed an
788 insn that references CC0 is for a restore, and doing a restore earlier
789 isn't a problem. We do, however, assume here that CALL_INSNs don't
790 reference CC0. Guard against non-INSN's like CODE_LABEL. */
792 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
793 && before_p
794 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
795 chain = chain->prev, insn = chain->insn;
796 #endif
798 new = new_insn_chain ();
799 if (before_p)
801 rtx link;
803 new->prev = chain->prev;
804 if (new->prev != 0)
805 new->prev->next = new;
806 else
807 reload_insn_chain = new;
809 chain->prev = new;
810 new->next = chain;
811 new->insn = emit_insn_before (pat, insn);
812 /* ??? It would be nice if we could exclude the already / still saved
813 registers from the live sets. */
814 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
815 /* Registers that die in CHAIN->INSN still live in the new insn. */
816 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
818 if (REG_NOTE_KIND (link) == REG_DEAD)
820 rtx reg = XEXP (link, 0);
821 int regno, i;
823 gcc_assert (REG_P (reg));
824 regno = REGNO (reg);
825 if (regno >= FIRST_PSEUDO_REGISTER)
826 regno = reg_renumber[regno];
827 if (regno < 0)
828 continue;
829 for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
830 i >= 0; i--)
831 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
834 CLEAR_REG_SET (&new->dead_or_set);
835 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
836 BB_HEAD (BASIC_BLOCK (chain->block)) = new->insn;
838 else
840 new->next = chain->next;
841 if (new->next != 0)
842 new->next->prev = new;
843 chain->next = new;
844 new->prev = chain;
845 new->insn = emit_insn_after (pat, insn);
846 /* ??? It would be nice if we could exclude the already / still saved
847 registers from the live sets, and observe REG_UNUSED notes. */
848 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
849 /* Registers that are set in CHAIN->INSN live in the new insn.
850 (Unless there is a REG_UNUSED note for them, but we don't
851 look for them here.) */
852 note_stores (PATTERN (chain->insn), add_stored_regs,
853 &new->live_throughout);
854 CLEAR_REG_SET (&new->dead_or_set);
855 if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
856 BB_END (BASIC_BLOCK (chain->block)) = new->insn;
858 new->block = chain->block;
859 new->is_caller_save_insn = 1;
861 INSN_CODE (new->insn) = code;
862 return new;