gcc/config/i386/subst.md

   1 ;; GCC machine description for AVX512F instructions
   2 ;; Copyright (C) 2013-2014 Free Software Foundation, Inc.
   3 ;;
   4 ;; This file is part of GCC.
   5 ;;
   6 ;; GCC is free software; you can redistribute it and/or modify
   7 ;; it under the terms of the GNU General Public License as published by
   8 ;; the Free Software Foundation; either version 3, or (at your option)
   9 ;; any later version.
  10 ;;
  11 ;; GCC is distributed in the hope that it will be useful,
  12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ;; GNU General Public License for more details.
  15 ;;
  16 ;; You should have received a copy of the GNU General Public License
  17 ;; along with GCC; see the file COPYING3.  If not see
  18 ;; <http://www.gnu.org/licenses/>.
  19
  20 ;; Some iterators for extending subst as much as possible
  21 ;; All vectors (Use it for destination)
  22 (define_mode_iterator SUBST_V
  23   [V16QI
  24    V16HI V8HI
  25    V16SI V8SI  V4SI
  26    V8DI  V4DI  V2DI
  27    V16SF V8SF  V4SF
  28    V8DF  V4DF  V2DF])
  29
  30 (define_mode_iterator SUBST_S
  31   [QI HI SI DI])
  32
  33 (define_mode_iterator SUBST_A
  34   [V16QI
  35    V16HI V8HI
  36    V16SI V8SI  V4SI
  37    V8DI  V4DI  V2DI
  38    V16SF V8SF  V4SF
  39    V8DF  V4DF  V2DF
  40    QI HI SI DI SF DF
  41    CCFP CCFPU])
  42
  43 (define_subst_attr "mask_name" "mask" "" "_mask")
  44 (define_subst_attr "mask_applied" "mask" "false" "true")
  45 (define_subst_attr "mask_operand2" "mask" "" "%{%3%}%N2")
  46 (define_subst_attr "mask_operand3" "mask" "" "%{%4%}%N3")
  47 (define_subst_attr "mask_operand3_1" "mask" "" "%%{%%4%%}%%N3") ;; for sprintf
  48 (define_subst_attr "mask_operand4" "mask" "" "%{%5%}%N4")
  49 (define_subst_attr "mask_operand6" "mask" "" "%{%7%}%N6")
  50 (define_subst_attr "mask_operand11" "mask" "" "%{%12%}%N11")
  51 (define_subst_attr "mask_operand18" "mask" "" "%{%19%}%N18")
  52 (define_subst_attr "mask_operand19" "mask" "" "%{%20%}%N19")
  53 (define_subst_attr "mask_codefor" "mask" "*" "")
  54 (define_subst_attr "mask_mode512bit_condition" "mask" "1" "(<MODE_SIZE> == 64)")
  55 (define_subst_attr "store_mask_constraint" "mask" "vm" "v")
  56 (define_subst_attr "store_mask_predicate" "mask" "nonimmediate_operand" "register_operand")
  57 (define_subst_attr "mask_prefix" "mask" "vex" "evex")
  58 (define_subst_attr "mask_prefix2" "mask" "maybe_vex" "evex")
  59 (define_subst_attr "mask_prefix3" "mask" "orig,vex" "evex")
  60
  61 (define_subst "mask"
  62   [(set (match_operand:SUBST_V 0)
  63         (match_operand:SUBST_V 1))]
  64   "TARGET_AVX512F"
  65   [(set (match_dup 0)
  66         (vec_merge:SUBST_V
  67           (match_dup 1)
  68           (match_operand:SUBST_V 2 "vector_move_operand" "0C")
  69           (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))])
  70
  71 (define_subst_attr "mask_scalar_merge_name" "mask_scalar_merge" "" "_mask")
  72 (define_subst_attr "mask_scalar_merge_operand3" "mask_scalar_merge" "" "%{%3%}")
  73 (define_subst_attr "mask_scalar_merge_operand4" "mask_scalar_merge" "" "%{%4%}")
  74
  75 (define_subst "mask_scalar_merge"
  76   [(set (match_operand:SUBST_S 0)
  77         (match_operand:SUBST_S 1))]
  78   "TARGET_AVX512F"
  79   [(set (match_dup 0)
  80         (and:SUBST_S
  81           (match_dup 1)
  82           (match_operand:SUBST_S 3 "register_operand" "Yk")))])
  83
  84 (define_subst_attr "sd_maskz_name" "sd" "" "_maskz_1")
  85 (define_subst_attr "sd_mask_op4" "sd" "" "%{%5%}%N4")
  86 (define_subst_attr "sd_mask_op5" "sd" "" "%{%6%}%N5")
  87 (define_subst_attr "sd_mask_codefor" "sd" "*" "")
  88 (define_subst_attr "sd_mask_mode512bit_condition" "sd" "1" "(<MODE_SIZE> == 64)")
  89
  90 (define_subst "sd"
  91  [(set (match_operand:SUBST_V 0)
  92        (match_operand:SUBST_V 1))]
  93  ""
  94  [(set (match_dup 0)
  95        (vec_merge:SUBST_V
  96          (match_dup 1)
  97          (match_operand:SUBST_V 2 "const0_operand" "C")
  98          (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))
  99 ])
 100
 101 (define_subst_attr "round_name" "round" "" "_round")
 102 (define_subst_attr "round_mask_operand2" "mask" "%R2" "%R4")
 103 (define_subst_attr "round_mask_operand3" "mask" "%R3" "%R5")
 104 (define_subst_attr "round_sd_mask_operand4" "sd" "%R4" "%R6")
 105 (define_subst_attr "round_op2" "round" "" "%R2")
 106 (define_subst_attr "round_op3" "round" "" "%R3")
 107 (define_subst_attr "round_op4" "round" "" "%R4")
 108 (define_subst_attr "round_op5" "round" "" "%R5")
 109 (define_subst_attr "round_op6" "round" "" "%R6")
 110 (define_subst_attr "round_mask_op2" "round" "" "<round_mask_operand2>")
 111 (define_subst_attr "round_mask_op3" "round" "" "<round_mask_operand3>")
 112 (define_subst_attr "round_mask_scalar_op3" "round" "" "<round_mask_scalar_operand3>")
 113 (define_subst_attr "round_sd_mask_op4" "round" "" "<round_sd_mask_operand4>")
 114 (define_subst_attr "round_constraint" "round" "vm" "v")
 115 (define_subst_attr "round_constraint2" "round" "m" "v")
 116 (define_subst_attr "round_constraint3" "round" "rm" "r")
 117 (define_subst_attr "round_nimm_predicate" "round" "nonimmediate_operand" "register_operand")
 118 (define_subst_attr "round_prefix" "round" "vex" "evex")
 119 (define_subst_attr "round_mode512bit_condition" "round" "1" "(<MODE>mode == V16SFmode || <MODE>mode == V8DFmode)")
 120 (define_subst_attr "round_modev4sf_condition" "round" "1" "(<MODE>mode == V4SFmode)")
 121 (define_subst_attr "round_codefor" "round" "*" "")
 122 (define_subst_attr "round_opnum" "round" "5" "6")
 123
 124 (define_subst "round"
 125   [(set (match_operand:SUBST_A 0)
 126         (match_operand:SUBST_A 1))]
 127   "TARGET_AVX512F"
 128   [(parallel[
 129      (set (match_dup 0)
 130           (match_dup 1))
 131      (unspec [(match_operand:SI 2 "const_4_or_8_to_11_operand")] UNSPEC_EMBEDDED_ROUNDING)])])
 132
 133 (define_subst_attr "round_saeonly_name" "round_saeonly" "" "_round")
 134 (define_subst_attr "round_saeonly_mask_operand2" "mask" "%r2" "%r4")
 135 (define_subst_attr "round_saeonly_mask_operand3" "mask" "%r3" "%r5")
 136 (define_subst_attr "round_saeonly_mask_scalar_merge_operand4" "mask_scalar_merge" "%r4" "%r5")
 137 (define_subst_attr "round_saeonly_sd_mask_operand5" "sd" "%r5" "%r7")
 138 (define_subst_attr "round_saeonly_op2" "round_saeonly" "" "%r2")
 139 (define_subst_attr "round_saeonly_op3" "round_saeonly" "" "%r3")
 140 (define_subst_attr "round_saeonly_op4" "round_saeonly" "" "%r4")
 141 (define_subst_attr "round_saeonly_op5" "round_saeonly" "" "%r5")
 142 (define_subst_attr "round_saeonly_op6" "round_saeonly" "" "%r6")
 143 (define_subst_attr "round_saeonly_prefix" "round_saeonly" "vex" "evex")
 144 (define_subst_attr "round_saeonly_mask_op2" "round_saeonly" "" "<round_saeonly_mask_operand2>")
 145 (define_subst_attr "round_saeonly_mask_op3" "round_saeonly" "" "<round_saeonly_mask_operand3>")
 146 (define_subst_attr "round_saeonly_mask_scalar_merge_op4" "round_saeonly" "" "<round_saeonly_mask_scalar_merge_operand4>")
 147 (define_subst_attr "round_saeonly_sd_mask_op5" "round_saeonly" "" "<round_saeonly_sd_mask_operand5>")
 148 (define_subst_attr "round_saeonly_constraint" "round_saeonly" "vm" "v")
 149 (define_subst_attr "round_saeonly_constraint2" "round_saeonly" "m" "v")
 150 (define_subst_attr "round_saeonly_nimm_predicate" "round_saeonly" "nonimmediate_operand" "register_operand")
 151 (define_subst_attr "round_saeonly_mode512bit_condition" "round_saeonly" "1" "(<MODE>mode == V16SFmode || <MODE>mode == V8DFmode)")
 152
 153 (define_subst "round_saeonly"
 154   [(set (match_operand:SUBST_A 0)
 155         (match_operand:SUBST_A 1))]
 156   "TARGET_AVX512F"
 157   [(parallel[
 158      (set (match_dup 0)
 159           (match_dup 1))
 160      (unspec [(match_operand:SI 2 "const48_operand")] UNSPEC_EMBEDDED_ROUNDING)])])
 161
 162 (define_subst_attr "round_expand_name" "round_expand" "" "_round")
 163 (define_subst_attr "round_expand_nimm_predicate" "round_expand" "nonimmediate_operand" "register_operand")
 164 (define_subst_attr "round_expand_operand" "round_expand" "" ", operands[5]")
 165
 166 (define_subst "round_expand"
 167  [(match_operand:SUBST_V 0)
 168   (match_operand:SUBST_V 1)
 169   (match_operand:SUBST_V 2)
 170   (match_operand:SUBST_V 3)
 171   (match_operand:SUBST_S 4)]
 172   "TARGET_AVX512F"
 173   [(match_dup 0)
 174    (match_dup 1)
 175    (match_dup 2)
 176    (match_dup 3)
 177    (match_dup 4)
 178    (unspec [(match_operand:SI 5 "const_4_or_8_to_11_operand")] UNSPEC_EMBEDDED_ROUNDING)])
 179
 180 (define_subst_attr "round_saeonly_expand_name" "round_saeonly_expand" "" "_round")
 181 (define_subst_attr "round_saeonly_expand_nimm_predicate" "round_saeonly_expand" "nonimmediate_operand" "register_operand")
 182 (define_subst_attr "round_saeonly_expand_operand6" "round_saeonly_expand" "" ", operands[6]")
 183
 184 (define_subst "round_saeonly_expand"
 185  [(match_operand:SUBST_V 0)
 186   (match_operand:SUBST_V 1)
 187   (match_operand:SUBST_V 2)
 188   (match_operand:SUBST_A 3)
 189   (match_operand:SI 4)
 190   (match_operand:SUBST_S 5)]
 191   "TARGET_AVX512F"
 192   [(match_dup 0)
 193    (match_dup 1)
 194    (match_dup 2)
 195    (match_dup 3)
 196    (match_dup 4)
 197    (match_dup 5)
 198    (unspec [(match_operand:SI 6 "const48_operand")] UNSPEC_EMBEDDED_ROUNDING)])