gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c

   1 /* { dg-do compile } */
   2 /* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
   3
   4 #include "riscv_vector.h"
   5
   6 void foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out, size_t n, int cond) {
   7
   8   size_t vl;
   9   if (cond)
  10     vl = __riscv_vsetvlmax_e32m1();
  11   else
  12     vl = __riscv_vsetvlmax_e16mf2() << 5;
  13   for (size_t i = 0; i < n; i += 1) {
  14     vint32m1_t a = __riscv_vle32_v_i32m1(in1, vl);
  15     vint32m1_t b = __riscv_vle32_v_i32m1_tu(a, in2, vl);
  16     vint32m1_t c = __riscv_vle32_v_i32m1_tu(b, in3, vl);
  17     __riscv_vse32_v_i32m1(out, c, vl);
  18   }
  19 }
  20
  21 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-g" no-opts "-funroll-loops" } } } } */
  22 /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-g" no-opts "-funroll-loops" } } } } */
  23 /* { dg-final { scan-assembler-times {slli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*5} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-g" no-opts "-funroll-loops" } } } } */