gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-14.c

   1 /* { dg-do compile } */
   2 /* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
   3
   4 #include "riscv_vector.h"
   5
   6 void foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out, size_t n, int cond, int avl) {
   7
   8   size_t vl;
   9   if (cond){
  10     vl = __riscv_vsetvl_e32m1(avl);
  11     vint16mf2_t v = *(vint16mf2_t*)(in1 + 1000);
  12     *(vint16mf2_t*)(out + 1000) = v;
  13   }
  14   else
  15     vl = 55;
  16   for (size_t i = 0; i < n; i += 1) {
  17     vint32m1_t a = __riscv_vle32_v_i32m1(in1, vl);
  18     vint32m1_t b = __riscv_vle32_v_i32m1_tu(a, in2, vl);
  19     vint32m1_t c = __riscv_vle32_v_i32m1_tu(b, in3, vl);
  20     __riscv_vse32_v_i32m1(out, c, vl);
  21   }
  22 }
  23
  24 /* { dg-final { scan-assembler {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]} { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */