RISC-V: Force scalable vector on all vsetvl tests
[official-gcc.git] / gcc / testsuite / gcc.target / riscv / rvv / vsetvl / vlmax_switch_vtype-2.c
blobc6b39aafcceb407b0ec6b2df5d27ebf04d252fa6
1 /* { dg-do compile } */
2 /* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
4 #include "riscv_vector.h"
6 void f (void * restrict in, void * restrict out, int n)
8 vint8mf8_t v1 = *(vint8mf8_t*)(in + 1);
9 vint16mf4_t v2 = *(vint16mf4_t*)(in + 2);
10 vint32mf2_t v3 = *(vint32mf2_t*)(in + 3);
11 vfloat32mf2_t v4 = *(vfloat32mf2_t*)(in + 4);
13 *(vint8mf8_t*)(out + 1) = v1;
14 *(vint16mf4_t*)(out + 2) = v2;
15 *(vint32mf2_t*)(out + 3) = v3;
16 *(vfloat32mf2_t*)(out + 4) = v4;
18 for (int i = 0; i < n; i++)
20 vint16mf4_t v = *(vint16mf4_t*)(in + i + 5);
21 *(vint16mf4_t*)(out + i + 5) = v;
25 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
26 /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-funroll-loops" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */