gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c

   1 /* { dg-do compile } */
   2 /* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
   3
   4 #include "riscv_vector.h"
   5
   6 /* The for loop body should not have vsetvl instruction.  */
   7 void f (void * restrict in, void * restrict out, int n, int cond)
   8 {
   9   if (cond == 1)
  10     {
  11       vuint32mf2_t v = *(vuint32mf2_t*)(in + 100);
  12       *(vuint32mf2_t*)(out + 100) = v;
  13     }
  14   else if (cond == 2)
  15     {
  16       vuint32mf2_t v = *(vuint32mf2_t*)(in + 200);
  17       *(vuint32mf2_t*)(out + 200) = v;
  18     }
  19   else if (cond == 3)
  20     {
  21       vuint32mf2_t v = *(vuint32mf2_t*)(in + 300);
  22       *(vuint32mf2_t*)(out + 300) = v;
  23     }
  24   for (int i = 0; i < n; i++)
  25     {
  26       vuint32mf2_t v = *(vuint32mf2_t*)(in + i);
  27       *(vuint32mf2_t*)(out + i) = v;
  28     }
  29 }
  30
  31 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"   no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
  32