1 /* { dg-do compile } */
2 /* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
4 #include "riscv_vector.h"
6 void f (int32_t * restrict in
, int32_t * restrict out
, size_t n
, size_t cond
, size_t cond2
)
8 for (size_t i
= 0; i
< n
; i
++)
11 vbool1_t v
= *(vbool1_t
*)(in
+ i
+ 400);
12 *(vbool1_t
*)(out
+ i
+ 400) = v
;
13 } else if (i
== cond2
) {
14 vuint16mf2_t v
= *(vuint16mf2_t
*)(in
+ i
+ 200);
15 *(vuint16mf2_t
*)(out
+ i
+ 200) = v
;
17 vint8mf8_t v
= *(vint8mf8_t
*)(in
+ i
+ 100);
18 *(vint8mf8_t
*)(out
+ i
+ 100) = v
;
23 /* { dg-final { scan-assembler-times {vsetvli} 5 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
24 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
25 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
26 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */