RISC-V: Force scalable vector on all vsetvl tests
[official-gcc.git] / gcc / testsuite / gcc.target / riscv / rvv / vsetvl / vlmax_conflict-10.c
blobd72414f4cabc21ee631427337adf1d26f2a865c1
1 /* { dg-do compile } */
2 /* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
4 #include "riscv_vector.h"
6 void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, size_t cond, size_t cond2)
8 for (size_t i = 0; i < n; i++)
10 if (i != cond) {
11 vbool16_t v = *(vbool16_t*)(in + i + 400);
12 *(vbool16_t*)(out + i + 400) = v;
13 for (int j = 0; j < m; j++) {
14 vuint8mf2_t v = *(vuint8mf2_t*)(in + i + 100 + j);
15 *(vuint8mf2_t*)(out + i + 100 + j) = v;
17 } else if (i == cond2) {
18 vuint16mf2_t v = *(vuint16mf2_t*)(in + i + 200);
19 *(vuint16mf2_t*)(out + i + 200) = v;
20 } else {
21 vint8mf8_t v = *(vint8mf8_t*)(in + i + 100);
22 *(vint8mf8_t*)(out + i + 100) = v;
27 /* { dg-final { scan-assembler-times {vsetvli} 5 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */