RISC-V: Force scalable vector on all vsetvl tests
[official-gcc.git] / gcc / testsuite / gcc.target / riscv / rvv / vsetvl / vlmax_back_prop-5.c
blobb353b0635bb3be667d78216f59688c2dfad33a7b
1 /* { dg-do compile } */
2 /* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
4 #include "riscv_vector.h"
6 void f (int32_t * restrict in, int32_t * restrict out, int n, int cond)
8 for (int i = 0; i < n; i++) {
9 vint8mf8_t v = *(vint8mf8_t*)in;
10 *(vint8mf8_t*)(out + i + 200) = v;
12 for (int i = 0; i < n; i++) {
13 vint32mf2_t v = *(vint32mf2_t*)(in + 200);
14 *(vint32mf2_t*)(out + i + 400) = v;
16 for (int i = 0; i < n; i++) {
17 vint64m1_t v = *(vint64m1_t*)(in + 300);
18 *(vint64m1_t*)(out + i + 400) = v;
20 for (int i = 0; i < n; i++) {
21 vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400);
22 *(vfloat32mf2_t*)(out + i + 500) = v;
24 for (int i = 0; i < n; i++) {
25 vfloat64m1_t v = *(vfloat64m1_t*)(in + 500);
26 *(vfloat64m1_t*)(out + i + 600) = v;
29 switch (cond)
31 case 0:
32 for (int i = 0; i < n; i++) {
33 out[i] = out[i] + 2;
35 break;
37 default:
38 for (int i = 0; i < n; i++) {
39 out[i] = out[i] + 3;
41 break;
44 for (int i = 0; i < n; i++) {
45 vint16mf4_t v;
46 *(vint16mf4_t*)(out + i + 700) = v;