RISC-V: Force scalable vector on all vsetvl tests
[official-gcc.git] / gcc / testsuite / gcc.target / riscv / rvv / vsetvl / pr111037-2.c
blob71d2c9a66adbbb6f9f74876ccafa8ecc42c08fc7
1 /* { dg-do compile } */
2 /* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gc_zve64d_zvfh -mabi=ilp32d -O3" } */
4 #include "pr111037-1.c"
6 /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*1,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 } } */
7 /* { dg-final { scan-assembler-not {vsetvli} } } */
8 /* { dg-final { scan-assembler-times {vsetivli} 1 } } */