gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-98.c

   1 /* { dg-do compile } */
   2 /* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
   3
   4 #include "riscv_vector.h"
   5
   6 void f (int8_t * restrict in, int8_t * restrict out, int n, int m, unsigned cond, size_t vl, double scalar)
   7 {
   8   vfloat64m4_t v2 = *(vfloat64m4_t*)in;
   9   for (size_t i = 0; i < n; i++)
  10     {
  11       double f = __riscv_vfmv_f_s_f64m4_f64 (v2);
  12       asm volatile ("":::"memory");
  13       size_t new_vl = 101;
  14       vfloat64m4_t v3 = __riscv_vle64_v_f64m4 ((double *)(in + i + 500), new_vl);
  15       vfloat64m4_t v4 = __riscv_vle64_v_f64m4 ((double *)(in + i + 600), new_vl);
  16       v4 = __riscv_vfmacc_vf_f64m4 (v4, f, v3, new_vl);
  17
  18       __riscv_vse64_v_f64m4 ((double *)(out + i + 200), v4, new_vl);
  19     }
  20 }
  21
  22 /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*0,\s*e64,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */
  23 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */
  24 /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */
  25 /* { dg-final { scan-assembler-times {vsetivli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */