RISC-V: Force scalable vector on all vsetvl tests
[official-gcc.git] / gcc / testsuite / gcc.target / riscv / rvv / vsetvl / avl_single-21.c
blobd461781a1734db2d4377d47b318f6a5e74ea6fb7
1 /* { dg-do compile } */
2 /* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
4 #include "riscv_vector.h"
6 void f (int8_t * restrict in, int8_t * restrict out, int n, int m, int cond)
8 size_t vl = 101;
9 vbool64_t mask = *(vbool64_t*) (in + 1000000);
10 for (size_t j = 0; j < m; j++){
12 if (cond) {
13 for (size_t i = 0; i < n; i++)
15 vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + i + j, vl);
16 __riscv_vse8_v_i8mf8 (out + i, v, vl);
18 } else {
19 for (size_t i = 0; i < n; i++)
21 vfloat32mf2_t v = __riscv_vle32_v_f32mf2 ((float *)(in + i + j + 200), vl);
22 __riscv_vse32_v_f32mf2 ((float *)(out + i + j + 200), v, vl);
24 vfloat32mf2_t v2 = __riscv_vle32_v_f32mf2_tumu (mask, v, (float *)(in + i + j + 300), vl);
25 __riscv_vse32_v_f32mf2_m (mask, (float *)(out + i + j + 300), v2, vl);
31 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
32 /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */