gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c

   1 /* { dg-do compile } */
   2 /* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
   3
   4 #include "riscv_vector.h"
   5
   6 void f (void * restrict in, void * restrict out, int l, int n, int m, int cond)
   7 {
   8   size_t vl;
   9   switch (cond)
  10   {
  11   case 1:
  12     vl = 100;
  13     break;
  14   case 2:
  15     vl = *(size_t*)(in + 100);
  16     break;
  17   case 3:
  18     {
  19       size_t new_vl = *(size_t*)(in + 500);
  20       size_t new_vl2 = *(size_t*)(in + 600);
  21       vl = new_vl + new_vl2 + 777;
  22       break;
  23     }
  24   default:
  25     break;
  26   }
  27   for (int i = 0; i < l; i++){
  28     for (int j = 0; j < m; j++){
  29       for (int k = 0; k < n; k++)
  30         {
  31           vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + i + j, vl);
  32           __riscv_vse8_v_i8mf8 (out + i + j, v, vl);
  33         }
  34     }
  35     vl++;
  36   }
  37 }
  38
  39 /* { dg-final { scan-assembler {add\s+\s*[a-x0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+\s+ble\s+[a-x0-9]+,\s*zero,\.L[0-9]+\s+vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]} { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */