RISC-V: Force scalable vector on all vsetvl tests
[official-gcc.git] / gcc / testsuite / gcc.target / riscv / rvv / vsetvl / avl_multiple-4.c
blob1d1bf10b3bf361e5ee67e68e8fed7a7338ddf135
1 /* { dg-do compile } */
2 /* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
4 #include "riscv_vector.h"
6 void f (void * restrict in, void * restrict out, int l, int n, int m, int cond)
8 size_t vl;
9 switch (cond)
11 case 1:
12 vl = 100;
13 break;
14 case 2:
15 vl = *(size_t*)(in + 100);
16 break;
17 case 3:
19 size_t new_vl = *(size_t*)(in + 500);
20 size_t new_vl2 = *(size_t*)(in + 600);
21 vl = new_vl + new_vl2 + 777;
22 break;
24 default:
25 break;
27 for (int i = 0; i < l; i++){
28 for (int j = 0; j < m; j++){
29 for (int k = 0; k < n; k++)
31 vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + i + j, vl);
32 __riscv_vse8_v_i8mf8 (out + i + j, v, vl);
38 /* { dg-final { scan-assembler-times {\.L[0-9]+\:\s+vle8\.v\s+v[0-9]+,\s*0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */