RISC-V: Add an implicit dependency for Zawrs
[official-gcc.git] / gcc / testsuite / gcc.target / riscv / rvv / autovec / vls / mov-7.c
blob175bbb5f8c12757f9ed28148761251b8a64bc800
1 /* { dg-do compile } */
2 /* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -mrvv-max-lmul=m8 -O3 -fno-schedule-insns -fno-schedule-insns2" } */
3 /* { dg-final { check-function-bodies "**" "" } } */
5 #include "def.h"
7 /*
8 ** mov1:
9 ** vsetivli\s+zero,\s*2,\s*e64,\s*m1,\s*t[au],\s*m[au]
10 ** vle64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
11 ** vse64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
12 ** ret
14 void mov1 (int64_t *in, int64_t *out)
16 v2di v = *(v2di*)in;
17 *(v2di*)out = v;
21 ** mov2:
22 ** vsetivli\s+zero,\s*4,\s*e64,\s*m1,\s*t[au],\s*m[au]
23 ** vle64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
24 ** vse64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
25 ** ret
27 void mov2 (int64_t *in, int64_t *out)
29 v4di v = *(v4di*)in;
30 *(v4di*)out = v;
34 ** mov3:
35 ** vsetivli\s+zero,\s*8,\s*e64,\s*m1,\s*t[au],\s*m[au]
36 ** vle64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
37 ** vse64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
38 ** ret
40 void mov3 (int64_t *in, int64_t *out)
42 v8di v = *(v8di*)in;
43 *(v8di*)out = v;
47 ** mov4:
48 ** vsetivli\s+zero,\s*16,\s*e64,\s*m1,\s*t[au],\s*m[au]
49 ** vle64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
50 ** vse64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
51 ** ret
53 void mov4 (int64_t *in, int64_t *out)
55 v16di v = *(v16di*)in;
56 *(v16di*)out = v;
60 ** mov5:
61 ** li\s+[a-x0-9]+,32
62 ** vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]
63 ** vle64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
64 ** vse64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
65 ** ret
67 void mov5 (int64_t *in, int64_t *out)
69 v32di v = *(v32di*)in;
70 *(v32di*)out = v;
74 ** mov6:
75 ** li\s+[a-x0-9]+,64
76 ** vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]
77 ** vle64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
78 ** vse64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
79 ** ret
81 void mov6 (int64_t *in, int64_t *out)
83 v64di v = *(v64di*)in;
84 *(v64di*)out = v;
88 ** mov7:
89 ** li\s+[a-x0-9]+,128
90 ** vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]
91 ** vle64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
92 ** vse64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
93 ** ret
95 void mov7 (int64_t *in, int64_t *out)
97 v128di v = *(v128di*)in;
98 *(v128di*)out = v;
102 ** mov8:
103 ** li\s+[a-x0-9]+,256
104 ** vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]
105 ** vle64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
106 ** vse64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
107 ** ret
109 void mov8 (int64_t *in, int64_t *out)
111 v256di v = *(v256di*)in;
112 *(v256di*)out = v;
116 ** mov9:
117 ** li\s+[a-x0-9]+,512
118 ** vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]
119 ** vle64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
120 ** vse64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
121 ** ret
123 void mov9 (int64_t *in, int64_t *out)
125 v512di v = *(v512di*)in;
126 *(v512di*)out = v;