MIPS: Implement vcond_mask optabs for MSA
[official-gcc.git] / gcc / testsuite / gcc.target / powerpc / ssse3-psignd.c
blob97f959c7a9caa92bb4a26a566673cc34513ec7c0
1 /* { dg-do run } */
2 /* { dg-options "-O3 -mvsx -Wno-psabi" } */
3 /* { dg-additional-options "-mdejagnu-cpu=power8" { target { ! has_arch_pwr8 } } } */
4 /* { dg-require-effective-target p8vector_hw } */
6 #ifndef CHECK_H
7 #define CHECK_H "ssse3-check.h"
8 #endif
10 #ifndef TEST
11 #define TEST ssse3_test
12 #endif
14 #include CHECK_H
15 #include "ssse3-vals.h"
17 #include <tmmintrin.h>
19 #ifndef __AVX__
20 /* Test the 64-bit form */
21 static void
22 ssse3_test_psignd (__m64 *i1, __m64 *i2, __m64 *r)
24 *r = _mm_sign_pi32 (*i1, *i2);
25 _mm_empty ();
27 #endif
29 /* Test the 128-bit form */
30 static void
31 ssse3_test_psignd128 (__m128i *i1, __m128i *i2, __m128i *r)
33 /* Assumes incoming pointers are 16-byte aligned */
34 *r = _mm_sign_epi32 (*i1, *i2);
37 /* Routine to manually compute the results */
38 static void
39 compute_correct_result (int *i1, int *i2, int *r)
41 int i;
43 for (i = 0; i < 4; i++)
44 if (i2[i] < 0)
45 r[i] = -i1[i];
46 else if (i2[i] == 0)
47 r[i] = 0;
48 else
49 r[i] = i1[i];
52 static void
53 TEST (void)
55 int i;
56 union data r __attribute__ ((aligned(16)));
57 union data ck;
58 int fail = 0;
60 for (i = 0; i < ARRAY_SIZE (vals) - 1; i++)
62 /* Manually compute the result */
63 compute_correct_result (&vals[i + 0].w[0], &vals[i + 1].w[0], &ck.w[0]);
65 #ifndef __AVX__
66 /* Run the 64-bit tests */
67 ssse3_test_psignd (&vals[i + 0].ll[0], &vals[i + 1].ll[0], &r.ll[0]);
68 ssse3_test_psignd (&vals[i + 0].ll[1], &vals[i + 1].ll[1], &r.ll[1]);
69 fail += chk_128 (ck.m[0], r.m[0]);
70 #endif
72 /* Run the 128-bit tests */
73 ssse3_test_psignd128 (&vals[i + 0].m[0], &vals[i + 1].m[0], &r.m[0]);
74 fail += chk_128 (ck.m[0], r.m[0]);
77 if (fail != 0)
78 abort ();