gcc/testsuite/gcc.target/powerpc/sse3-movddup.c

   1 /* { dg-do run } */
   2 /* { dg-options "-O3 -mvsx -Wno-psabi" } */
   3 /* { dg-additional-options "-mdejagnu-cpu=power8" { target { ! has_arch_pwr8 } } } */
   4 /* { dg-require-effective-target p8vector_hw } */
   5
   6 #ifndef CHECK_H
   7 #define CHECK_H "sse3-check.h"
   8 #endif
   9 #include CHECK_H
  10
  11 #ifndef TEST
  12 #define TEST sse3_test_movddup_1
  13 #endif
  14
  15 #define NO_WARN_X86_INTRINSICS 1
  16 #include <pmmintrin.h>
  17
  18 static void
  19 sse3_test_movddup_mem (double *i1, double *r)
  20 {
  21   __m128d t1 = _mm_loaddup_pd (i1);
  22
  23   _mm_storeu_pd (r, t1);
  24 }
  25
  26 static double cnst1 [2] = {1.0, 1.0};
  27
  28 static void
  29 sse3_test_movddup_reg (double *i1, double *r)
  30 {
  31   __m128d t1 = _mm_loadu_pd (i1);
  32   __m128d t2 = _mm_loadu_pd (&cnst1[0]);
  33
  34   t1  = _mm_mul_pd (t1, t2);
  35   t2  = _mm_movedup_pd (t1);
  36
  37   _mm_storeu_pd (r, t2);
  38 }
  39
  40 static void
  41 sse3_test_movddup_reg_subsume_unaligned (double *i1, double *r)
  42 {
  43   __m128d t1 = _mm_loadu_pd (i1);
  44   __m128d t2 = _mm_movedup_pd (t1);
  45
  46   _mm_storeu_pd (r, t2);
  47 }
  48
  49 static void
  50 sse3_test_movddup_reg_subsume_ldsd (double *i1, double *r)
  51 {
  52   __m128d t1 = _mm_load_sd (i1);
  53   __m128d t2 = _mm_movedup_pd (t1);
  54
  55   _mm_storeu_pd (r, t2);
  56 }
  57
  58 static void
  59 sse3_test_movddup_reg_subsume (double *i1, double *r)
  60 {
  61   __m128d t1 = _mm_load_pd (i1);
  62   __m128d t2 = _mm_movedup_pd (t1);
  63
  64   _mm_storeu_pd (r, t2);
  65 }
  66
  67 static int
  68 chk_pd (double *v1, double *v2)
  69 {
  70   int i;
  71   int n_fails = 0;
  72
  73   for (i = 0; i < 2; i++)
  74     if (v1[i] != v2[i])
  75       n_fails += 1;
  76
  77   return n_fails;
  78 }
  79
  80 static double p1[2] __attribute__ ((aligned(16)));
  81 static double p2[2];
  82 static double ck[2];
  83
  84 static double vals[] =
  85   {
  86     100.0,  200.0, 300.0, 400.0, 5.0, -1.0, .345, -21.5,
  87     1100.0, 0.235, 321.3, 53.40, 0.3, 10.0, 42.0, 32.52,
  88     32.6,   123.3, 1.234, 2.156, 0.1, 3.25, 4.75, 32.44,
  89     12.16,  52.34, 64.12, 71.13, -.1, 2.30, 5.12, 3.785,
  90     541.3,  321.4, 231.4, 531.4, 71., 321., 231., -531.,
  91     23.45,  23.45, 23.45, 23.45, 23.45, 23.45, 23.45, 23.45,
  92     23.45,  -1.43, -6.74, 6.345, -20.1, -20.1, -40.1, -40.1,
  93     1.234,  2.345, 3.456, 4.567, 5.678, 6.789, 7.891, 8.912,
  94     -9.32,  -8.41, -7.50, -6.59, -5.68, -4.77, -3.86, -2.95,
  95     9.32,  8.41, 7.50, 6.59, -5.68, -4.77, -3.86, -2.95
  96   };
  97
  98 //static
  99 void
 100 TEST (void)
 101 {
 102   int i;
 103   int fail = 0;
 104
 105   for (i = 0; i < sizeof (vals) / sizeof (vals[0]); i += 1)
 106     {
 107       p1[0] = vals[i+0];
 108
 109       ck[0] = p1[0];
 110       ck[1] = p1[0];
 111
 112       sse3_test_movddup_mem (p1, p2);
 113
 114       fail += chk_pd (ck, p2);
 115
 116       sse3_test_movddup_reg (p1, p2);
 117
 118       fail += chk_pd (ck, p2);
 119
 120       sse3_test_movddup_reg_subsume (p1, p2);
 121
 122       fail += chk_pd (ck, p2);
 123
 124       sse3_test_movddup_reg_subsume_unaligned (p1, p2);
 125
 126       fail += chk_pd (ck, p2);
 127
 128       sse3_test_movddup_reg_subsume_ldsd (p1, p2);
 129
 130       fail += chk_pd (ck, p2);
 131     }
 132
 133   if (fail != 0)
 134     abort ();
 135 }