2 /* { dg-options "-O3 -mvsx -Wno-psabi" } */
3 /* { dg-additional-options "-mdejagnu-cpu=power8" { target { ! has_arch_pwr8 } } } */
4 /* { dg-require-effective-target p8vector_hw } */
7 #define CHECK_H "sse3-check.h"
12 #define TEST sse3_test_movddup_1
15 #define NO_WARN_X86_INTRINSICS 1
16 #include <pmmintrin.h>
19 sse3_test_movddup_mem (double *i1
, double *r
)
21 __m128d t1
= _mm_loaddup_pd (i1
);
23 _mm_storeu_pd (r
, t1
);
26 static double cnst1
[2] = {1.0, 1.0};
29 sse3_test_movddup_reg (double *i1
, double *r
)
31 __m128d t1
= _mm_loadu_pd (i1
);
32 __m128d t2
= _mm_loadu_pd (&cnst1
[0]);
34 t1
= _mm_mul_pd (t1
, t2
);
35 t2
= _mm_movedup_pd (t1
);
37 _mm_storeu_pd (r
, t2
);
41 sse3_test_movddup_reg_subsume_unaligned (double *i1
, double *r
)
43 __m128d t1
= _mm_loadu_pd (i1
);
44 __m128d t2
= _mm_movedup_pd (t1
);
46 _mm_storeu_pd (r
, t2
);
50 sse3_test_movddup_reg_subsume_ldsd (double *i1
, double *r
)
52 __m128d t1
= _mm_load_sd (i1
);
53 __m128d t2
= _mm_movedup_pd (t1
);
55 _mm_storeu_pd (r
, t2
);
59 sse3_test_movddup_reg_subsume (double *i1
, double *r
)
61 __m128d t1
= _mm_load_pd (i1
);
62 __m128d t2
= _mm_movedup_pd (t1
);
64 _mm_storeu_pd (r
, t2
);
68 chk_pd (double *v1
, double *v2
)
73 for (i
= 0; i
< 2; i
++)
80 static double p1
[2] __attribute__ ((aligned(16)));
84 static double vals
[] =
86 100.0, 200.0, 300.0, 400.0, 5.0, -1.0, .345, -21.5,
87 1100.0, 0.235, 321.3, 53.40, 0.3, 10.0, 42.0, 32.52,
88 32.6, 123.3, 1.234, 2.156, 0.1, 3.25, 4.75, 32.44,
89 12.16, 52.34, 64.12, 71.13, -.1, 2.30, 5.12, 3.785,
90 541.3, 321.4, 231.4, 531.4, 71., 321., 231., -531.,
91 23.45, 23.45, 23.45, 23.45, 23.45, 23.45, 23.45, 23.45,
92 23.45, -1.43, -6.74, 6.345, -20.1, -20.1, -40.1, -40.1,
93 1.234, 2.345, 3.456, 4.567, 5.678, 6.789, 7.891, 8.912,
94 -9.32, -8.41, -7.50, -6.59, -5.68, -4.77, -3.86, -2.95,
95 9.32, 8.41, 7.50, 6.59, -5.68, -4.77, -3.86, -2.95
105 for (i
= 0; i
< sizeof (vals
) / sizeof (vals
[0]); i
+= 1)
112 sse3_test_movddup_mem (p1
, p2
);
114 fail
+= chk_pd (ck
, p2
);
116 sse3_test_movddup_reg (p1
, p2
);
118 fail
+= chk_pd (ck
, p2
);
120 sse3_test_movddup_reg_subsume (p1
, p2
);
122 fail
+= chk_pd (ck
, p2
);
124 sse3_test_movddup_reg_subsume_unaligned (p1
, p2
);
126 fail
+= chk_pd (ck
, p2
);
128 sse3_test_movddup_reg_subsume_ldsd (p1
, p2
);
130 fail
+= chk_pd (ck
, p2
);