gcc/testsuite/gcc.target/powerpc/pr86731-longlong.c

   1 /* PR86731.  Verify that the rs6000 gimple-folding code handles the
   2    left shift properly.  */
   3
   4 /* { dg-do compile } */
   5 /* { dg-options "-maltivec -O3 -mvsx " } */
   6 /* { dg-additional-options "-mdejagnu-cpu=power8" { target { ! has_arch_pwr8 } } } */
   7 /* { dg-require-effective-target powerpc_vsx } */
   8 /* { dg-require-effective-target lp64 } */
   9
  10 #include <altivec.h>
  11
  12 vector unsigned long long splatu4(void)
  13 {
  14         vector unsigned long long mzero = {-1,-1};
  15         return (vector unsigned long long) vec_sl(mzero, mzero);
  16 }
  17 vector signed long long splats4(void)
  18 {
  19         vector unsigned long long mzero = {-1,-1};
  20         return (vector signed long long) vec_sl(mzero, mzero);
  21 }
  22
  23 /* Codegen will consist of splat and shift instructions for most types.
  24    Noted variations:  if gimple folding is disabled, or if -fwrapv is not
  25    specified, the long long tests will generate a vspltisw+vsld pair,
  26    versus generating a single lvx.  */
  27 /* { dg-final { scan-assembler-times {\mvspltis[bhw]\M|\mxxspltib\M} 2 } } */
  28 /* { dg-final { scan-assembler-times {\mvsl[bhwd]\M} 2 } } */
  29 /* { dg-final { scan-assembler-times {\mlvx\M} 0 } } */
  30