1 /* { dg-do compile { target { powerpc*-*-* } } } */
2 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
3 /* Now O2 enables vectorization by default, which generates unexpected VSR
4 to GPR movement for vector construction, so simply disable it. */
5 /* { dg-options "-mdejagnu-cpu=power8 -mvsx -O2 -fno-tree-vectorize" } */
6 /* { dg-require-effective-target powerpc_vsx } */
8 /* Make sure that STXSSPX is generated for float scalars in Altivec registers
9 on power7 instead of moving the value to a FPR register and doing a X-FORM
25 #define ITYPE __INT64_TYPE__
29 extern ITYPE
get_bits (ITYPE
);
32 #define get_bits(X) (X)
35 void test (ITYPE
*bits
, ITYPE n
, TYPE one
, TYPE_IN
*p
, TYPE_OUT
*q
)
94 for (i
= 0; i
< n
; i
++)
96 ITYPE bit
= get_bits (bits
[i
]);
98 if ((bit
& ((ITYPE
)1) << 0) != 0) x_00
+= one
;
99 if ((bit
& ((ITYPE
)1) << 1) != 0) x_01
+= one
;
100 if ((bit
& ((ITYPE
)1) << 2) != 0) x_02
+= one
;
101 if ((bit
& ((ITYPE
)1) << 3) != 0) x_03
+= one
;
102 if ((bit
& ((ITYPE
)1) << 4) != 0) x_04
+= one
;
103 if ((bit
& ((ITYPE
)1) << 5) != 0) x_05
+= one
;
104 if ((bit
& ((ITYPE
)1) << 6) != 0) x_06
+= one
;
105 if ((bit
& ((ITYPE
)1) << 7) != 0) x_07
+= one
;
106 if ((bit
& ((ITYPE
)1) << 8) != 0) x_08
+= one
;
107 if ((bit
& ((ITYPE
)1) << 9) != 0) x_09
+= one
;
109 if ((bit
& ((ITYPE
)1) << 10) != 0) x_10
+= one
;
110 if ((bit
& ((ITYPE
)1) << 11) != 0) x_11
+= one
;
111 if ((bit
& ((ITYPE
)1) << 12) != 0) x_12
+= one
;
112 if ((bit
& ((ITYPE
)1) << 13) != 0) x_13
+= one
;
113 if ((bit
& ((ITYPE
)1) << 14) != 0) x_14
+= one
;
114 if ((bit
& ((ITYPE
)1) << 15) != 0) x_15
+= one
;
115 if ((bit
& ((ITYPE
)1) << 16) != 0) x_16
+= one
;
116 if ((bit
& ((ITYPE
)1) << 17) != 0) x_17
+= one
;
117 if ((bit
& ((ITYPE
)1) << 18) != 0) x_18
+= one
;
118 if ((bit
& ((ITYPE
)1) << 19) != 0) x_19
+= one
;
120 if ((bit
& ((ITYPE
)1) << 20) != 0) x_20
+= one
;
121 if ((bit
& ((ITYPE
)1) << 21) != 0) x_21
+= one
;
122 if ((bit
& ((ITYPE
)1) << 22) != 0) x_22
+= one
;
123 if ((bit
& ((ITYPE
)1) << 23) != 0) x_23
+= one
;
124 if ((bit
& ((ITYPE
)1) << 24) != 0) x_24
+= one
;
125 if ((bit
& ((ITYPE
)1) << 25) != 0) x_25
+= one
;
126 if ((bit
& ((ITYPE
)1) << 26) != 0) x_26
+= one
;
127 if ((bit
& ((ITYPE
)1) << 27) != 0) x_27
+= one
;
128 if ((bit
& ((ITYPE
)1) << 28) != 0) x_28
+= one
;
129 if ((bit
& ((ITYPE
)1) << 29) != 0) x_29
+= one
;
131 if ((bit
& ((ITYPE
)1) << 30) != 0) x_30
+= one
;
132 if ((bit
& ((ITYPE
)1) << 31) != 0) x_31
+= one
;
133 if ((bit
& ((ITYPE
)1) << 32) != 0) x_32
+= one
;
134 if ((bit
& ((ITYPE
)1) << 33) != 0) x_33
+= one
;
135 if ((bit
& ((ITYPE
)1) << 34) != 0) x_34
+= one
;
136 if ((bit
& ((ITYPE
)1) << 35) != 0) x_35
+= one
;
137 if ((bit
& ((ITYPE
)1) << 36) != 0) x_36
+= one
;
138 if ((bit
& ((ITYPE
)1) << 37) != 0) x_37
+= one
;
139 if ((bit
& ((ITYPE
)1) << 38) != 0) x_38
+= one
;
140 if ((bit
& ((ITYPE
)1) << 39) != 0) x_39
+= one
;
142 if ((bit
& ((ITYPE
)1) << 40) != 0) x_40
+= one
;
143 if ((bit
& ((ITYPE
)1) << 41) != 0) x_41
+= one
;
144 if ((bit
& ((ITYPE
)1) << 42) != 0) x_42
+= one
;
145 if ((bit
& ((ITYPE
)1) << 43) != 0) x_43
+= one
;
146 if ((bit
& ((ITYPE
)1) << 44) != 0) x_44
+= one
;
147 if ((bit
& ((ITYPE
)1) << 45) != 0) x_45
+= one
;
148 if ((bit
& ((ITYPE
)1) << 46) != 0) x_46
+= one
;
149 if ((bit
& ((ITYPE
)1) << 47) != 0) x_47
+= one
;
150 if ((bit
& ((ITYPE
)1) << 48) != 0) x_48
+= one
;
151 if ((bit
& ((ITYPE
)1) << 49) != 0) x_49
+= one
;
210 /* { dg-final { scan-assembler {\mxsaddsp\M} } } */
211 /* { dg-final { scan-assembler {\mstxsspx\M} } } */
212 /* { dg-final { scan-assembler-not {\mmfvsrd\M} } } */
213 /* { dg-final { scan-assembler-not {\mmfvsrwz\M} } } */