[committed] Fix previously latent bug in reorg affecting cris port
[official-gcc.git] / gcc / testsuite / gcc.target / powerpc / pr104698-2.c
blob6966fce2ba93d2e43e144af470bba5bd499f2d5d
1 /* { dg-require-effective-target int128 } */
2 /* { dg-require-effective-target power10_ok } */
3 /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
5 /* PR target/104694 involved GCC generating vextsd2q to convent long long to
6 __int128_t when the long long value was in the GPR register. This test
7 verifies that if the result is in the Altivec registers, we still want to
8 generate vextsd2q. We use __int128_t to indicate that we want the result of
9 the conversion to be in an Altivec register. */
11 void do_div_1 (__int128_t *p, __int128_t *q, long long r)
13 *p = *q / r; /* mtvsrdd, vextsd2q, vdivsq. */
16 /* Test the optimization in vsx.md to use lxvrdx instead of ld and mtvsrdd if
17 the value is coming from memory. */
19 void do_div_2 (__int128_t *p, __int128_t *q, long long *r)
21 *p = *q / r[2]; /* lxvrdx, vextsd2q, vdivsq. */
24 /* { dg-final { scan-assembler-not {\mld\M} } } */
25 /* { dg-final { scan-assembler-not {\mmfvsrd\M} } } */
26 /* { dg-final { scan-assembler-not {\mmfvsrld\M} } } */
27 /* { dg-final { scan-assembler-not {\msradi\M} } } */
28 /* { dg-final { scan-assembler-times {\mlxv\M} 2 } } */
29 /* { dg-final { scan-assembler-times {\mlxvrdx\M} 1 } } */
30 /* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 } } */
31 /* { dg-final { scan-assembler-times {\mstxv\M} 2 } } */
32 /* { dg-final { scan-assembler-times {\mvdivsq\M} 2 } } */
33 /* { dg-final { scan-assembler-times {\mvextsd2q\M} 2 } } */