gcc/testsuite/gcc.target/powerpc/fold-vec-shift-longlong.c

   1 /* Verify that overloaded built-ins for vec_sl with long long
   2    inputs produce the right results.  */
   3
   4 /* { dg-do compile } */
   5 /* { dg-options "-mvsx -O2" } */
   6 /* { dg-additional-options "-mdejagnu-cpu=power8" { target { ! has_arch_pwr8 } } } */
   7 /* { dg-require-effective-target powerpc_vsx } */
   8
   9 #include <altivec.h>
  10
  11 vector signed long long
  12 testsl_signed (vector signed long long x, vector unsigned long long y)
  13 {
  14   return vec_sl (x, y);
  15 }
  16
  17 vector unsigned long long
  18 testsl_unsigned (vector unsigned long long x, vector unsigned long long y)
  19 {
  20   return vec_sl (x, y);
  21 }
  22
  23 vector signed long long
  24 testsr_signed (vector signed long long x, vector unsigned long long y)
  25 {
  26   return vec_sr (x, y);
  27 }
  28
  29 vector unsigned long long
  30 testsr_unsigned (vector unsigned long long x, vector unsigned long long y)
  31 {
  32   return vec_sr (x, y);
  33 }
  34
  35 vector signed long long
  36 testsra_signed (vector signed long long x, vector unsigned long long y)
  37 {
  38   return vec_sra (x, y);
  39 }
  40
  41 /* watch for PR 79544 here (vsrd / vsrad issue) */
  42 vector unsigned long long
  43 testsra_unsigned (vector unsigned long long x, vector unsigned long long y)
  44 {
  45   return vec_sra (x, y);
  46 }
  47
  48 vector signed long long
  49 testrl_signed (vector signed long long x, vector unsigned long long y)
  50 {
  51   return vec_rl (x, y);
  52 }
  53
  54 vector unsigned long long
  55 testrl_unsigned (vector unsigned long long x, vector unsigned long long y)
  56 {
  57   return vec_rl (x, y);
  58 }
  59
  60 /* { dg-final { scan-assembler-times "vsld" 2 } } */
  61 /* { dg-final { scan-assembler-times "vsrd" 2 } } */
  62 /* { dg-final { scan-assembler-times "vsrad" 2 } } */
  63 /* { dg-final { scan-assembler-times "vrld" 2 } } */
  64