c++: normalizing ttp constraints [PR115656]
[official-gcc.git] / gcc / testsuite / gcc.target / powerpc / fold-vec-insert-double.c
blobd24b4dad19cc18ea587ce82dc7794cda8783174f
1 /* Verify that overloaded built-ins for vec_insert with
2 double inputs produce the right codegen. */
4 /* { dg-do compile } */
5 /* { dg-options "-mvsx -O2" } */
6 /* { dg-require-effective-target powerpc_vsx } */
8 #include <altivec.h>
10 vector double
11 testd_var (double d, vector double vd, signed int si)
13 return vec_insert (d, vd, si);
16 vector double
17 testd_cst (double d, vector double vd)
19 return vec_insert (d, vd, 1);
21 /* The number of xxpermdi instructions varies between
22 P7,P8,P9, ensure at least one hit. */
23 /* { dg-final { scan-assembler {\mxxpermdi\M} } } */
25 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */
27 /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 1 { target { ! has_arch_pwr7 } } } } */
28 /* { dg-final { scan-assembler-times {\mstfdx\M|\mstfd\M} 1 { target { ! has_arch_pwr7 } } } } */
29 /* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 1 { target { ! has_arch_pwr7 } } } } */
31 /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 0 { target { has_arch_pwr7 && lp64 } } } } */
32 /* { dg-final { scan-assembler-times {\mstfdx\M|\mstfd\M} 0 { target { has_arch_pwr7 && lp64 } } } } */
34 /* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 0 { target { has_arch_pwr7 && lp64 } } } } */
35 /* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 0 { target { has_arch_pwr7 && ilp32 } } } } */
36 /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 0 { target { has_arch_pwr7 && ilp32 } } } } */
37 /* { dg-final { scan-assembler-times {\mstfdx\M|\mstfd\M} 0 { target { has_arch_pwr7 && ilp32 } } } } */