gcc/testsuite/gcc.target/powerpc/float128-odd.c

   1 /* { dg-do compile { target lp64 } } */
   2 /* { dg-options "-mvsx -O2" } */
   3 /* { dg-additional-options "-mdejagnu-cpu=power9" { target { ! has_arch_pwr9 } } } */
   4 /* { dg-require-effective-target powerpc_vsx } */
   5 /* { dg-require-effective-target float128 } */
   6
   7 /* Test the generation of the round to odd instructions.  */
   8 __float128
   9 f128_add(__float128 a, __float128 b)
  10 {
  11   return __builtin_addf128_round_to_odd (a, b);
  12 }
  13
  14 __float128
  15 f128_sub (__float128 a, __float128 b)
  16 {
  17   return __builtin_subf128_round_to_odd (a, b);
  18 }
  19
  20 __float128
  21 f128_mul (__float128 a, __float128 b)
  22 {
  23   return __builtin_mulf128_round_to_odd (a, b);
  24 }
  25
  26 __float128
  27 f128_div (__float128 a, __float128 b)
  28 {
  29   return __builtin_divf128_round_to_odd (a, b);
  30 }
  31
  32 __float128
  33 f128_sqrt (__float128 a)
  34 {
  35   return __builtin_sqrtf128_round_to_odd (a);
  36 }
  37
  38 double
  39 f128_trunc (__float128 a)
  40 {
  41   return __builtin_truncf128_round_to_odd (a);
  42 }
  43
  44 __float128
  45 f128_fma (__float128 a, __float128 b, __float128 c)
  46 {
  47   return __builtin_fmaf128_round_to_odd (a, b, c);
  48 }
  49
  50 __float128
  51 f128_fms (__float128 a, __float128 b, __float128 c)
  52 {
  53   return __builtin_fmaf128_round_to_odd (a, b, -c);
  54 }
  55
  56 __float128
  57 f128_nfma (__float128 a, __float128 b, __float128 c)
  58 {
  59   return - __builtin_fmaf128_round_to_odd (a, b, c);
  60 }
  61
  62 __float128
  63 f128_nfms (__float128 a, __float128 b, __float128 c)
  64 {
  65   return - __builtin_fmaf128_round_to_odd (a, b, -c);
  66 }
  67
  68 /* { dg-final { scan-assembler {\mxsaddqpo\M}   } } */
  69 /* { dg-final { scan-assembler {\mxssubqpo\M}   } } */
  70 /* { dg-final { scan-assembler {\mxsmulqpo\M}   } } */
  71 /* { dg-final { scan-assembler {\mxsdivqpo\M}   } } */
  72 /* { dg-final { scan-assembler {\mxssqrtqpo\M}  } } */
  73 /* { dg-final { scan-assembler {\mxscvqpdpo\M}  } } */
  74 /* { dg-final { scan-assembler {\mxsmaddqpo\M}  } } */
  75 /* { dg-final { scan-assembler {\mxsmsubqpo\M}  } } */
  76 /* { dg-final { scan-assembler {\mxsnmaddqpo\M} } } */
  77 /* { dg-final { scan-assembler {\mxsnmsubqpo\M} } } */