c++: normalizing ttp constraints [PR115656]
[official-gcc.git] / gcc / testsuite / gcc.target / powerpc / dform-3.c
blob621cfe69307c0918fff0895a954916f12a43db88
1 /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
2 /* { dg-options "-mdejagnu-cpu=power9 -mvsx -O2" } */
3 /* { dg-require-effective-target powerpc_vsx } */
5 #ifndef TYPE
6 #define TYPE vector double
7 #endif
9 struct foo {
10 TYPE a, b, c, d;
13 /* Test whether ISA 3.0 vector d-form instructions are implemented. */
14 void
15 add (struct foo *p)
17 p->b = p->c + p->d;
20 /* Make sure we don't use direct moves to get stuff into GPR registers. */
21 void
22 gpr (struct foo *p)
24 TYPE x = p->c;
26 __asm__ (" # reg = %0" : "+r" (x));
28 p->b = x;
31 /* { dg-final { scan-assembler "lxv " } } */
32 /* { dg-final { scan-assembler "stxv " } } */
33 /* { dg-final { scan-assembler-not "lxvx " } } */
34 /* { dg-final { scan-assembler-not "stxvx " } } */
35 /* { dg-final { scan-assembler-not "mfvsrd " } } */
36 /* { dg-final { scan-assembler-not "mfvsrld " } } */
37 /* { dg-final { scan-assembler "l\[dq\] " } } */
38 /* { dg-final { scan-assembler "st\[dq\] " } } */