gcc/testsuite/gcc.target/powerpc/builtins-5.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-mdejagnu-cpu=power8 -mvsx -O0 -dp" } */
   3 /* { dg-require-effective-target powerpc_vsx } */
   4
   5 #include <altivec.h>
   6
   7
   8 int main ()
   9 {
  10   vector long long la = {5L, 14L};
  11   vector long long lb = {3L, 86L};
  12   vector bool long long ld = {0, -1};
  13
  14   vector unsigned long long ua = {5L, 14L};
  15   vector unsigned long long ub = {3L, 86L};
  16   vector bool long long ud = {0, -1};
  17
  18   /*  vec_or tests generate an xxlor instruction when compiled with -O0.  The xxlor
  19       instructions get optimized away with higher optimization levels.
  20       When compiling on Linux we see the xxlor instruction used as a move in various
  21       places.  When compiling on AIX, a move instruction is used instead of the xxlor
  22       instruction.  So, these tests have been isolated into a different file to limit
  23       the xxlor instruction use to just the vex_or builtin tests.  */
  24
  25   vector long long ls = vec_or (la, lb);
  26   vector long long lt = vec_or (la, ld);
  27   vector long long lu = vec_or (ld, la);
  28
  29   vector unsigned long long us = vec_or (ua, ub);
  30   vector unsigned long long ut = vec_or (ua, ud);
  31   vector unsigned long long uu = vec_or (ud, ua);
  32
  33   return 0;
  34 }
  35
  36 /* Expected results:
  37    vec_or              xxlor    */
  38
  39 /* { dg-final { scan-assembler-times "xxlor" 6 } } */