gcc/testsuite/gcc.target/mips/oddspreg-4.c

   1 /* Check that we disable odd-numbered single precision registers and can
   2    still generate code.  */
   3 /* { dg-options "-mabi=32 -mno-odd-spreg -mhard-float" } */
   4
   5 #if _MIPS_SPFPSET != 16
   6 #error "Incorrect number of single-precision registers reported"
   7 #endif
   8
   9 float a;
  10 float
  11 foo ()
  12 {
  13   float b = a + 1.0f;
  14   return b;
  15 }