s390: Check for ADDR_REGS in s390_decompose_addrstyle_without_index
[official-gcc.git] / gcc / testsuite / gcc.target / arm / mve / dlstp-compile-asm-3.c
blobc784f54013177229008c75a94434e1c023f52da6
2 /* { dg-do compile } */
3 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
4 /* { dg-options "-O3 -save-temps" } */
5 /* { dg-add-options arm_v8_1m_mve } */
7 #include <arm_mve.h>
9 /* We don't support pattern recognition of signed N values when computing num_iter. */
10 void test3 (uint8_t *a, uint8_t *b, uint8_t *c, int n)
12 int num_iter = (n + 15)/16;
13 for (int i = 0; i < num_iter; i++)
15 mve_pred16_t p = vctp8q (n);
16 uint8x16_t va = vldrbq_z_u8 (a, p);
17 uint8x16_t vb = vldrbq_z_u8 (b, p);
18 uint8x16_t vc = vaddq_x_u8 (va, vb, p);
19 vstrbq_p_u8 (c, vc, p);
20 n-=16;
21 a += 16;
22 b += 16;
23 c += 16;
27 /* Using a predicated vcmp to generate a new predicate value in the
28 loop and then using it in a predicated store insn. */
29 void test17 (int32_t *a, int32_t *b, int32_t *c, int n)
31 while (n > 0)
33 mve_pred16_t p = vctp32q (n);
34 int32x4_t va = vldrwq_z_s32 (a, p);
35 int32x4_t vb = vldrwq_z_s32 (b, p);
36 int32x4_t vc = vaddq_s32 (va, vb);
37 mve_pred16_t p1 = vcmpeqq_m_s32 (va, vc, p);
38 vstrwq_p_s32 (c, vc, p1);
39 c += 4;
40 a += 4;
41 b += 4;
42 n -= 4;
45 /* This is an example of a loop that we could tail predicate but currently don't. */
46 /* { dg-final { scan-assembler "letp" { xfail *-*-* } } } */