1 /* { dg-do compile { target { arm_cortex_m && { arm_thumb2_ok || arm_thumb1_movt_ok } } } } */
2 /* { dg-skip-if "-mslow-flash-data and -mword-relocations incompatible" { *-*-* } { "-mword-relocations" } } */
3 /* { dg-options "-O2 -mslow-flash-data" } */
14 return 0xF0F0000000000000LLU
;
17 /* Accept r1 because big endian targets put the low bits in the highest
18 numbered register of a pair. */
19 /* { dg-final { scan-assembler-times "movt\tr\[01\], 61680" 2 } } */