gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-mcmse" } */
   3
   4 #include "../../bitfield-9.x"
   5
   6 /* { dg-final { scan-assembler "movw\tip, #1799" } } */
   7 /* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
   8 /* Shift on the same register as blxns.  */
   9 /* { dg-final { scan-assembler "lsrs\t(r\[1-9\]|r10|fp|ip), \\1, #1.*blxns\t\\1" } } */
  10 /* { dg-final { scan-assembler "lsls\t(r\[1-9\]|r10|fp|ip), \\1, #1.*blxns\t\\1" } } */
  11 /* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */
  12 /* Check the right registers are cleared and none appears twice.  */
  13 /* { dg-final { scan-assembler "clrm\t\{(r1, )?(r2, )?(r3, )?(r4, )?(r5, )?(r6, )?(r7, )?(r8, )?(r9, )?(r10, )?(fp, )?(ip, )?APSR\}" } } */
  14 /* Check that the right number of registers is cleared and thus only one
  15    register is missing.  */
  16 /* { dg-final { scan-assembler "clrm\t\{((r\[1-9\]|r10|fp|ip), ){11}APSR\}" } } */
  17 /* Check that no cleared register is used for blxns.  */
  18 /* { dg-final { scan-assembler-not "clrm\t\{\[^\}\]\+(r\[1-9\]|r10|fp|ip),\[^\}\]\+\}.*blxns\t\\1" } } */
  19 /* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */
  20 /* { dg-final { scan-assembler "blxns" } } */