gcc/testsuite/gcc.target/aarch64/sve/vec_perm_const_1_run.c

   1 /* { dg-do run { target aarch64_sve_hw } } */
   2 /* { dg-options "-O" } */
   3 /* { dg-options "-O -msve-vector-bits=256" { target aarch64_sve256_hw } } */
   4
   5 #include "vec_perm_const_1.c"
   6 #include "vec_perm_const_1_overrun.c"
   7
   8 #define TEST_VEC_PERM(TYPE, EXPECTED_RESULT, VALUES1, VALUES2)          \
   9 {                                                                       \
  10   TYPE expected_result = EXPECTED_RESULT;                               \
  11   TYPE values1 = VALUES1;                                               \
  12   TYPE values2 = VALUES2;                                               \
  13   TYPE dest;                                                            \
  14   dest = vec_perm_##TYPE (values1, values2);                            \
  15   if (__builtin_memcmp (&dest, &expected_result, sizeof (TYPE)) != 0)   \
  16     __builtin_abort ();                                                 \
  17   TYPE dest2;                                                           \
  18   dest2 = vec_perm_overrun_##TYPE (values1, values2);                   \
  19   if (__builtin_memcmp (&dest, &expected_result, sizeof (TYPE)) != 0)   \
  20     __builtin_abort ();                                                 \
  21 }
  22
  23 int main (void)
  24 {
  25   TEST_VEC_PERM (vnx2di,
  26                  ((vnx2di) { 12, 7, 36, 5 }),
  27                  ((vnx2di) { 4, 5, 6, 7 }),
  28                  ((vnx2di) { 12, 24, 36, 48 }));
  29   TEST_VEC_PERM (vnx4si,
  30                  ((vnx4si) { 6, 34, 36, 37, 5, 7, 7, 5 }),
  31                  ((vnx4si) { 3, 4, 5, 6, 7, 8, 9, 10 }),
  32                  ((vnx4si) { 33, 34, 35, 36, 37, 38, 39, 40 }));
  33   TEST_VEC_PERM (vnx8hi,
  34                  ((vnx8hi) { 11, 44, 8, 7, 38, 15, 16, 3,
  35                              39, 4, 11, 12, 6, 41, 18, 4 }),
  36                  ((vnx8hi) { 3, 4, 5, 6, 7, 8, 9, 10, 11,
  37                              12, 13, 14, 15, 16, 17, 18 }),
  38                  ((vnx8hi) { 33, 34, 35, 36, 37, 38, 39, 40,
  39                              41, 42, 43, 44, 45, 46, 47, 48 }));
  40   TEST_VEC_PERM (vnx16qi,
  41                  ((vnx16qi) { 5, 7, 7, 6, 12, 4, 7, 4,
  42                               36, 7, 6, 5, 4, 24, 6, 7,
  43                               4, 5, 7, 48, 4, 7, 36, 48,
  44                               6, 24, 6, 7, 6, 4, 6, 5 }),
  45                  ((vnx16qi) { 4, 5, 6, 7, 4, 5, 6, 7,
  46                               4, 5, 6, 7, 4, 5, 6, 7,
  47                               4, 5, 6, 7, 4, 5, 6, 7,
  48                               4, 5, 6, 7, 4, 5, 6, 7 }),
  49                  ((vnx16qi) { 12, 24, 36, 48, 12, 24, 36, 48,
  50                               12, 24, 36, 48, 12, 24, 36, 48,
  51                               12, 24, 36, 48, 12, 24, 36, 48,
  52                               12, 24, 36, 48, 12, 24, 36, 48 }));
  53   TEST_VEC_PERM (vnx2df,
  54                  ((vnx2df) { 48.5, 7.5, 6.5, 5.5 }),
  55                  ((vnx2df) { 4.5, 5.5, 6.5, 7.5 }),
  56                  ((vnx2df) { 12.5, 24.5, 36.5, 48.5 }));
  57   TEST_VEC_PERM (vnx4sf,
  58                  ((vnx4sf) { 4.5, 34.5, 38.5, 36.5, 5.5, 8.5, 7.5, 5.5 }),
  59                  ((vnx4sf) { 3.5, 4.5, 5.5, 6.5, 7.5, 8.5, 9.5, 10.5 }),
  60                  ((vnx4sf) { 33.5, 34.5, 35.5, 36.5,
  61                              37.5, 38.5, 39.5, 40.5 }));
  62   TEST_VEC_PERM (vnx8hf,
  63                  ((vnx8hf) { 11.0, 44.0, 8.0, 7.0, 38.0, 15.0, 16.0, 3.0,
  64                              39.0, 4.0, 11.0, 12.0, 6.0, 41.0, 18.0, 4.0 }),
  65                  ((vnx8hf) { 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0,
  66                              12.0, 13.0, 14.0, 15.0, 16.0, 17.0, 18.0 }),
  67                  ((vnx8hf) { 33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0,
  68                              41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0 }));
  69   return 0;
  70 }