1 /* Test the vqdmlalh_lane_s16 AArch64 SIMD intrinsic. */
3 /* { dg-do compile } */
4 /* { dg-options "-save-temps -O3 -fno-inline" } */
9 t_vqdmlalh_lane_s16 (int32_t a
, int16_t b
, int16x4_t c
)
11 return vqdmlalh_lane_s16 (a
, b
, c
, 0);
14 /* { dg-final { scan-assembler-times "sqdmlal\[ \t\]+\[sS\]\[0-9\]+, ?\[hH\]\[0-9\]+, ?\[hH\]\[0-9\]\n" 1 } } */