gcc/testsuite/gcc.target/aarch64/ldp_stp_15.c

   1 /* { dg-options "-O2 -fno-tree-loop-distribute-patterns" } */
   2 /* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
   3
   4 #include "ldp_stp_14.h"
   5
   6 /*
   7 ** const_2_int32_t_0:
   8 **      str     xzr, \[x0\]
   9 **      ret
  10 */
  11 CONST_FN (2, int32_t, 0);
  12
  13 /*
  14 ** const_4_int32_t_0:
  15 **      stp     xzr, xzr, \[x0\]
  16 **      ret
  17 */
  18 CONST_FN (4, int32_t, 0);
  19
  20 /* No preference between vectorizing or not vectorizing here.  */
  21 CONST_FN (8, int32_t, 0);
  22
  23 /*
  24 ** const_16_int32_t_0:
  25 **      movi    v([0-9]+)\.4s, .*
  26 **      stp     q\1, q\1, \[x0\]
  27 **      stp     q\1, q\1, \[x0, #?32\]
  28 **      ret
  29 */
  30 CONST_FN (16, int32_t, 0);
  31
  32 /* No preference between vectorizing or not vectorizing here.  */
  33 CONST_FN (2, int32_t, 1);
  34
  35 /*
  36 ** const_4_int32_t_1:
  37 **      movi    v([0-9]+)\.4s, .*
  38 **      str     q\1, \[x0\]
  39 **      ret
  40 */
  41 CONST_FN (4, int32_t, 1);
  42
  43 /*
  44 ** const_8_int32_t_1:
  45 **      movi    v([0-9]+)\.4s, .*
  46 **      stp     q\1, q\1, \[x0\]
  47 **      ret
  48 */
  49 CONST_FN (8, int32_t, 1);
  50
  51 /*
  52 ** dup_2_int32_t:
  53 **      stp     w1, w1, \[x0\]
  54 **      ret
  55 */
  56 DUP_FN (2, int32_t);
  57
  58 /*
  59 ** dup_4_int32_t:
  60 **      stp     w1, w1, \[x0\]
  61 **      stp     w1, w1, \[x0, #?8\]
  62 **      ret
  63 */
  64 DUP_FN (4, int32_t);
  65
  66 /*
  67 ** dup_8_int32_t:
  68 **      dup     v([0-9]+)\.4s, w1
  69 **      stp     q\1, q\1, \[x0\]
  70 **      ret
  71 */
  72 DUP_FN (8, int32_t);
  73
  74 /*
  75 ** cons2_1_int32_t:
  76 **      stp     w1, w2, \[x0\]
  77 **      ret
  78 */
  79 CONS2_FN (1, int32_t);
  80
  81 /*
  82 ** cons2_2_int32_t:
  83 **      stp     w1, w2, \[x0\]
  84 **      stp     w1, w2, \[x0, #?8\]
  85 **      ret
  86 */
  87 CONS2_FN (2, int32_t);
  88
  89 /*
  90 ** cons2_4_int32_t:
  91 **      stp     w1, w2, \[x0\]
  92 **      stp     w1, w2, \[x0, #?8\]
  93 **      stp     w1, w2, \[x0, #?16\]
  94 **      stp     w1, w2, \[x0, #?24\]
  95 **      ret
  96 */
  97 CONS2_FN (4, int32_t);
  98
  99 /* No preference between vectorizing or not vectorizing here.  */
 100 CONS2_FN (8, int32_t);
 101
 102 /*
 103 ** cons2_16_int32_t:
 104 **      ...
 105 **      stp     q[0-9]+, .*
 106 **      ret
 107 */
 108 CONS2_FN (16, int32_t);
 109
 110 /*
 111 ** cons4_1_int32_t:
 112 **      stp     w1, w2, \[x0\]
 113 **      stp     w3, w4, \[x0, #?8\]
 114 **      ret
 115 */
 116 CONS4_FN (1, int32_t);
 117
 118 /*
 119 ** cons4_2_int32_t:
 120 **      stp     w1, w2, \[x0\]
 121 **      stp     w3, w4, \[x0, #?8\]
 122 **      stp     w1, w2, \[x0, #?16\]
 123 **      stp     w3, w4, \[x0, #?24\]
 124 **      ret
 125 */
 126 CONS4_FN (2, int32_t);
 127
 128 /* No preference between vectorizing or not vectorizing here.  */
 129 CONS4_FN (4, int32_t);
 130
 131 /*
 132 ** cons4_8_int32_t:
 133 **      ...
 134 **      stp     q[0-9]+, .*
 135 **      ret
 136 */
 137 CONS4_FN (8, int32_t);