gcc/testsuite/gcc.target/aarch64/fmaxmin.c

   1 /* { dg-do run } */
   2 /* { dg-options "-O2 -ftree-vectorize -fno-inline -fno-vect-cost-model -save-temps" } */
   3
   4 #pragma GCC target "+nosve"
   5
   6 extern void abort (void);
   7 double fmax (double, double);
   8 float fmaxf (float, float);
   9 double fmin (double, double);
  10 float fminf (float, float);
  11
  12 #define isnan __builtin_isnan
  13 #define isinf __builtin_isinf
  14
  15 #define NAN __builtin_nan ("")
  16 #define INFINITY __builtin_inf ()
  17
  18 #define NUM_ELEMS(TYPE) (16 / sizeof (TYPE))
  19
  20 #define DEF_MAXMIN(TYPE,FUN)\
  21 void test_##FUN (TYPE *__restrict__ r, TYPE *__restrict__ a,\
  22                  TYPE *__restrict__ b)\
  23 {\
  24   int i;\
  25   for (i = 0; i < NUM_ELEMS (TYPE); i++)\
  26     r[i] = FUN (a[i], b[i]);\
  27 }\
  28
  29 DEF_MAXMIN (float, fmaxf)
  30 DEF_MAXMIN (double, fmax)
  31
  32 DEF_MAXMIN (float, fminf)
  33 DEF_MAXMIN (double, fmin)
  34
  35 int main ()
  36 {
  37   float a_f[4] = { 4, NAN, -3, INFINITY };
  38   float b_f[4] = { 1,   7,NAN, 0 };
  39   float r_f[4];
  40   double a_d[4] = { 4, NAN,  -3,  INFINITY };
  41   double b_d[4] = { 1,   7, NAN,  0 };
  42   double r_d[4];
  43
  44   test_fmaxf (r_f, a_f, b_f);
  45   if (r_f[0] != 4 || isnan (r_f[1]) || isnan (r_f[2]) || !isinf (r_f[3]))
  46     abort ();
  47
  48   test_fminf (r_f, a_f, b_f);
  49   if (r_f[0] != 1 || isnan (r_f[1]) || isnan (r_f[2]) || isinf (r_f[3]))
  50     abort ();
  51
  52   test_fmax (r_d, a_d, b_d);
  53   test_fmax (&r_d[2], &a_d[2], &b_d[2]);
  54   if (r_d[0] != 4 || isnan (r_d[1]) || isnan (r_d[2]) || !isinf (r_d[3]))
  55     abort ();
  56
  57   test_fmin (r_d, a_d, b_d);
  58   test_fmin (&r_d[2], &a_d[2], &b_d[2]);
  59   if (r_d[0] != 1 || isnan (r_d[1]) || isnan (r_d[2]) || isinf (r_d[3]))
  60     abort ();
  61
  62   return 0;
  63 }
  64
  65 /* { dg-final { scan-assembler-times "fmaxnm\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 1 } } */
  66 /* { dg-final { scan-assembler-times "fmaxnm\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" 1 } } */
  67
  68 /* { dg-final { scan-assembler-times "fminnm\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 1 } } */
  69 /* { dg-final { scan-assembler-times "fminnm\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" 1 } } */
  70