gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_n.c

   1 #include <arm_neon.h>
   2 #include "arm-neon-ref.h"
   3 #include "compute-ref-data.h"
   4
   5 /* Expected results.  */
   6 VECT_VAR_DECL(expected,int,8,8) [] = { 0xf8, 0xf8, 0xf9, 0xf9,
   7                                        0xfa, 0xfa, 0xfb, 0xfb };
   8 VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff8, 0xfff8, 0xfff9, 0xfff9 };
   9 VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffffc, 0xfffffffc };
  10 VECT_VAR_DECL(expected,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
  11                                         0xff, 0xff, 0xff, 0xff };
  12 VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
  13 VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0xffffffff };
  14
  15 /* Expected results with max input value shifted by 3.  */
  16 VECT_VAR_DECL(expected_max_sh3,int,8,8) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
  17                                                0x7f, 0x7f, 0x7f, 0x7f };
  18 VECT_VAR_DECL(expected_max_sh3,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
  19 VECT_VAR_DECL(expected_max_sh3,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
  20 VECT_VAR_DECL(expected_max_sh3,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
  21                                                 0xff, 0xff, 0xff, 0xff };
  22 VECT_VAR_DECL(expected_max_sh3,uint,16,4) [] = { 0xffff, 0xffff,
  23                                                  0xffff, 0xffff };
  24 VECT_VAR_DECL(expected_max_sh3,uint,32,2) [] = { 0xffffffff, 0xffffffff };
  25
  26 /* Expected results with max input value shifted by type size.  */
  27 VECT_VAR_DECL(expected_max_shmax,int,8,8) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
  28                                                  0x7f, 0x7f, 0x7f, 0x7f };
  29 VECT_VAR_DECL(expected_max_shmax,int,16,4) [] = { 0x7fff, 0x7fff,
  30                                                   0x7fff, 0x7fff };
  31 VECT_VAR_DECL(expected_max_shmax,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
  32 VECT_VAR_DECL(expected_max_shmax,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
  33                                                   0xff, 0xff, 0xff, 0xff };
  34 VECT_VAR_DECL(expected_max_shmax,uint,16,4) [] = { 0xffff, 0xffff,
  35                                                    0xffff, 0xffff };
  36 VECT_VAR_DECL(expected_max_shmax,uint,32,2) [] = { 0xffffffff, 0xffffffff };
  37
  38 #define INSN vqshrn_n
  39 #define TEST_MSG "VQSHRN_N"
  40
  41 #define FNNAME1(NAME) void exec_ ## NAME (void)
  42 #define FNNAME(NAME) FNNAME1(NAME)
  43
  44 FNNAME (INSN)
  45 {
  46   /* Basic test: y=vqshrn_n(x,v), then store the result.  */
  47 #define TEST_VQSHRN_N2(INSN, T1, T2, W, W2, N, V, CMT) \
  48   Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W2, N));          \
  49   VECT_VAR(vector_res, T1, W2, N) =                                     \
  50     INSN##_##T2##W(VECT_VAR(vector, T1, W, N),                          \
  51                    V);                                                  \
  52   vst1_##T2##W2(VECT_VAR(result, T1, W2, N),                            \
  53                 VECT_VAR(vector_res, T1, W2, N))
  54
  55   /* Two auxliary macros are necessary to expand INSN */
  56 #define TEST_VQSHRN_N1(INSN, T1, T2, W, W2, N, V, CMT) \
  57   TEST_VQSHRN_N2(INSN, T1, T2, W, W2, N, V, CMT)
  58
  59 #define TEST_VQSHRN_N(T1, T2, W, W2, N, V, CMT) \
  60   TEST_VQSHRN_N1(INSN, T1, T2, W, W2, N, V, CMT)
  61
  62
  63   /* vector is twice as large as vector_res.  */
  64   DECL_VARIABLE(vector, int, 16, 8);
  65   DECL_VARIABLE(vector, int, 32, 4);
  66   DECL_VARIABLE(vector, int, 64, 2);
  67   DECL_VARIABLE(vector, uint, 16, 8);
  68   DECL_VARIABLE(vector, uint, 32, 4);
  69   DECL_VARIABLE(vector, uint, 64, 2);
  70
  71   DECL_VARIABLE(vector_res, int, 8, 8);
  72   DECL_VARIABLE(vector_res, int, 16, 4);
  73   DECL_VARIABLE(vector_res, int, 32, 2);
  74   DECL_VARIABLE(vector_res, uint, 8, 8);
  75   DECL_VARIABLE(vector_res, uint, 16, 4);
  76   DECL_VARIABLE(vector_res, uint, 32, 2);
  77
  78   clean_results ();
  79
  80   VLOAD(vector, buffer, q, int, s, 16, 8);
  81   VLOAD(vector, buffer, q, int, s, 32, 4);
  82   VLOAD(vector, buffer, q, int, s, 64, 2);
  83   VLOAD(vector, buffer, q, uint, u, 16, 8);
  84   VLOAD(vector, buffer, q, uint, u, 32, 4);
  85   VLOAD(vector, buffer, q, uint, u, 64, 2);
  86
  87   /* Choose shift amount arbitrarily.  */
  88 #define CMT ""
  89   TEST_VQSHRN_N(int, s, 16, 8, 8, 1, CMT);
  90   TEST_VQSHRN_N(int, s, 32, 16, 4, 1, CMT);
  91   TEST_VQSHRN_N(int, s, 64, 32, 2, 2, CMT);
  92   TEST_VQSHRN_N(uint, u, 16, 8, 8, 2, CMT);
  93   TEST_VQSHRN_N(uint, u, 32, 16, 4, 3, CMT);
  94   TEST_VQSHRN_N(uint, u, 64, 32, 2, 3, CMT);
  95
  96   CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
  97   CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
  98   CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
  99   CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
 100   CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
 101   CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
 102
 103
 104   /* Use max possible value as input.  */
 105   VDUP(vector, q, int, s, 16, 8, 0x7FFF);
 106   VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
 107   VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
 108   VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
 109   VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
 110   VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
 111
 112 #undef CMT
 113 #define CMT " (check saturation: shift by 3)"
 114   TEST_VQSHRN_N(int, s, 16, 8, 8, 3, CMT);
 115   TEST_VQSHRN_N(int, s, 32, 16, 4, 3, CMT);
 116   TEST_VQSHRN_N(int, s, 64, 32, 2, 3, CMT);
 117   TEST_VQSHRN_N(uint, u, 16, 8, 8, 3, CMT);
 118   TEST_VQSHRN_N(uint, u, 32, 16, 4, 3, CMT);
 119   TEST_VQSHRN_N(uint, u, 64, 32, 2, 3, CMT);
 120
 121   CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh3, CMT);
 122   CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh3, CMT);
 123   CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh3, CMT);
 124   CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh3, CMT);
 125   CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh3, CMT);
 126   CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh3, CMT);
 127
 128
 129 #undef CMT
 130 #define CMT " (check saturation: shift by max)"
 131   TEST_VQSHRN_N(int, s, 16, 8, 8, 8, CMT);
 132   TEST_VQSHRN_N(int, s, 32, 16, 4, 16, CMT);
 133   TEST_VQSHRN_N(int, s, 64, 32, 2, 32, CMT);
 134   TEST_VQSHRN_N(uint, u, 16, 8, 8, 8, CMT);
 135   TEST_VQSHRN_N(uint, u, 32, 16, 4, 16, CMT);
 136   TEST_VQSHRN_N(uint, u, 64, 32, 2, 32, CMT);
 137
 138   CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_shmax, CMT);
 139   CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_shmax, CMT);
 140   CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_shmax, CMT);
 141   CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_shmax, CMT);
 142   CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_shmax, CMT);
 143   CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_shmax, CMT);
 144 }
 145
 146 int main (void)
 147 {
 148   exec_vqshrn_n ();
 149   return 0;
 150 }