gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvt_fXX_fXX.c

   1 /* { dg-skip-if "" { arm*-*-* } } */
   2
   3 #include <arm_neon.h>
   4 #include "arm-neon-ref.h"
   5 #include "compute-ref-data.h"
   6 #include <math.h>
   7
   8 /* Expected results for vcvt_f64_f32.  */
   9 VECT_VAR_DECL (expected, hfloat, 64, 2) [] = { 0x4030000000000000,
  10                                                0x402e000000000000};
  11 /* Expected results for vcvt_f32_f64.  */
  12 VECT_VAR_DECL (expected, hfloat, 32, 2) [] = { 0x3fc00000, 0x40200000 };
  13
  14 /* Expected results for vcvt_high_f64_f32.  */
  15 VECT_VAR_DECL (expected_high, hfloat, 64, 2) [] = { 0xc02c000000000000,
  16                                                     0xc02a000000000000 };
  17 /* Expected results for vcvt_high_f32_f64.  */
  18 VECT_VAR_DECL (expected_high, hfloat, 32, 4) [] = { 0x40000000, 0x40000000,
  19                                                     0x3fc00000, 0x40200000 };
  20
  21 void
  22 exec_vcvt (void)
  23 {
  24   clean_results ();
  25
  26 #define TEST_MSG "vcvt_f64_f32"
  27   {
  28     VECT_VAR_DECL (buffer_src, float, 32, 2) [] = { 16.0, 15.0 };
  29
  30     DECL_VARIABLE (vector_src, float, 32, 2);
  31
  32     VLOAD (vector_src, buffer_src, , float, f, 32, 2);
  33     DECL_VARIABLE (vector_res, float, 64, 2) =
  34         vcvt_f64_f32 (VECT_VAR (vector_src, float, 32, 2));
  35     vst1q_f64 (VECT_VAR (result, float, 64, 2),
  36                VECT_VAR (vector_res, float, 64, 2));
  37
  38     CHECK_FP (TEST_MSG, float, 64, 2, PRIx64, expected, "");
  39   }
  40 #undef TEST_MSG
  41
  42   clean_results ();
  43
  44 #define TEST_MSG "vcvt_f32_f64"
  45   {
  46     VECT_VAR_DECL (buffer_src, float, 64, 2) [] = { 1.500000025, 2.500000025 };
  47     DECL_VARIABLE (vector_src, float, 64, 2);
  48
  49     VLOAD (vector_src, buffer_src, q, float, f, 64, 2);
  50     DECL_VARIABLE (vector_res, float, 32, 2) =
  51       vcvt_f32_f64 (VECT_VAR (vector_src, float, 64, 2));
  52     vst1_f32 (VECT_VAR (result, float, 32, 2),
  53               VECT_VAR (vector_res, float, 32, 2));
  54
  55     CHECK_FP (TEST_MSG, float, 32, 2, PRIx32, expected, "");
  56   }
  57 #undef TEST_MSG
  58
  59   clean_results ();
  60
  61 #define TEST_MSG "vcvt_high_f64_f32"
  62   {
  63     DECL_VARIABLE (vector_src, float, 32, 4);
  64     VLOAD (vector_src, buffer, q, float, f, 32, 4);
  65     DECL_VARIABLE (vector_res, float, 64, 2);
  66     VECT_VAR (vector_res, float, 64, 2) =
  67       vcvt_high_f64_f32 (VECT_VAR (vector_src, float, 32, 4));
  68     vst1q_f64 (VECT_VAR (result, float, 64, 2),
  69                VECT_VAR (vector_res, float, 64, 2));
  70     CHECK_FP (TEST_MSG, float, 64, 2, PRIx64, expected_high, "");
  71   }
  72 #undef TEST_MSG
  73
  74   clean_results ();
  75
  76 #define TEST_MSG "vcvt_high_f32_f64"
  77   {
  78     VECT_VAR_DECL (buffer_src, float, 64, 2) [] = { 1.500000025, 2.500000025 };
  79     DECL_VARIABLE (vector_low, float, 32, 2);
  80     VDUP (vector_low, , float, f, 32, 2, 2.0);
  81
  82     DECL_VARIABLE (vector_src, float, 64, 2);
  83     VLOAD (vector_src, buffer_src, q, float, f, 64, 2);
  84
  85     DECL_VARIABLE (vector_res, float, 32, 4) =
  86       vcvt_high_f32_f64 (VECT_VAR (vector_low, float, 32, 2),
  87                          VECT_VAR (vector_src, float, 64, 2));
  88     vst1q_f32 (VECT_VAR (result, float, 32, 4),
  89                VECT_VAR (vector_res, float, 32, 4));
  90
  91     CHECK_FP (TEST_MSG, float, 32, 4, PRIx32, expected_high, "");
  92   }
  93 }
  94
  95 int
  96 main (void)
  97 {
  98   exec_vcvt ();
  99   return 0;
 100 }