i386: Adjust rtx cost for imulq and imulw [PR115749]
[official-gcc.git] / gcc / testsuite / gcc.dg / vect / vect-over-widen-17.c
blob53fcfd0c06c14e5d9ddc06cdb3c36e2add364d3b
1 /* { dg-require-effective-target vect_int } */
2 /* { dg-require-effective-target vect_shift } */
3 /* { dg-require-effective-target vect_pack_trunc } */
4 /* { dg-require-effective-target vect_unpack } */
6 #include "tree-vect.h"
8 #define N 1024
10 /* This should not be treated as an over-widening pattern, even though
11 "(b[i] & 0xef) | 0x80)" could be done in unsigned chars. */
13 void __attribute__ ((noipa))
14 f (unsigned short *restrict a, unsigned short *restrict b)
16 for (__INTPTR_TYPE__ i = 0; i < N; ++i)
18 unsigned short foo = ((b[i] & 0xef) | 0x80) + (a[i] << 4);
19 a[i] = foo;
23 int
24 main (void)
26 check_vect ();
28 unsigned short a[N], b[N];
29 for (int i = 0; i < N; ++i)
31 a[i] = i;
32 b[i] = i * 3;
33 asm volatile ("" ::: "memory");
35 f (a, b);
36 #pragma GCC novector
37 for (int i = 0; i < N; ++i)
38 if (a[i] != ((((i * 3) & 0xef) | 0x80) + (i << 4)))
39 __builtin_abort ();
41 return 0;
44 /* { dg-final { scan-tree-dump-not {vect_recog_over_widening_pattern: detected} "vect" } } */
45 /* On Power, if there is no vect_hw_misalign support, unaligned vector access
46 adopts realign_load scheme. It requires rs6000_builtin_mask_for_load to
47 generate mask whose return type is vector char. */
48 /* { dg-final { scan-tree-dump-not {vector[^\n]*char} "vect" { target vect_hw_misalign } } } */
49 /* { dg-final { scan-tree-dump-not {vector[^ ]* int} "vect" } } */
50 /* { dg-final { scan-tree-dump-times "vectorized 1 loop" 1 "vect" } } */