RISC-V: Implement SAT_ADD for signed integer vector
[official-gcc.git] / gcc / testsuite / gcc.dg / tree-prof / val-prof-2.c
blob3c4bc8d0b51b59cfe09d38522cf4349f8c6d28f2
1 /* { dg-options "-O2 -fdump-tree-optimized-details-blocks -fdump-ipa-profile-optimized" } */
2 unsigned int a[1000];
3 unsigned int b = 256;
4 unsigned int c = 1024;
5 unsigned int d = 17;
6 int
7 main ()
9 int i;
10 unsigned int n;
11 for (i = 0; i < 1000; i++)
13 a[i]=100*i;
15 for (i = 0; i < 1000; i++)
17 if (i % 2)
18 n = b;
19 else if (i % 3)
20 n = c;
21 else
22 n = d;
23 a[i] %= n;
25 return 0;
27 /* autofdo does not do value profiling so far */
28 /* { dg-final-use-not-autofdo { scan-ipa-dump "Transformation done: div/mod by constant 256" "profile" } } */
29 /* { dg-final-use { scan-tree-dump-not "Invalid sum" "optimized"} } */