AVR: target/84211 - Add a post reload register optimization pass.
[official-gcc.git] / gcc / testsuite / gcc.dg / torture / ssa-fre-1.c
blob15971223e01be44da2b1493b91432f5675c1fda0
1 /* { dg-do compile } */
2 /* { dg-skip-if "" { *-*-* } { "-O0" } { "" } } */
3 /* { dg-additional-options "-fstrict-aliasing -fdump-tree-fre1" } */
5 float f;
6 int foo(int *p, int *q)
8 *p = 0;
9 if (*p)
10 *q = 1;
11 else
12 f = 8.0f;
13 return *p;
16 /* { dg-final { scan-tree-dump "return 0;" "fre1" } } */