2 /* { dg-options "-fno-allow-store-data-races" } */
3 /* { dg-final { simulate-thread } } */
5 /* Test that setting <var.a> does not touch either <var.b> or <var.c>.
6 In the C++ memory model, non contiguous bitfields ("a" and "c"
7 here) should be considered as distinct memory locations, so we
8 can't use bit twiddling to set either one. */
11 #include "simulate-thread.h"
23 __attribute__((noinline))
29 void simulate_thread_other_threads()
36 int simulate_thread_step_verify()
41 printf ("FAIL: Unexpected value: var.b is %d, should be %d\n",
47 printf ("FAIL: Unexpected value: var.c is %d, should be %d\n",
54 int simulate_thread_final_verify()
56 int ret = simulate_thread_step_verify();
59 printf ("FAIL: Unexpected value: var.a is %d, should be %d\n",
66 __attribute__((noinline))
67 void simulate_thread_main()
74 simulate_thread_main();
75 simulate_thread_done();