1 // Implementation of instruction-related RTL SSA functions -*- C++ -*-
2 // Copyright (C) 2020-2024 Free Software Foundation, Inc.
4 // This file is part of GCC.
6 // GCC is free software; you can redistribute it and/or modify it under
7 // the terms of the GNU General Public License as published by the Free
8 // Software Foundation; either version 3, or (at your option) any later
11 // GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 // You should have received a copy of the GNU General Public License
17 // along with GCC; see the file COPYING3. If not see
18 // <http://www.gnu.org/licenses/>.
20 #define INCLUDE_ALGORITHM
21 #define INCLUDE_FUNCTIONAL
25 #include "coretypes.h"
30 #include "rtl-ssa/internals.h"
31 #include "rtl-ssa/internals.inl"
33 #include "print-rtl.h"
36 using namespace rtl_ssa
;
38 // The gap to leave between program points when building up the list
39 // of instructions for the first time. Using 2 allows an instruction
40 // to be inserted between two others without resorting to splay tree
41 // ordering. Using 0 is useful as a debugging aid to stress the
43 static const unsigned int POINT_INCREASE
= 2;
45 // Calculate and record the cost of the instruction, based on the
46 // form it had before any in-progress changes were made.
48 insn_info::calculate_cost () const
50 basic_block cfg_bb
= BLOCK_FOR_INSN (m_rtl
);
51 temporarily_undo_changes (0);
52 if (INSN_CODE (m_rtl
) == NOOP_MOVE_INSN_CODE
)
53 // insn_cost also uses 0 to mean "don't know". Callers that
54 // want to distinguish the cases will need to check INSN_CODE.
57 m_cost_or_uid
= insn_cost (m_rtl
, optimize_bb_for_speed_p (cfg_bb
));
61 // Add NOTE to the instruction's notes.
63 insn_info::add_note (insn_note
*note
)
65 insn_note
**ptr
= &m_first_note
;
66 // Always put the order node first, since it's the one that's likely
67 // to be used most often.
68 if (*ptr
&& (*ptr
)->kind () == insn_note_kind::ORDER_NODE
)
69 ptr
= &(*ptr
)->m_next_note
;
70 note
->m_next_note
= *ptr
;
74 // Remove NOTE from the instruction's notes.
76 insn_info::remove_note (insn_note
*note
)
78 insn_note
**ptr
= &m_first_note
;
80 ptr
= &(*ptr
)->m_next_note
;
81 *ptr
= note
->m_next_note
;
84 // Implement compare_with for the case in which this insn and OTHER
85 // have the same program point.
87 insn_info::slow_compare_with (const insn_info
&other
) const
89 return order_splay_tree::compare_nodes (get_known_order_node (),
90 other
.get_known_order_node ());
93 // Print insn uid UID to PP, where UID has the same form as insn_info::uid.
95 insn_info::print_uid (pretty_printer
*pp
, int uid
)
97 char tmp
[3 * sizeof (uid
) + 2];
99 // An artificial instruction.
100 snprintf (tmp
, sizeof (tmp
), "a%d", -uid
);
102 // A real RTL instruction.
103 snprintf (tmp
, sizeof (tmp
), "i%d", uid
);
107 // See comment above declaration.
109 insn_info::print_identifier (pretty_printer
*pp
) const
111 print_uid (pp
, uid ());
114 // See comment above declaration.
116 insn_info::print_location (pretty_printer
*pp
) const
118 if (bb_info
*bb
= this->bb ())
120 ebb_info
*ebb
= bb
->ebb ();
121 if (ebb
&& is_phi ())
122 ebb
->print_identifier (pp
);
124 bb
->print_identifier (pp
);
125 pp_string (pp
, " at point ");
126 pp_decimal_int (pp
, m_point
);
129 pp_string (pp
, "<unknown location>");
132 // See comment above declaration.
134 insn_info::print_identifier_and_location (pretty_printer
*pp
) const
137 pp_string (pp
, "asm ");
139 pp_string (pp
, "debug ");
140 pp_string (pp
, "insn ");
141 print_identifier (pp
);
142 pp_string (pp
, " in ");
146 // See comment above declaration.
148 insn_info::print_full (pretty_printer
*pp
) const
150 print_identifier_and_location (pp
);
154 pp_newline_and_indent (pp
, 2);
155 if (has_been_deleted ())
156 pp_string (pp
, "deleted");
159 // Print the insn pattern to a temporary printer.
160 pretty_printer sub_pp
;
161 print_insn_with_notes (&sub_pp
, rtl ());
162 const char *text
= pp_formatted_text (&sub_pp
);
164 // Calculate the length of the maximum line in the pattern.
165 unsigned int max_len
= 0;
166 const char *start
= text
;
167 while (const char *end
= strchr (start
, '\n'))
169 max_len
= MAX (max_len
, (unsigned int) (end
- start
));
173 // Print a separator before or after the pattern.
174 auto print_top_bottom
= [&]()
176 pp_character (pp
, '+');
177 for (unsigned int i
= 0; i
< max_len
+ 2; ++i
)
178 pp_character (pp
, '-');
183 while (const char *end
= strchr (start
, '\n'))
185 pp_newline_and_indent (pp
, 0);
186 pp_character (pp
, '|');
187 // Each line of the pattern already starts with a space.
188 // so we don't need to add another one here.
189 pp_append_text (pp
, start
, end
);
192 pp_newline_and_indent (pp
, 0);
195 if (m_cost_or_uid
!= UNKNOWN_COST
)
197 pp_newline_and_indent (pp
, 0);
198 pp_string (pp
, "cost: ");
199 pp_decimal_int (pp
, m_cost_or_uid
);
201 if (m_has_pre_post_modify
)
203 pp_newline_and_indent (pp
, 0);
204 pp_string (pp
, "has pre/post-modify operations");
206 if (m_has_volatile_refs
)
208 pp_newline_and_indent (pp
, 0);
209 pp_string (pp
, "has volatile refs");
213 pp_newline_and_indent (pp
, 0);
214 pp_string (pp
, "temporary");
217 pp_indentation (pp
) -= 2;
220 auto print_accesses
= [&](const char *heading
, access_array accesses
,
223 if (!accesses
.empty ())
225 pp_newline_and_indent (pp
, 2);
226 pp_string (pp
, heading
);
227 pp_newline_and_indent (pp
, 2);
228 pp_accesses (pp
, accesses
, flags
);
229 pp_indentation (pp
) -= 4;
233 print_accesses ("uses:", uses (), PP_ACCESS_USER
);
234 auto *call_clobbers_note
= find_note
<insn_call_clobbers_note
> ();
235 if (call_clobbers_note
)
237 pp_newline_and_indent (pp
, 2);
238 pp_string (pp
, "has call clobbers for ABI ");
239 pp_decimal_int (pp
, call_clobbers_note
->abi_id ());
240 pp_indentation (pp
) -= 2;
242 print_accesses ("defines:", defs (), PP_ACCESS_SETTER
);
243 if (num_uses () == 0 && !call_clobbers_note
&& num_defs () == 0)
245 pp_newline_and_indent (pp
, 2);
246 pp_string (pp
, "has no uses or defs");
247 pp_indentation (pp
) -= 2;
250 if (order_node
*node
= get_order_node ())
252 while (node
->m_parent
)
253 node
= node
->m_parent
;
255 pp_newline_and_indent (pp
, 2);
256 pp_string (pp
, "insn order: ");
257 pp_newline_and_indent (pp
, 2);
258 auto print_order
= [](pretty_printer
*pp
, order_node
*node
)
260 print_uid (pp
, node
->uid ());
262 order_splay_tree::print (pp
, node
, print_order
);
263 pp_indentation (pp
) -= 4;
267 // Return an insn_info::order_node for INSN, creating one if necessary.
268 insn_info::order_node
*
269 function_info::need_order_node (insn_info
*insn
)
271 insn_info::order_node
*order
= insn
->get_order_node ();
274 order
= allocate
<insn_info::order_node
> (insn
->uid ());
275 insn
->add_note (order
);
280 // Add instruction INSN immediately after AFTER in the reverse postorder list.
281 // INSN is not currently in the list.
283 function_info::add_insn_after (insn_info
*insn
, insn_info
*after
)
285 gcc_checking_assert (!insn
->has_insn_links ());
287 insn
->copy_next_from (after
);
288 after
->set_next_any_insn (insn
);
290 // The prev link is easy if AFTER and INSN are the same type.
291 // Handle the other cases below.
292 if (after
->is_debug_insn () == insn
->is_debug_insn ())
293 insn
->set_prev_sametype_insn (after
);
295 if (insn_info
*next
= insn
->next_any_insn ())
297 if (insn
->is_debug_insn () == next
->is_debug_insn ())
299 // INSN might now be the start of the subsequence of debug insns,
300 // and so its prev pointer might point to the end of the subsequence
302 insn
->copy_prev_from (next
);
303 next
->set_prev_sametype_insn (insn
);
305 else if (insn
->is_debug_insn ()) // && !next->is_debug_insn ()
307 // INSN ends a subsequence of debug instructions. Find the
308 // first debug instruction in the subsequence, which might
309 // be INSN itself. (If it isn't, then AFTER is also a debug
310 // instruction and we updated INSN's prev link above.)
311 insn_info
*first
= next
->prev_nondebug_insn ()->next_any_insn ();
312 first
->set_last_debug_insn (insn
);
314 else // !insn->is_debug_insn () && next->is_debug_insn ()
316 // At present we don't (need to) support inserting a nondebug
317 // instruction between two existing debug instructions.
318 gcc_assert (!after
->is_debug_insn ());
320 // Find the next nondebug insn and update its previous pointer
322 auto next_nondebug
= next
->last_debug_insn ()->next_any_insn ();
323 gcc_checking_assert (!next_nondebug
->is_debug_insn ());
324 next_nondebug
->set_prev_sametype_insn (insn
);
327 // If AFTER and NEXT are separated by at least two points, we can
328 // use a unique point number for INSN. Otherwise INSN will have
329 // the same point number as AFTER.
330 insn
->set_point ((next
->point () + after
->point ()) / 2);
334 if (!insn
->is_debug_insn ())
336 insn
->set_prev_sametype_insn (m_last_nondebug_insn
);
337 m_last_nondebug_insn
= insn
;
340 // There is now at least one debug instruction after
341 // m_last_nondebug_insn: either INSN itself, or the start of
342 // a longer subsequence of debug insns that now ends with AFTER
344 m_last_nondebug_insn
->next_any_insn ()->set_last_debug_insn (insn
);
347 insn
->set_point (after
->point () + POINT_INCREASE
);
350 // If INSN's program point is the same as AFTER's, we need to use the
351 // splay tree to record their relative order.
352 if (insn
->point () == after
->point ())
354 insn_info::order_node
*after_node
= need_order_node (after
);
355 insn_info::order_node
*insn_node
= need_order_node (insn
);
356 insn_info::order_splay_tree::insert_child (after_node
, 1, insn_node
);
360 // Replace non-debug instruction OLD_INSN with non-debug instruction NEW_INSN.
361 // NEW_INSN is not currently linked.
363 function_info::replace_nondebug_insn (insn_info
*old_insn
, insn_info
*new_insn
)
365 gcc_assert (!old_insn
->is_debug_insn ()
366 && !new_insn
->is_debug_insn ()
367 && !new_insn
->has_insn_links ());
369 insn_info
*prev
= old_insn
->prev_any_insn ();
370 insn_info
*next_nondebug
= old_insn
->next_nondebug_insn ();
372 // We should never remove the entry or exit block's instructions.
373 gcc_checking_assert (prev
&& next_nondebug
);
375 new_insn
->copy_prev_from (old_insn
);
376 new_insn
->copy_next_from (old_insn
);
378 prev
->set_next_any_insn (new_insn
);
379 next_nondebug
->set_prev_sametype_insn (new_insn
);
381 new_insn
->set_point (old_insn
->point ());
382 if (insn_info::order_node
*order
= old_insn
->get_order_node ())
384 order
->set_uid (new_insn
->uid ());
385 old_insn
->remove_note (order
);
386 new_insn
->add_note (order
);
389 old_insn
->clear_insn_links ();
392 // Remove INSN from the function's list of instructions.
394 function_info::remove_insn (insn_info
*insn
)
396 if (insn_info::order_node
*order
= insn
->get_order_node ())
398 insn_info::order_splay_tree::remove_node (order
);
399 insn
->remove_note (order
);
402 if (auto *note
= insn
->find_note
<insn_call_clobbers_note
> ())
404 ebb_call_clobbers_info
*ecc
= insn
->ebb ()->first_call_clobbers ();
405 while (ecc
->abi ()->id () != note
->abi_id ())
407 int comparison
= lookup_call_clobbers (*ecc
, insn
);
408 gcc_assert (comparison
== 0);
412 insn_info
*prev
= insn
->prev_any_insn ();
413 insn_info
*next
= insn
->next_any_insn ();
414 insn_info
*prev_nondebug
= insn
->prev_nondebug_insn ();
415 insn_info
*next_nondebug
= insn
->next_nondebug_insn ();
417 // We should never remove the entry or exit block's instructions.
418 // At present we also don't remove entire blocks, so should never
419 // remove debug instructions.
420 gcc_checking_assert (prev_nondebug
422 && !insn
->is_debug_insn ());
424 if (prev
->is_debug_insn () && next
->is_debug_insn ())
426 // We need to stitch together two subsequences of debug insns.
427 insn_info
*last
= next
->last_debug_insn ();
428 next
->set_prev_sametype_insn (prev
);
429 prev_nondebug
->next_any_insn ()->set_last_debug_insn (last
);
431 prev
->set_next_any_insn (next
);
432 next_nondebug
->set_prev_sametype_insn (prev_nondebug
);
434 insn
->clear_insn_links ();
437 // Create an artificial instruction for BB, associating it with RTL (which can
438 // be null). Add the new instruction to the end of the function's list and
439 // return the new instruction.
441 function_info::append_artificial_insn (bb_info
*bb
, rtx_insn
*rtl
)
443 insn_info
*insn
= allocate
<insn_info
> (bb
, rtl
, m_next_artificial_uid
);
444 m_next_artificial_uid
-= 1;
449 // Finish building a new list of uses and definitions for instruction INSN.
451 function_info::finish_insn_accesses (insn_info
*insn
)
453 unsigned int num_defs
= m_temp_defs
.length ();
454 unsigned int num_uses
= m_temp_uses
.length ();
455 obstack_make_room (&m_obstack
, num_defs
+ num_uses
);
458 sort_accesses (m_temp_defs
);
459 obstack_grow (&m_obstack
, m_temp_defs
.address (),
460 num_defs
* sizeof (access_info
*));
461 m_temp_defs
.truncate (0);
465 sort_accesses (m_temp_uses
);
466 obstack_grow (&m_obstack
, m_temp_uses
.address (),
467 num_uses
* sizeof (access_info
*));
468 m_temp_uses
.truncate (0);
470 void *addr
= obstack_finish (&m_obstack
);
471 insn
->set_accesses (static_cast<access_info
**> (addr
), num_defs
, num_uses
);
474 // Called while building SSA form using BI. Create and return a use of
475 // register RESOURCE in INSN. Create a degenerate phi where necessary.
477 function_info::create_reg_use (build_info
&bi
, insn_info
*insn
,
478 resource_info resource
)
480 set_info
*value
= bi
.current_reg_value (resource
.regno
);
481 if (value
&& value
->ebb () != bi
.current_ebb
)
483 if (insn
->is_debug_insn ())
484 value
= look_through_degenerate_phi (value
);
485 else if (bitmap_bit_p (bi
.potential_phi_regs
, resource
.regno
))
487 // VALUE is defined by a previous EBB and RESOURCE has multiple
488 // definitions. Create a degenerate phi in the current EBB
489 // so that all definitions and uses follow a linear RPO view;
490 // see rtl.texi for details.
491 access_info
*inputs
[] = { look_through_degenerate_phi (value
) };
492 value
= create_phi (bi
.current_ebb
, value
->resource (), inputs
, 1);
493 bi
.record_reg_def (value
);
496 auto *use
= allocate
<use_info
> (insn
, resource
, value
);
501 // Called while building SSA form using BI. Record that INSN contains
502 // read reference REF. If this requires new entries to be added to
503 // INSN->uses (), add those entries to the list we're building in
506 function_info::record_use (build_info
&bi
, insn_info
*insn
,
507 rtx_obj_reference ref
)
509 unsigned int regno
= ref
.regno
;
510 machine_mode mode
= ref
.is_reg () ? ref
.mode
: BLKmode
;
511 access_info
*access
= bi
.last_access
[ref
.regno
+ 1];
512 use_info
*use
= safe_dyn_cast
<use_info
*> (access
);
515 set_info
*value
= safe_dyn_cast
<set_info
*> (access
);
516 // In order to ensure that -g doesn't affect codegen, uses in debug
517 // instructions do not affect liveness, either in DF or here.
518 // This means that there might be no correct definition of the resource
519 // available (e.g. if it would require a phi node that the nondebug
520 // code doesn't need). Perhaps we could have "debug phi nodes" as
521 // well as "debug instructions", but that would require a method
522 // of building phi nodes that didn't depend on DF liveness information,
523 // and so might be significantly more expensive.
525 // Therefore, the only value we try to attach to a use by a debug
526 // instruction is VALUE itself (as we would for nondebug instructions).
527 // We then need to make a conservative check for whether VALUE is
529 auto value_is_valid
= [&]()
531 // Memmory always has a valid definition.
535 // If VALUE would lead to an uninitialized use anyway, there's
540 // If the previous definition occurs in the same EBB then it
541 // is certainly correct.
542 if (value
->ebb () == bi
.current_ebb
)
545 // Check if VALUE is the function's only definition of REGNO.
546 // (We already know that it dominates the use.)
547 if (!bitmap_bit_p (bi
.potential_phi_regs
, regno
))
550 // If the register is live on entry to the EBB but not used
551 // within it, VALUE is the correct live-in value.
552 if (!bi
.ebb_live_in_for_debug
)
553 calculate_ebb_live_in_for_debug (bi
);
554 if (bitmap_bit_p (bi
.ebb_live_in_for_debug
, regno
))
557 // Punt for other cases.
560 if (insn
->is_debug_insn () && !value_is_valid ())
563 use
= create_reg_use (bi
, insn
, { mode
, regno
});
564 m_temp_uses
.safe_push (use
);
565 bi
.last_access
[ref
.regno
+ 1] = use
;
566 use
->record_reference (ref
, true);
570 // Record the mode of the largest use. The choice is arbitrary if
571 // the instruction (unusually) references the same register in two
572 // different but equal-sized modes.
573 gcc_checking_assert (use
->insn () == insn
);
574 if (HARD_REGISTER_NUM_P (regno
))
576 if (!ordered_p (GET_MODE_PRECISION (use
->mode ()),
577 GET_MODE_PRECISION (mode
)))
578 use
->set_mode (reg_raw_mode
[regno
]);
579 else if (partial_subreg_p (use
->mode (), mode
))
580 use
->set_mode (mode
);
582 use
->record_reference (ref
, false);
586 // Called while building SSA form for INSN using BI. Record the effect
587 // of call clobbers in RTL. We have already added the explicit sets and
588 // clobbers for RTL, which have priority over any call clobbers.
590 function_info::record_call_clobbers (build_info
&bi
, insn_info
*insn
,
593 // See whether we should record this call in the EBB's list of
594 // call clobbers. Three things affect this choice:
596 // (1) The list is the only way we have of recording partial clobbers.
597 // All calls that only partially clobber registers must therefore
600 // (2) Adding calls to the list is much more memory-efficient than
601 // creating a long list of clobber_infos.
603 // (3) Adding calls to the list limits the ability to move definitions
604 // of registers that are normally fully or partially clobbered
605 // by the associated predefined ABI. So adding calls to the list
606 // can hamper optimization if (thanks to -fipa-ra) the number of
607 // clobbers is much smaller than the usual set.
609 // The trade-off that we currently take is to use the list if there
610 // are some registers that the call only partially clobbers or if
611 // the set of clobbers is the standard set.
612 function_abi abi
= insn_callee_abi (rtl
);
613 if (abi
.base_abi ().full_reg_clobbers () == abi
.full_reg_clobbers ()
614 || abi
.full_and_partial_reg_clobbers () != abi
.full_reg_clobbers ())
616 // Find an entry for this predefined ABI, creating one if necessary.
617 ebb_call_clobbers_info
*ecc
= bi
.current_ebb
->first_call_clobbers ();
618 while (ecc
&& ecc
->abi () != &abi
.base_abi ())
622 ecc
= allocate
<ebb_call_clobbers_info
> (&abi
.base_abi ());
623 ecc
->m_next
= bi
.current_ebb
->first_call_clobbers ();
624 bi
.current_ebb
->set_first_call_clobbers (ecc
);
627 auto abi_id
= abi
.base_abi ().id ();
628 auto *insn_clobbers
= allocate
<insn_call_clobbers_note
> (abi_id
, insn
);
629 insn
->add_note (insn_clobbers
);
631 ecc
->insert_max_node (insn_clobbers
);
633 m_clobbered_by_calls
|= abi
.full_and_partial_reg_clobbers ();
636 for (unsigned int regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; ++regno
)
637 if (TEST_HARD_REG_BIT (abi
.full_reg_clobbers (), regno
))
639 def_info
*def
= m_defs
[regno
+ 1];
640 if (!def
|| def
->last_def ()->insn () != insn
)
642 def
= allocate
<clobber_info
> (insn
, regno
);
643 def
->m_is_call_clobber
= true;
645 m_temp_defs
.safe_push (def
);
646 bi
.record_reg_def (def
);
651 // Called while building SSA form using BI. Record that INSN contains
652 // write reference REF. Add associated def_infos to the list of accesses
653 // that we're building in m_temp_defs. Record the register's new live
656 function_info::record_def (build_info
&bi
, insn_info
*insn
,
657 rtx_obj_reference ref
)
659 // Punt if we see multiple definitions of the same resource.
660 // This can happen for several reasons:
662 // - An instruction might store two values to memory at once, giving two
663 // distinct memory references.
665 // - An instruction might assign to multiple pieces of a wide pseudo
666 // register. For example, on 32-bit targets, an instruction might
667 // assign to both the upper and lower halves of a 64-bit pseudo register.
669 // - It's possible for the same register to be clobbered by the
670 // CALL_INSN_FUNCTION_USAGE and to be set by the main instruction
671 // pattern as well. In that case, the clobber conceptually happens
672 // before the set and can essentially be ignored.
674 // - Similarly, global registers are implicitly set by a call but can
675 // be explicitly set or clobbered as well. In that situation, the sets
676 // are listed first and should win over a clobber.
677 unsigned int regno
= ref
.regno
;
678 machine_mode mode
= ref
.is_reg () ? ref
.mode
: BLKmode
;
679 def_info
*def
= safe_dyn_cast
<def_info
*> (bi
.last_access
[ref
.regno
+ 1]);
680 if (def
&& def
->insn () == insn
)
682 if (!ref
.is_clobber ())
684 gcc_checking_assert (!is_a
<clobber_info
*> (def
));
685 def
->record_reference (ref
, false);
690 // Memory is always well-defined, so only use clobber_infos for registers.
691 if (ref
.is_reg () && ref
.is_clobber ())
692 def
= allocate
<clobber_info
> (insn
, regno
);
694 def
= allocate
<set_info
> (insn
, resource_info
{ mode
, regno
});
695 def
->record_reference (ref
, true);
697 m_temp_defs
.safe_push (def
);
698 bi
.record_reg_def (def
);
701 // Called while building SSA form using BI. Add an insn_info for RTL
702 // to the block that we're current building.
704 function_info::add_insn_to_block (build_info
&bi
, rtx_insn
*rtl
)
706 insn_info
*insn
= allocate
<insn_info
> (bi
.current_bb
, rtl
, UNKNOWN_COST
);
709 vec_rtx_properties properties
;
710 properties
.add_insn (rtl
, true);
711 insn
->set_properties (properties
);
713 start_insn_accesses ();
716 for (rtx_obj_reference ref
: properties
.refs ())
718 record_use (bi
, insn
, ref
);
720 // Restore the contents of bi.last_access, which we used as a cache
721 // when assembling the uses.
722 for (access_info
*access
: m_temp_uses
)
724 unsigned int regno
= access
->regno ();
725 gcc_checking_assert (bi
.last_access
[regno
+ 1] == access
);
726 bi
.last_access
[regno
+ 1] = as_a
<use_info
*> (access
)->def ();
729 // Record the definitions.
730 for (rtx_obj_reference ref
: properties
.refs ())
732 record_def (bi
, insn
, ref
);
734 // Logically these happen before the explicit definitions, but if the
735 // explicit definitions and call clobbers reference the same register,
736 // the explicit definition should win.
737 if (auto *call_rtl
= dyn_cast
<rtx_call_insn
*> (rtl
))
738 record_call_clobbers (bi
, insn
, call_rtl
);
740 finish_insn_accesses (insn
);
743 // Check whether INSN sets any registers that are never subsequently used.
744 // If so, add REG_UNUSED notes for them. The caller has already removed
745 // any previous REG_UNUSED notes.
747 function_info::add_reg_unused_notes (insn_info
*insn
)
749 rtx_insn
*rtl
= insn
->rtl ();
751 auto handle_potential_set
= [&](rtx pattern
)
753 if (GET_CODE (pattern
) != SET
)
756 rtx dest
= SET_DEST (pattern
);
760 def_array defs
= insn
->defs ();
761 unsigned int index
= find_access_index (defs
, REGNO (dest
));
762 for (unsigned int i
= 0; i
< REG_NREGS (dest
); ++i
)
764 def_info
*def
= defs
[index
+ i
];
765 gcc_checking_assert (def
->regno () == REGNO (dest
) + i
);
766 set_info
*set
= dyn_cast
<set_info
*> (def
);
767 if (set
&& set
->has_nondebug_uses ())
770 add_reg_note (rtl
, REG_UNUSED
, dest
);
773 rtx pattern
= PATTERN (rtl
);
774 if (GET_CODE (pattern
) == PARALLEL
)
775 for (int i
= 0; i
< XVECLEN (pattern
, 0); ++i
)
776 handle_potential_set (XVECEXP (pattern
, 0, i
));
778 handle_potential_set (pattern
);
781 // Search TREE for call clobbers at INSN. Return:
783 // - less than zero if INSN occurs before the root of TREE
784 // - 0 if INSN is the root of TREE
785 // - greater than zero if INSN occurs after the root of TREE
787 rtl_ssa::lookup_call_clobbers (insn_call_clobbers_tree
&tree
, insn_info
*insn
)
789 auto compare
= [&](insn_call_clobbers_note
*clobbers
)
791 return insn
->compare_with (clobbers
->insn ());
793 return tree
.lookup (compare
);
796 // Print a description of INSN to PP.
798 rtl_ssa::pp_insn (pretty_printer
*pp
, const insn_info
*insn
)
801 pp_string (pp
, "<null>");
803 insn
->print_full (pp
);
806 // Print a description of INSN to FILE.
808 dump (FILE *file
, const insn_info
*insn
)
810 dump_using (file
, pp_insn
, insn
);
813 // Debug interface to the dump routine above.
814 void debug (const insn_info
*x
) { dump (stderr
, x
); }