1 ;; Predicate definitions for Frv.
2 ;; Copyright (C) 2005-2024 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 ;; Return true if operand is a GPR register.
22 (define_predicate "integer_register_operand"
23 (match_code "reg,subreg")
25 if (GET_MODE (op) != mode && mode != VOIDmode)
28 if (GET_CODE (op) == SUBREG)
30 if (GET_CODE (SUBREG_REG (op)) != REG)
31 return register_operand (op, mode);
36 if (GET_CODE (op) != REG)
39 return GPR_AP_OR_PSEUDO_P (REGNO (op));
42 ;; Return 1 is OP is a memory operand, or will be turned into one by
45 (define_predicate "frv_load_operand"
46 (match_code "reg,subreg,mem")
48 if (GET_MODE (op) != mode && mode != VOIDmode)
51 if (reload_in_progress)
54 if (GET_CODE (tmp) == SUBREG)
55 tmp = SUBREG_REG (tmp);
56 if (GET_CODE (tmp) == REG
57 && REGNO (tmp) >= FIRST_PSEUDO_REGISTER)
58 op = reg_equiv_memory_loc (REGNO (tmp));
61 return op && memory_operand (op, mode);
64 ;; Return true if operand is a GPR register. Do not allow SUBREG's
65 ;; here, in order to prevent a combine bug.
67 (define_predicate "gpr_no_subreg_operand"
70 if (GET_MODE (op) != mode && mode != VOIDmode)
73 if (GET_CODE (op) != REG)
76 return GPR_OR_PSEUDO_P (REGNO (op));
79 ;; Return 1 if operand is a GPR register or a FPR register.
81 (define_predicate "gpr_or_fpr_operand"
82 (match_code "reg,subreg")
86 if (GET_MODE (op) != mode && mode != VOIDmode)
89 if (GET_CODE (op) == SUBREG)
91 if (GET_CODE (SUBREG_REG (op)) != REG)
92 return register_operand (op, mode);
97 if (GET_CODE (op) != REG)
101 if (GPR_P (regno) || FPR_P (regno) || regno >= FIRST_PSEUDO_REGISTER)
107 ;; Return 1 if operand is a GPR register or 12-bit signed immediate.
109 (define_predicate "gpr_or_int12_operand"
110 (match_code "reg,subreg,const_int,const")
112 if (GET_CODE (op) == CONST_INT)
113 return IN_RANGE (INTVAL (op), -2048, 2047);
115 if (got12_operand (op, mode))
118 if (GET_MODE (op) != mode && mode != VOIDmode)
121 if (GET_CODE (op) == SUBREG)
123 if (GET_CODE (SUBREG_REG (op)) != REG)
124 return register_operand (op, mode);
126 op = SUBREG_REG (op);
129 if (GET_CODE (op) != REG)
132 return GPR_OR_PSEUDO_P (REGNO (op));
135 ;; Return 1 if operand is a GPR register, or a FPR register, or a 12
136 ;; bit signed immediate.
138 (define_predicate "gpr_fpr_or_int12_operand"
139 (match_code "reg,subreg,const_int")
143 if (GET_CODE (op) == CONST_INT)
144 return IN_RANGE (INTVAL (op), -2048, 2047);
146 if (GET_MODE (op) != mode && mode != VOIDmode)
149 if (GET_CODE (op) == SUBREG)
151 if (GET_CODE (SUBREG_REG (op)) != REG)
152 return register_operand (op, mode);
154 op = SUBREG_REG (op);
157 if (GET_CODE (op) != REG)
161 if (GPR_P (regno) || FPR_P (regno) || regno >= FIRST_PSEUDO_REGISTER)
167 ;; Return 1 if operand is a register or 10-bit signed immediate.
169 (define_predicate "gpr_or_int10_operand"
170 (match_code "reg,subreg,const_int")
172 if (GET_CODE (op) == CONST_INT)
173 return IN_RANGE (INTVAL (op), -512, 511);
175 if (GET_MODE (op) != mode && mode != VOIDmode)
178 if (GET_CODE (op) == SUBREG)
180 if (GET_CODE (SUBREG_REG (op)) != REG)
181 return register_operand (op, mode);
183 op = SUBREG_REG (op);
186 if (GET_CODE (op) != REG)
189 return GPR_OR_PSEUDO_P (REGNO (op));
192 ;; Return 1 if operand is a register or an integer immediate.
194 (define_predicate "gpr_or_int_operand"
195 (match_code "reg,subreg,const_int")
197 if (GET_CODE (op) == CONST_INT)
200 if (GET_MODE (op) != mode && mode != VOIDmode)
203 if (GET_CODE (op) == SUBREG)
205 if (GET_CODE (SUBREG_REG (op)) != REG)
206 return register_operand (op, mode);
208 op = SUBREG_REG (op);
211 if (GET_CODE (op) != REG)
214 return GPR_OR_PSEUDO_P (REGNO (op));
217 ;; Return true if operand is something that can be an input for a move
220 (define_predicate "move_source_operand"
221 (match_code "reg,subreg,const_int,mem,const_double,const,symbol_ref,label_ref")
226 switch (GET_CODE (op))
233 return immediate_operand (op, mode);
236 if (GET_MODE (op) != mode && mode != VOIDmode)
239 subreg = SUBREG_REG (op);
240 code = GET_CODE (subreg);
242 return frv_legitimate_address_p_1 (mode, XEXP (subreg, 0),
243 reload_completed, FALSE, FALSE);
245 return (code == REG);
248 if (GET_MODE (op) != mode && mode != VOIDmode)
254 return frv_legitimate_memory_operand (op, mode, FALSE);
260 ;; Return true if operand is something that can be an output for a
263 (define_predicate "move_destination_operand"
264 (match_code "reg,subreg,mem")
269 switch (GET_CODE (op))
275 if (GET_MODE (op) != mode && mode != VOIDmode)
278 subreg = SUBREG_REG (op);
279 code = GET_CODE (subreg);
281 return frv_legitimate_address_p_1 (mode, XEXP (subreg, 0),
282 reload_completed, FALSE, FALSE);
284 return (code == REG);
287 if (GET_MODE (op) != mode && mode != VOIDmode)
293 return frv_legitimate_memory_operand (op, mode, FALSE);
299 ;; Return true if we the operand is a valid destination for a movcc_fp
300 ;; instruction. This means rejecting fcc_operands, since we need
301 ;; scratch registers to write to them.
303 (define_predicate "movcc_fp_destination_operand"
304 (match_code "reg,subreg,mem")
306 if (fcc_operand (op, mode))
309 return move_destination_operand (op, mode);
312 ;; Return true if operand is something that can be an input for a
313 ;; conditional move operation.
315 (define_predicate "condexec_source_operand"
316 (match_code "reg,subreg,const_int,mem,const_double")
321 switch (GET_CODE (op))
331 if (GET_MODE (op) != mode && mode != VOIDmode)
334 subreg = SUBREG_REG (op);
335 code = GET_CODE (subreg);
337 return frv_legitimate_address_p_1 (mode, XEXP (subreg, 0),
338 reload_completed, TRUE, FALSE);
340 return (code == REG);
343 if (GET_MODE (op) != mode && mode != VOIDmode)
349 return frv_legitimate_memory_operand (op, mode, TRUE);
355 ;; Return true if operand is something that can be an output for a
356 ;; conditional move operation.
358 (define_predicate "condexec_dest_operand"
359 (match_code "reg,subreg,mem")
364 switch (GET_CODE (op))
370 if (GET_MODE (op) != mode && mode != VOIDmode)
373 subreg = SUBREG_REG (op);
374 code = GET_CODE (subreg);
376 return frv_legitimate_address_p_1 (mode, XEXP (subreg, 0),
377 reload_completed, TRUE, FALSE);
379 return (code == REG);
382 if (GET_MODE (op) != mode && mode != VOIDmode)
388 return frv_legitimate_memory_operand (op, mode, TRUE);
394 ;; Return true if operand is a register of any flavor or a 0 of the
397 (define_predicate "reg_or_0_operand"
398 (match_code "reg,subreg,const_int,const_double")
400 switch (GET_CODE (op))
407 if (GET_MODE (op) != mode && mode != VOIDmode)
410 return register_operand (op, mode);
420 ;; Return true if operand is the link register.
422 (define_predicate "lr_operand"
425 if (GET_CODE (op) != REG)
428 if (GET_MODE (op) != mode && mode != VOIDmode)
431 if (REGNO (op) != LR_REGNO && REGNO (op) < FIRST_PSEUDO_REGISTER)
437 ;; Return true if operand is a gpr register or a valid memory operand.
439 (define_predicate "gpr_or_memory_operand"
440 (match_code "reg,subreg,mem")
442 return (integer_register_operand (op, mode)
443 || frv_legitimate_memory_operand (op, mode, FALSE));
446 ;; Return true if operand is a gpr register, a valid memory operand,
447 ;; or a memory operand that can be made valid using an additional gpr
450 (define_predicate "gpr_or_memory_operand_with_scratch"
451 (match_code "reg,subreg,mem")
455 if (gpr_or_memory_operand (op, mode))
458 if (GET_CODE (op) != MEM)
461 if (GET_MODE (op) != mode)
466 if (GET_CODE (addr) != PLUS)
469 if (!integer_register_operand (XEXP (addr, 0), Pmode))
472 if (GET_CODE (XEXP (addr, 1)) != CONST_INT)
478 ;; Return true if operand is a fpr register or a valid memory
481 (define_predicate "fpr_or_memory_operand"
482 (match_code "reg,subreg,mem")
484 return (fpr_operand (op, mode)
485 || frv_legitimate_memory_operand (op, mode, FALSE));
488 ;; Return 1 if operand is a 12-bit signed immediate.
490 (define_predicate "int12_operand"
491 (match_code "const_int")
493 if (GET_CODE (op) != CONST_INT)
496 return IN_RANGE (INTVAL (op), -2048, 2047);
499 ;; Return 1 if operand is an integer constant that takes 2
500 ;; instructions to load up and can be split into sethi/setlo
503 (define_predicate "int_2word_operand"
504 (match_code "const_int,const_double,symbol_ref,label_ref,const")
509 switch (GET_CODE (op))
518 return (flag_pic == 0);
521 if (flag_pic || TARGET_FDPIC)
525 if (GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
527 return GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF;
533 /* small data references are already 1 word */
534 return (flag_pic == 0) && (! SYMBOL_REF_SMALL_P (op));
537 return ! IN_RANGE (INTVAL (op), -32768, 32767);
540 if (GET_MODE (op) == SFmode)
542 REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (op), l);
544 return ! IN_RANGE (value, -32768, 32767);
546 else if (GET_MODE (op) == VOIDmode)
548 value = CONST_DOUBLE_LOW (op);
549 return ! IN_RANGE (value, -32768, 32767);
557 ;; Return true if operand is the uClinux PIC register.
559 (define_predicate "fdpic_operand"
565 if (GET_CODE (op) != REG)
568 if (GET_MODE (op) != mode && mode != VOIDmode)
571 if (REGNO (op) != FDPIC_REGNO && REGNO (op) < FIRST_PSEUDO_REGISTER)
577 ;; TODO: Add a comment here.
579 (define_predicate "fdpic_fptr_operand"
582 if (GET_MODE (op) != mode && mode != VOIDmode)
584 if (GET_CODE (op) != REG)
586 if (REGNO (op) != FDPIC_FPTR_REGNO && REGNO (op) < FIRST_PSEUDO_REGISTER)
591 ;; An address operand that may use a pair of registers, an addressing
592 ;; mode that we reject in general.
594 (define_predicate "ldd_address_operand"
595 (match_code "reg,subreg,plus")
597 if (GET_MODE (op) != mode && GET_MODE (op) != VOIDmode)
600 return frv_legitimate_address_p_1 (DImode, op, reload_completed, FALSE, TRUE);
603 ;; TODO: Add a comment here.
605 (define_predicate "got12_operand"
608 struct frv_unspec unspec;
610 if (frv_const_unspec_p (op, &unspec))
611 switch (unspec.reloc)
615 case R_FRV_FUNCDESC_GOT12:
616 case R_FRV_FUNCDESC_GOTOFF12:
618 case R_FRV_TLSMOFF12:
624 ;; Return true if OP is a valid const-unspec expression.
626 (define_predicate "const_unspec_operand"
629 struct frv_unspec unspec;
631 return frv_const_unspec_p (op, &unspec);
634 ;; Return true if operand is an icc register.
636 (define_predicate "icc_operand"
641 if (GET_MODE (op) != mode && mode != VOIDmode)
644 if (GET_CODE (op) != REG)
648 return ICC_OR_PSEUDO_P (regno);
651 ;; Return true if operand is an fcc register.
653 (define_predicate "fcc_operand"
658 if (GET_MODE (op) != mode && mode != VOIDmode)
661 if (GET_CODE (op) != REG)
665 return FCC_OR_PSEUDO_P (regno);
668 ;; Return true if operand is either an fcc or icc register.
670 (define_predicate "cc_operand"
675 if (GET_MODE (op) != mode && mode != VOIDmode)
678 if (GET_CODE (op) != REG)
682 if (CC_OR_PSEUDO_P (regno))
688 ;; Return true if operand is an integer CCR register.
690 (define_predicate "icr_operand"
695 if (GET_MODE (op) != mode && mode != VOIDmode)
698 if (GET_CODE (op) != REG)
702 return ICR_OR_PSEUDO_P (regno);
705 ;; Return true if operand is an fcc register.
707 (define_predicate "fcr_operand"
712 if (GET_MODE (op) != mode && mode != VOIDmode)
715 if (GET_CODE (op) != REG)
719 return FCR_OR_PSEUDO_P (regno);
722 ;; Return true if operand is either an fcc or icc register.
724 (define_predicate "cr_operand"
729 if (GET_MODE (op) != mode && mode != VOIDmode)
732 if (GET_CODE (op) != REG)
736 if (CR_OR_PSEUDO_P (regno))
742 ;; Return true if operand is a FPR register.
744 (define_predicate "fpr_operand"
745 (match_code "reg,subreg")
747 if (GET_MODE (op) != mode && mode != VOIDmode)
750 if (GET_CODE (op) == SUBREG)
752 if (GET_CODE (SUBREG_REG (op)) != REG)
753 return register_operand (op, mode);
755 op = SUBREG_REG (op);
758 if (GET_CODE (op) != REG)
761 return FPR_OR_PSEUDO_P (REGNO (op));
764 ;; Return true if operand is an even GPR or FPR register.
766 (define_predicate "even_reg_operand"
767 (match_code "reg,subreg")
771 if (GET_MODE (op) != mode && mode != VOIDmode)
774 if (GET_CODE (op) == SUBREG)
776 if (GET_CODE (SUBREG_REG (op)) != REG)
777 return register_operand (op, mode);
779 op = SUBREG_REG (op);
782 if (GET_CODE (op) != REG)
786 if (regno >= FIRST_PSEUDO_REGISTER)
790 return (((regno - GPR_FIRST) & 1) == 0);
793 return (((regno - FPR_FIRST) & 1) == 0);
798 ;; Return true if operand is an odd GPR register.
800 (define_predicate "odd_reg_operand"
801 (match_code "reg,subreg")
805 if (GET_MODE (op) != mode && mode != VOIDmode)
808 if (GET_CODE (op) == SUBREG)
810 if (GET_CODE (SUBREG_REG (op)) != REG)
811 return register_operand (op, mode);
813 op = SUBREG_REG (op);
816 if (GET_CODE (op) != REG)
820 /* Assume that reload will give us an even register. */
821 if (regno >= FIRST_PSEUDO_REGISTER)
825 return (((regno - GPR_FIRST) & 1) != 0);
828 return (((regno - FPR_FIRST) & 1) != 0);
833 ;; Return true if operand is an even GPR register.
835 (define_predicate "even_gpr_operand"
836 (match_code "reg,subreg")
840 if (GET_MODE (op) != mode && mode != VOIDmode)
843 if (GET_CODE (op) == SUBREG)
845 if (GET_CODE (SUBREG_REG (op)) != REG)
846 return register_operand (op, mode);
848 op = SUBREG_REG (op);
851 if (GET_CODE (op) != REG)
855 if (regno >= FIRST_PSEUDO_REGISTER)
861 return (((regno - GPR_FIRST) & 1) == 0);
864 ;; Return true if operand is an odd GPR register.
866 (define_predicate "odd_gpr_operand"
867 (match_code "reg,subreg")
871 if (GET_MODE (op) != mode && mode != VOIDmode)
874 if (GET_CODE (op) == SUBREG)
876 if (GET_CODE (SUBREG_REG (op)) != REG)
877 return register_operand (op, mode);
879 op = SUBREG_REG (op);
882 if (GET_CODE (op) != REG)
886 /* Assume that reload will give us an even register. */
887 if (regno >= FIRST_PSEUDO_REGISTER)
893 return (((regno - GPR_FIRST) & 1) != 0);
896 ;; Return true if operand is a quad aligned FPR register.
898 (define_predicate "quad_fpr_operand"
899 (match_code "reg,subreg")
903 if (GET_MODE (op) != mode && mode != VOIDmode)
906 if (GET_CODE (op) == SUBREG)
908 if (GET_CODE (SUBREG_REG (op)) != REG)
909 return register_operand (op, mode);
911 op = SUBREG_REG (op);
914 if (GET_CODE (op) != REG)
918 if (regno >= FIRST_PSEUDO_REGISTER)
924 return (((regno - FPR_FIRST) & 3) == 0);
927 ;; Return true if operand is an even FPR register.
929 (define_predicate "even_fpr_operand"
930 (match_code "reg,subreg")
934 if (GET_MODE (op) != mode && mode != VOIDmode)
937 if (GET_CODE (op) == SUBREG)
939 if (GET_CODE (SUBREG_REG (op)) != REG)
940 return register_operand (op, mode);
942 op = SUBREG_REG (op);
945 if (GET_CODE (op) != REG)
949 if (regno >= FIRST_PSEUDO_REGISTER)
955 return (((regno - FPR_FIRST) & 1) == 0);
958 ;; Return true if operand is an odd FPR register.
960 (define_predicate "odd_fpr_operand"
961 (match_code "reg,subreg")
965 if (GET_MODE (op) != mode && mode != VOIDmode)
968 if (GET_CODE (op) == SUBREG)
970 if (GET_CODE (SUBREG_REG (op)) != REG)
971 return register_operand (op, mode);
973 op = SUBREG_REG (op);
976 if (GET_CODE (op) != REG)
980 /* Assume that reload will give us an even register. */
981 if (regno >= FIRST_PSEUDO_REGISTER)
987 return (((regno - FPR_FIRST) & 1) != 0);
990 ;; Return true if operand is a 2 word memory address that can be
991 ;; loaded in one instruction to load or store. We assume the stack
992 ;; and frame pointers are suitably aligned, and variables in the small
993 ;; data area. FIXME -- at some we should recognize other globals and
994 ;; statics. We can't assume that any old pointer is aligned, given
995 ;; that arguments could be passed on an odd word on the stack and the
996 ;; address taken and passed through to another function.
998 (define_predicate "dbl_memory_one_insn_operand"
1007 if (GET_CODE (op) != MEM)
1010 if (mode != VOIDmode && GET_MODE_SIZE (mode) != 2*UNITS_PER_WORD)
1013 addr = XEXP (op, 0);
1014 if (GET_CODE (addr) == REG)
1017 else if (GET_CODE (addr) == PLUS)
1019 rtx addr0 = XEXP (addr, 0);
1020 rtx addr1 = XEXP (addr, 1);
1022 if (GET_CODE (addr0) != REG)
1025 if (got12_operand (addr1, VOIDmode))
1028 if (GET_CODE (addr1) != CONST_INT)
1031 if ((INTVAL (addr1) & 7) != 0)
1040 if (addr_reg == frame_pointer_rtx || addr_reg == stack_pointer_rtx)
1046 ;; Return true if operand is a 2 word memory address that needs to use
1047 ;; two instructions to load or store.
1049 (define_predicate "dbl_memory_two_insn_operand"
1052 if (GET_CODE (op) != MEM)
1055 if (mode != VOIDmode && GET_MODE_SIZE (mode) != 2*UNITS_PER_WORD)
1061 return ! dbl_memory_one_insn_operand (op, mode);
1064 ;; Return true if operand is a memory reference suitable for a call.
1066 (define_predicate "call_operand"
1067 (match_code "reg,subreg,const_int,const,symbol_ref")
1069 if (GET_MODE (op) != mode && mode != VOIDmode && GET_CODE (op) != CONST_INT)
1072 if (GET_CODE (op) == SYMBOL_REF)
1073 return !TARGET_LONG_CALLS || SYMBOL_REF_LOCAL_P (op);
1075 /* Note this doesn't allow reg+reg or reg+imm12 addressing (which should
1076 never occur anyway), but prevents reload from not handling the case
1077 properly of a call through a pointer on a function that calls
1078 vfork/setjmp, etc. due to the need to flush all of the registers to stack. */
1079 return gpr_or_int12_operand (op, mode);
1082 ;; Return true if operand is a memory reference suitable for a
1085 (define_predicate "sibcall_operand"
1086 (match_code "reg,subreg,const_int,const")
1088 if (GET_MODE (op) != mode && mode != VOIDmode && GET_CODE (op) != CONST_INT)
1091 /* Note this doesn't allow reg+reg or reg+imm12 addressing (which should
1092 never occur anyway), but prevents reload from not handling the case
1093 properly of a call through a pointer on a function that calls
1094 vfork/setjmp, etc. due to the need to flush all of the registers to stack. */
1095 return gpr_or_int12_operand (op, mode);
1098 ;; Return 1 if operand is an integer constant with the bottom 16 bits
1101 (define_predicate "upper_int16_operand"
1102 (match_code "const_int")
1104 if (GET_CODE (op) != CONST_INT)
1107 return ((INTVAL (op) & 0xffff) == 0);
1110 ;; Return 1 if operand is a 16-bit unsigned immediate.
1112 (define_predicate "uint16_operand"
1113 (match_code "const_int")
1115 if (GET_CODE (op) != CONST_INT)
1118 return IN_RANGE (INTVAL (op), 0, 0xffff);
1121 ;; Returns 1 if OP is either a SYMBOL_REF or a constant.
1123 (define_predicate "symbolic_operand"
1124 (match_code "symbol_ref,const,const_int")
1126 enum rtx_code c = GET_CODE (op);
1130 /* Allow (const:SI (plus:SI (symbol_ref) (const_int))). */
1131 return GET_MODE (op) == SImode
1132 && GET_CODE (XEXP (op, 0)) == PLUS
1133 && GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF
1134 && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT;
1137 return c == SYMBOL_REF || c == CONST_INT;
1140 ;; Return true if operator is a kind of relational operator.
1142 (define_predicate "relational_operator"
1143 (match_code "eq,ne,le,lt,ge,gt,leu,ltu,geu,gtu")
1145 return (integer_relational_operator (op, mode)
1146 || float_relational_operator (op, mode));
1149 ;; Return true if OP is a relational operator suitable for CCmode,
1150 ;; CC_UNSmode or CC_NZmode.
1152 (define_predicate "integer_relational_operator"
1153 (match_code "eq,ne,le,lt,ge,gt,leu,ltu,geu,gtu")
1155 if (mode != VOIDmode && mode != GET_MODE (op))
1158 /* The allowable relations depend on the mode of the ICC register. */
1159 switch (GET_CODE (op))
1168 return (GET_MODE (XEXP (op, 0)) == CC_NZmode
1169 || GET_MODE (XEXP (op, 0)) == CCmode);
1173 return GET_MODE (XEXP (op, 0)) == CCmode;
1179 return (GET_MODE (XEXP (op, 0)) == CC_NZmode
1180 || GET_MODE (XEXP (op, 0)) == CC_UNSmode);
1184 ;; Return true if operator is a floating point relational operator.
1186 (define_predicate "float_relational_operator"
1187 (match_code "eq,ne,le,lt,ge,gt")
1189 if (mode != VOIDmode && mode != GET_MODE (op))
1192 switch (GET_CODE (op))
1207 return GET_MODE (XEXP (op, 0)) == CC_FPmode;
1211 ;; Return true if operator is EQ/NE of a conditional execution
1214 (define_predicate "ccr_eqne_operator"
1215 (match_code "eq,ne")
1217 machine_mode op_mode = GET_MODE (op);
1222 if (mode != VOIDmode && op_mode != mode)
1225 switch (GET_CODE (op))
1236 if (op1 != const0_rtx)
1240 if (GET_CODE (op0) != REG)
1243 regno = REGNO (op0);
1244 if (op_mode == CC_CCRmode && CR_OR_PSEUDO_P (regno))
1250 ;; Return true if operator is a minimum or maximum operator (both
1251 ;; signed and unsigned).
1253 (define_predicate "minmax_operator"
1254 (match_code "smin,smax,umin,umax")
1256 if (mode != VOIDmode && mode != GET_MODE (op))
1259 switch (GET_CODE (op))
1274 ;; Return true if operator is an integer binary operator that can
1275 ;; executed conditionally and takes 1 cycle.
1277 (define_predicate "condexec_si_binary_operator"
1278 (match_code "plus,minus,and,ior,xor,ashift,ashiftrt,lshiftrt")
1280 machine_mode op_mode = GET_MODE (op);
1282 if (mode != VOIDmode && op_mode != mode)
1285 switch (GET_CODE (op))
1302 ;; Return true if operator is an integer binary operator that can be
1303 ;; executed conditionally by a media instruction.
1305 (define_predicate "condexec_si_media_operator"
1306 (match_code "and,ior,xor")
1308 machine_mode op_mode = GET_MODE (op);
1310 if (mode != VOIDmode && op_mode != mode)
1313 switch (GET_CODE (op))
1325 ;; Return true if operator is an integer division operator that can
1326 ;; executed conditionally.
1328 (define_predicate "condexec_si_divide_operator"
1329 (match_code "div,udiv")
1331 machine_mode op_mode = GET_MODE (op);
1333 if (mode != VOIDmode && op_mode != mode)
1336 switch (GET_CODE (op))
1347 ;; Return true if operator is an integer unary operator that can
1348 ;; executed conditionally.
1350 (define_predicate "condexec_si_unary_operator"
1351 (match_code "not,neg")
1353 machine_mode op_mode = GET_MODE (op);
1355 if (mode != VOIDmode && op_mode != mode)
1358 switch (GET_CODE (op))
1369 ;; Return true if operator is an addition or subtraction
1370 ;; expression. Such expressions can be evaluated conditionally by
1371 ;; floating-point instructions.
1373 (define_predicate "condexec_sf_add_operator"
1374 (match_code "plus,minus")
1376 machine_mode op_mode = GET_MODE (op);
1378 if (mode != VOIDmode && op_mode != mode)
1381 switch (GET_CODE (op))
1392 ;; Return true if operator is a conversion-type expression that can be
1393 ;; evaluated conditionally by floating-point instructions.
1395 (define_predicate "condexec_sf_conv_operator"
1396 (match_code "abs,neg")
1398 machine_mode op_mode = GET_MODE (op);
1400 if (mode != VOIDmode && op_mode != mode)
1403 switch (GET_CODE (op))
1414 ;; Return true if OP is an integer binary operator that can be
1415 ;; combined with a (set ... (compare:CC_NZ ...)) pattern.
1417 (define_predicate "intop_compare_operator"
1418 (match_code "plus,minus,and,ior,xor,ashift,ashiftrt,lshiftrt")
1420 if (mode != VOIDmode && GET_MODE (op) != mode)
1423 switch (GET_CODE (op))
1435 return GET_MODE (op) == SImode;
1439 ;; Return 1 if operand is a register or 6-bit signed immediate.
1441 (define_predicate "fpr_or_int6_operand"
1442 (match_code "reg,subreg,const_int")
1444 if (GET_CODE (op) == CONST_INT)
1445 return IN_RANGE (INTVAL (op), -32, 31);
1447 if (GET_MODE (op) != mode && mode != VOIDmode)
1450 if (GET_CODE (op) == SUBREG)
1452 if (GET_CODE (SUBREG_REG (op)) != REG)
1453 return register_operand (op, mode);
1455 op = SUBREG_REG (op);
1458 if (GET_CODE (op) != REG)
1461 return FPR_OR_PSEUDO_P (REGNO (op));
1464 ;; Return 1 if operand is a 6-bit signed immediate.
1466 (define_predicate "int6_operand"
1467 (match_code "const_int")
1469 if (GET_CODE (op) != CONST_INT)
1472 return IN_RANGE (INTVAL (op), -32, 31);
1475 ;; Return 1 if operand is a 5-bit signed immediate.
1477 (define_predicate "int5_operand"
1478 (match_code "const_int")
1480 return GET_CODE (op) == CONST_INT && IN_RANGE (INTVAL (op), -16, 15);
1483 ;; Return 1 if operand is a 5-bit unsigned immediate.
1485 (define_predicate "uint5_operand"
1486 (match_code "const_int")
1488 return GET_CODE (op) == CONST_INT && IN_RANGE (INTVAL (op), 0, 31);
1491 ;; Return 1 if operand is a 4-bit unsigned immediate.
1493 (define_predicate "uint4_operand"
1494 (match_code "const_int")
1496 return GET_CODE (op) == CONST_INT && IN_RANGE (INTVAL (op), 0, 15);
1499 ;; Return 1 if operand is a 1-bit unsigned immediate (0 or 1).
1501 (define_predicate "uint1_operand"
1502 (match_code "const_int")
1504 return GET_CODE (op) == CONST_INT && IN_RANGE (INTVAL (op), 0, 1);
1507 ;; Return 1 if operand is a valid ACC register number.
1509 (define_predicate "acc_operand"
1510 (match_code "reg,subreg")
1512 return ((mode == VOIDmode || mode == GET_MODE (op))
1513 && REG_P (op) && ACC_P (REGNO (op))
1514 && ((REGNO (op) - ACC_FIRST) & ~ACC_MASK) == 0);
1517 ;; Return 1 if operand is a valid even ACC register number.
1519 (define_predicate "even_acc_operand"
1520 (match_code "reg,subreg")
1522 return acc_operand (op, mode) && ((REGNO (op) - ACC_FIRST) & 1) == 0;
1525 ;; Return 1 if operand is zero or four.
1527 (define_predicate "quad_acc_operand"
1528 (match_code "reg,subreg")
1530 return acc_operand (op, mode) && ((REGNO (op) - ACC_FIRST) & 3) == 0;
1533 ;; Return 1 if operand is a valid ACCG register number.
1535 (define_predicate "accg_operand"
1536 (match_code "reg,subreg")
1538 return ((mode == VOIDmode || mode == GET_MODE (op))
1539 && REG_P (op) && ACCG_P (REGNO (op))
1540 && ((REGNO (op) - ACCG_FIRST) & ~ACC_MASK) == 0);