Add __builtion_unreachable to vector::size(), vector::capacity()
[official-gcc.git] / gcc / config / arm / netbsd-elf.h
blob24ed8f78aca8d30686046b09f2c1cb17c0def0a5
1 /* Definitions of target machine for GNU compiler, NetBSD/arm ELF version.
2 Copyright (C) 2002-2024 Free Software Foundation, Inc.
3 Contributed by Wasabi Systems, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 Under Section 7 of GPL version 3, you are granted additional
18 permissions described in the GCC Runtime Library Exception, version
19 3.1, as published by the Free Software Foundation.
21 You should have received a copy of the GNU General Public License and
22 a copy of the GCC Runtime Library Exception along with this program;
23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
24 <http://www.gnu.org/licenses/>. */
26 /* Run-time Target Specification. */
28 /* arm.h defaults to ARM6 CPU. */
30 /* This defaults us to little-endian. */
31 #ifndef TARGET_ENDIAN_DEFAULT
32 #define TARGET_ENDIAN_DEFAULT 0
33 #endif
35 #undef MULTILIB_DEFAULTS
37 /* Default it to use ATPCS with soft-VFP. */
38 #undef TARGET_DEFAULT
39 #define TARGET_DEFAULT \
40 (MASK_APCS_FRAME \
41 | TARGET_ENDIAN_DEFAULT)
43 #undef ARM_DEFAULT_ABI
44 #define ARM_DEFAULT_ABI ARM_ABI_ATPCS
46 #undef TARGET_OS_CPP_BUILTINS
47 #define TARGET_OS_CPP_BUILTINS() \
48 do \
49 { \
50 NETBSD_OS_CPP_BUILTINS_ELF(); \
51 } \
52 while (0)
54 #undef SUBTARGET_CPP_SPEC
55 #define SUBTARGET_CPP_SPEC NETBSD_CPP_SPEC
57 #undef SUBTARGET_EXTRA_ASM_SPEC
58 #define SUBTARGET_EXTRA_ASM_SPEC \
59 "%{" FPIE_OR_FPIC_SPEC ":-k}"
61 /* Default to full VFP if -mfloat-abi=hard is specified. */
62 #undef SUBTARGET_ASM_FLOAT_SPEC
63 #define SUBTARGET_ASM_FLOAT_SPEC \
64 "%{mfloat-abi=hard:{!mfpu=*:-mfpu=vfp}}"
66 #undef SUBTARGET_EXTRA_SPECS
67 #define SUBTARGET_EXTRA_SPECS \
68 { "subtarget_extra_asm_spec", SUBTARGET_EXTRA_ASM_SPEC }, \
69 { "subtarget_asm_float_spec", SUBTARGET_ASM_FLOAT_SPEC }, \
70 { "netbsd_link_spec", NETBSD_LINK_SPEC_ELF }, \
71 { "netbsd_entry_point", NETBSD_ENTRY_POINT },
73 #define NETBSD_ENTRY_POINT "__start"
75 #undef LINK_SPEC
76 #define LINK_SPEC \
77 "-X %{mbig-endian:-EB} %{mlittle-endian:-EL} \
78 %(netbsd_link_spec)"
80 /* Make GCC agree with <machine/ansi.h>. */
82 #undef SIZE_TYPE
83 #define SIZE_TYPE "long unsigned int"
85 #undef PTRDIFF_TYPE
86 #define PTRDIFF_TYPE "long int"
88 /* NetBSD does its profiling differently to the Acorn compiler. We
89 don't need a word following the mcount call; and to skip it
90 requires either an assembly stub or use of fomit-frame-pointer when
91 compiling the profiling functions. Since we break Acorn CC
92 compatibility below a little more won't hurt. */
94 #undef ARM_FUNCTION_PROFILER
95 #define ARM_FUNCTION_PROFILER(STREAM,LABELNO) \
96 { \
97 asm_fprintf (STREAM, "\tmov\t%Rip, %Rlr\n"); \
98 asm_fprintf (STREAM, "\tbl\t__mcount%s\n", \
99 (TARGET_ARM && NEED_PLT_RELOC) \
100 ? "(PLT)" : ""); \
103 /* VERY BIG NOTE: Change of structure alignment for NetBSD/arm.
104 There are consequences you should be aware of...
106 Normally GCC/arm uses a structure alignment of 32 for compatibility
107 with armcc. This means that structures are padded to a word
108 boundary. However this causes problems with bugged NetBSD kernel
109 code (possibly userland code as well - I have not checked every
110 binary). The nature of this bugged code is to rely on sizeof()
111 returning the correct size of various structures rounded to the
112 nearest byte (SCSI and ether code are two examples, the vm system
113 is another). This code breaks when the structure alignment is 32
114 as sizeof() will report a word=rounded size. By changing the
115 structure alignment to 8. GCC will conform to what is expected by
116 NetBSD.
118 This has several side effects that should be considered.
119 1. Structures will only be aligned to the size of the largest member.
120 i.e. structures containing only bytes will be byte aligned.
121 structures containing shorts will be half word aligned.
122 structures containing ints will be word aligned.
124 This means structures should be padded to a word boundary if
125 alignment of 32 is required for byte structures etc.
127 2. A potential performance penalty may exist if strings are no longer
128 word aligned. GCC will not be able to use word load/stores to copy
129 short strings.
131 This modification is not encouraged but with the present state of the
132 NetBSD source tree it is currently the only solution that meets the
133 requirements. */
135 #undef DEFAULT_STRUCTURE_SIZE_BOUNDARY
136 #define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8
138 #define SYSARCH_ARM_SYNC_ICACHE 0
140 /* Clear the instruction cache from `BEG' to `END'. This makes a
141 call to the ARM_SYNC_ICACHE architecture specific syscall. */
142 #define CLEAR_INSN_CACHE(BEG, END) \
143 do \
145 extern int sysarch(int number, void *args); \
146 struct \
148 unsigned int addr; \
149 int len; \
150 } s; \
151 s.addr = (unsigned int)(BEG); \
152 s.len = (END) - (BEG); \
153 (void) sysarch (SYSARCH_ARM_SYNC_ICACHE, &s); \
155 while (0)