libbacktrace: update xcoff.c for base_address changes
[official-gcc.git] / gcc / config / arm / elf.h
blob97230d19a36d2bec0ae444ba119c7aab619e9c5c
1 /* Definitions of target machine for GNU compiler.
2 For ARM with ELF obj format.
3 Copyright (C) 1995-2024 Free Software Foundation, Inc.
4 Contributed by Philip Blundell <philb@gnu.org> and
5 Catherine Moore <clm@cygnus.com>
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it
10 under the terms of the GNU General Public License as published
11 by the Free Software Foundation; either version 3, or (at your
12 option) any later version.
14 GCC is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 Under Section 7 of GPL version 3, you are granted additional
20 permissions described in the GCC Runtime Library Exception, version
21 3.1, as published by the Free Software Foundation.
23 You should have received a copy of the GNU General Public License and
24 a copy of the GCC Runtime Library Exception along with this program;
25 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
26 <http://www.gnu.org/licenses/>. */
28 #ifndef OBJECT_FORMAT_ELF
29 #error elf.h included before elfos.h
30 #endif
32 #ifndef LOCAL_LABEL_PREFIX
33 #define LOCAL_LABEL_PREFIX "."
34 #endif
36 #ifndef SUBTARGET_CPP_SPEC
37 #define SUBTARGET_CPP_SPEC "-D__ELF__"
38 #endif
40 #ifndef SUBTARGET_EXTRA_SPECS
41 #define SUBTARGET_EXTRA_SPECS \
42 { "subtarget_extra_asm_spec", SUBTARGET_EXTRA_ASM_SPEC }, \
43 { "subtarget_asm_float_spec", SUBTARGET_ASM_FLOAT_SPEC }, \
44 SUBSUBTARGET_EXTRA_SPECS
45 #endif
47 #ifndef SUBTARGET_EXTRA_ASM_SPEC
48 #define SUBTARGET_EXTRA_ASM_SPEC ""
49 #endif
51 #ifndef SUBTARGET_ASM_FLOAT_SPEC
52 #define SUBTARGET_ASM_FLOAT_SPEC "\
53 %{mapcs-float:-mfloat}"
54 #endif
56 #undef SUBSUBTARGET_EXTRA_SPECS
57 #define SUBSUBTARGET_EXTRA_SPECS
59 #ifndef ASM_SPEC
60 #define ASM_SPEC "\
61 %{mbig-endian:-EB} \
62 %{mlittle-endian:-EL} \
63 %(asm_cpu_spec) \
64 %{mapcs-*:-mapcs-%*} \
65 %(subtarget_asm_float_spec) \
66 %{mthumb-interwork:-mthumb-interwork} \
67 %{mfloat-abi=*} %{!mfpu=auto: %{mfpu=*}} \
68 %(subtarget_extra_asm_spec)"
69 #endif
71 /* The ARM uses @ are a comment character so we need to redefine
72 TYPE_OPERAND_FMT. */
73 #undef TYPE_OPERAND_FMT
74 #define TYPE_OPERAND_FMT "%%%s"
76 /* We might need a ARM specific header to function declarations. */
77 #undef ASM_DECLARE_FUNCTION_NAME
78 #define ASM_DECLARE_FUNCTION_NAME arm_asm_declare_function_name
80 /* We might need an ARM specific trailer for function declarations. */
81 #undef ASM_DECLARE_FUNCTION_SIZE
82 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
83 do \
84 { \
85 ARM_OUTPUT_FN_UNWIND (FILE, FALSE); \
86 if (!flag_inhibit_size_directive) \
87 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
88 } \
89 while (0)
91 /* Define this macro if jump tables (for `tablejump' insns) should be
92 output in the text section, along with the assembler instructions.
93 Otherwise, the readonly data section is used. */
94 /* The choice of placement for jump tables is nuanced. For cores with
95 Harvard caches (pretty much all cases these days), there is a
96 benefit of maintaing a separation between I- and D-cache candidates
97 and that favors having jump tables in the RO data section. This
98 makes the dispatch sequence slightly longer as we need to load the
99 address of the jump table first, but we often save elsewhere as the
100 content of the code section becomes better packed and we need
101 fewer long-range branch operations. We also require the dispatch
102 table to be in the RO section when compiling for pure code. We
103 currently place jump tables in the RO-data section for Arm or
104 whenever pure code is required; we also do it for Thumb-1 when
105 using an ADDR_VEC. The remaining cases put the jump table in the
106 text section, but we should revisit this choice. */
107 #define JUMP_TABLES_IN_TEXT_SECTION \
108 ((TARGET_THUMB2 || (TARGET_THUMB && (optimize_size || flag_pic))) \
109 && !target_pure_code)
111 #ifndef LINK_SPEC
112 #define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X"
113 #endif
115 /* Run-time Target Specification. */
116 #ifndef TARGET_DEFAULT
117 #define TARGET_DEFAULT (MASK_APCS_FRAME)
118 #endif
121 #define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
124 /* Output an element in the static constructor array. */
125 #undef TARGET_ASM_CONSTRUCTOR
126 #define TARGET_ASM_CONSTRUCTOR arm_elf_asm_constructor
128 #undef TARGET_ASM_DESTRUCTOR
129 #define TARGET_ASM_DESTRUCTOR arm_elf_asm_destructor
131 /* For PIC code we need to explicitly specify (PLT) and (GOT) relocs. */
132 #define NEED_PLT_RELOC flag_pic
133 #define NEED_GOT_RELOC flag_pic
135 /* The ELF assembler handles GOT addressing differently to NetBSD. */
136 #define GOT_PCREL 0
138 /* Align output to a power of two. Note ".align 0" is redundant,
139 and also GAS will treat it as ".align 2" which we do not want. */
140 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
141 do \
143 if ((POWER) > 0) \
144 fprintf (STREAM, "\t.align\t%d\n", POWER); \
146 while (0)
148 /* Horrible hack: We want to prevent some libgcc routines being included
149 for some multilibs. The condition should match the one in
150 libgcc/config/arm/lib1funcs.S and libgcc/config/arm/t-elf. */
151 #if __ARM_ARCH_ISA_ARM || __ARM_ARCH_ISA_THUMB != 1
152 #undef L_fixdfsi
153 #undef L_fixunsdfsi
154 #undef L_truncdfsf2
155 #undef L_fixsfsi
156 #undef L_fixunssfsi
157 #undef L_floatdidf
158 #undef L_floatdisf
159 #undef L_floatundidf
160 #undef L_floatundisf
161 #endif