* i386.c (ix86_expand_set_or_movmem): Disable 512bit loops for targets
[official-gcc.git] / gcc / emit-rtl.c
blobe790cbcb6ff0989453ed618563c3a12435fbf713
1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
32 use. */
34 #include "config.h"
35 #include "system.h"
36 #include "coretypes.h"
37 #include "memmodel.h"
38 #include "backend.h"
39 #include "target.h"
40 #include "rtl.h"
41 #include "tree.h"
42 #include "df.h"
43 #include "tm_p.h"
44 #include "stringpool.h"
45 #include "insn-config.h"
46 #include "regs.h"
47 #include "emit-rtl.h"
48 #include "recog.h"
49 #include "diagnostic-core.h"
50 #include "alias.h"
51 #include "fold-const.h"
52 #include "varasm.h"
53 #include "cfgrtl.h"
54 #include "tree-eh.h"
55 #include "explow.h"
56 #include "expr.h"
57 #include "params.h"
58 #include "builtins.h"
59 #include "rtl-iter.h"
60 #include "stor-layout.h"
61 #include "opts.h"
62 #include "predict.h"
64 struct target_rtl default_target_rtl;
65 #if SWITCHABLE_TARGET
66 struct target_rtl *this_target_rtl = &default_target_rtl;
67 #endif
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 scalar_int_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
74 scalar_int_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
75 scalar_int_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
77 /* Datastructures maintained for currently processed function in RTL form. */
79 struct rtl_data x_rtl;
81 /* Indexed by pseudo register number, gives the rtx for that pseudo.
82 Allocated in parallel with regno_pointer_align.
83 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
84 with length attribute nested in top level structures. */
86 rtx * regno_reg_rtx;
88 /* This is *not* reset after each function. It gives each CODE_LABEL
89 in the entire compilation a unique label number. */
91 static GTY(()) int label_num = 1;
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
96 is set only for MODE_INT and MODE_VECTOR_INT modes. */
98 rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
100 rtx const_true_rtx;
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
106 REAL_VALUE_TYPE dconsthalf;
108 /* Record fixed-point constant 0 and 1. */
109 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
110 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
112 /* We make one copy of (const_int C) where C is in
113 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
114 to save space during the compilation and simplify comparisons of
115 integers. */
117 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
119 /* Standard pieces of rtx, to be substituted directly into things. */
120 rtx pc_rtx;
121 rtx ret_rtx;
122 rtx simple_return_rtx;
123 rtx cc0_rtx;
125 /* Marker used for denoting an INSN, which should never be accessed (i.e.,
126 this pointer should normally never be dereferenced), but is required to be
127 distinct from NULL_RTX. Currently used by peephole2 pass. */
128 rtx_insn *invalid_insn_rtx;
130 /* A hash table storing CONST_INTs whose absolute value is greater
131 than MAX_SAVED_CONST_INT. */
133 struct const_int_hasher : ggc_cache_ptr_hash<rtx_def>
135 typedef HOST_WIDE_INT compare_type;
137 static hashval_t hash (rtx i);
138 static bool equal (rtx i, HOST_WIDE_INT h);
141 static GTY ((cache)) hash_table<const_int_hasher> *const_int_htab;
143 struct const_wide_int_hasher : ggc_cache_ptr_hash<rtx_def>
145 static hashval_t hash (rtx x);
146 static bool equal (rtx x, rtx y);
149 static GTY ((cache)) hash_table<const_wide_int_hasher> *const_wide_int_htab;
151 /* A hash table storing register attribute structures. */
152 struct reg_attr_hasher : ggc_cache_ptr_hash<reg_attrs>
154 static hashval_t hash (reg_attrs *x);
155 static bool equal (reg_attrs *a, reg_attrs *b);
158 static GTY ((cache)) hash_table<reg_attr_hasher> *reg_attrs_htab;
160 /* A hash table storing all CONST_DOUBLEs. */
161 struct const_double_hasher : ggc_cache_ptr_hash<rtx_def>
163 static hashval_t hash (rtx x);
164 static bool equal (rtx x, rtx y);
167 static GTY ((cache)) hash_table<const_double_hasher> *const_double_htab;
169 /* A hash table storing all CONST_FIXEDs. */
170 struct const_fixed_hasher : ggc_cache_ptr_hash<rtx_def>
172 static hashval_t hash (rtx x);
173 static bool equal (rtx x, rtx y);
176 static GTY ((cache)) hash_table<const_fixed_hasher> *const_fixed_htab;
178 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
179 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
180 #define first_label_num (crtl->emit.x_first_label_num)
182 static void set_used_decls (tree);
183 static void mark_label_nuses (rtx);
184 #if TARGET_SUPPORTS_WIDE_INT
185 static rtx lookup_const_wide_int (rtx);
186 #endif
187 static rtx lookup_const_double (rtx);
188 static rtx lookup_const_fixed (rtx);
189 static reg_attrs *get_reg_attrs (tree, int);
190 static rtx gen_const_vector (machine_mode, int);
191 static void copy_rtx_if_shared_1 (rtx *orig);
193 /* Probability of the conditional branch currently proceeded by try_split. */
194 profile_probability split_branch_probability;
196 /* Returns a hash code for X (which is a really a CONST_INT). */
198 hashval_t
199 const_int_hasher::hash (rtx x)
201 return (hashval_t) INTVAL (x);
204 /* Returns nonzero if the value represented by X (which is really a
205 CONST_INT) is the same as that given by Y (which is really a
206 HOST_WIDE_INT *). */
208 bool
209 const_int_hasher::equal (rtx x, HOST_WIDE_INT y)
211 return (INTVAL (x) == y);
214 #if TARGET_SUPPORTS_WIDE_INT
215 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
217 hashval_t
218 const_wide_int_hasher::hash (rtx x)
220 int i;
221 unsigned HOST_WIDE_INT hash = 0;
222 const_rtx xr = x;
224 for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
225 hash += CONST_WIDE_INT_ELT (xr, i);
227 return (hashval_t) hash;
230 /* Returns nonzero if the value represented by X (which is really a
231 CONST_WIDE_INT) is the same as that given by Y (which is really a
232 CONST_WIDE_INT). */
234 bool
235 const_wide_int_hasher::equal (rtx x, rtx y)
237 int i;
238 const_rtx xr = x;
239 const_rtx yr = y;
240 if (CONST_WIDE_INT_NUNITS (xr) != CONST_WIDE_INT_NUNITS (yr))
241 return false;
243 for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
244 if (CONST_WIDE_INT_ELT (xr, i) != CONST_WIDE_INT_ELT (yr, i))
245 return false;
247 return true;
249 #endif
251 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
252 hashval_t
253 const_double_hasher::hash (rtx x)
255 const_rtx const value = x;
256 hashval_t h;
258 if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (value) == VOIDmode)
259 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
260 else
262 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
263 /* MODE is used in the comparison, so it should be in the hash. */
264 h ^= GET_MODE (value);
266 return h;
269 /* Returns nonzero if the value represented by X (really a ...)
270 is the same as that represented by Y (really a ...) */
271 bool
272 const_double_hasher::equal (rtx x, rtx y)
274 const_rtx const a = x, b = y;
276 if (GET_MODE (a) != GET_MODE (b))
277 return 0;
278 if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (a) == VOIDmode)
279 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
280 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
281 else
282 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
283 CONST_DOUBLE_REAL_VALUE (b));
286 /* Returns a hash code for X (which is really a CONST_FIXED). */
288 hashval_t
289 const_fixed_hasher::hash (rtx x)
291 const_rtx const value = x;
292 hashval_t h;
294 h = fixed_hash (CONST_FIXED_VALUE (value));
295 /* MODE is used in the comparison, so it should be in the hash. */
296 h ^= GET_MODE (value);
297 return h;
300 /* Returns nonzero if the value represented by X is the same as that
301 represented by Y. */
303 bool
304 const_fixed_hasher::equal (rtx x, rtx y)
306 const_rtx const a = x, b = y;
308 if (GET_MODE (a) != GET_MODE (b))
309 return 0;
310 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
313 /* Return true if the given memory attributes are equal. */
315 bool
316 mem_attrs_eq_p (const struct mem_attrs *p, const struct mem_attrs *q)
318 if (p == q)
319 return true;
320 if (!p || !q)
321 return false;
322 return (p->alias == q->alias
323 && p->offset_known_p == q->offset_known_p
324 && (!p->offset_known_p || p->offset == q->offset)
325 && p->size_known_p == q->size_known_p
326 && (!p->size_known_p || p->size == q->size)
327 && p->align == q->align
328 && p->addrspace == q->addrspace
329 && (p->expr == q->expr
330 || (p->expr != NULL_TREE && q->expr != NULL_TREE
331 && operand_equal_p (p->expr, q->expr, 0))));
334 /* Set MEM's memory attributes so that they are the same as ATTRS. */
336 static void
337 set_mem_attrs (rtx mem, mem_attrs *attrs)
339 /* If everything is the default, we can just clear the attributes. */
340 if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
342 MEM_ATTRS (mem) = 0;
343 return;
346 if (!MEM_ATTRS (mem)
347 || !mem_attrs_eq_p (attrs, MEM_ATTRS (mem)))
349 MEM_ATTRS (mem) = ggc_alloc<mem_attrs> ();
350 memcpy (MEM_ATTRS (mem), attrs, sizeof (mem_attrs));
354 /* Returns a hash code for X (which is a really a reg_attrs *). */
356 hashval_t
357 reg_attr_hasher::hash (reg_attrs *x)
359 const reg_attrs *const p = x;
361 return ((p->offset * 1000) ^ (intptr_t) p->decl);
364 /* Returns nonzero if the value represented by X is the same as that given by
365 Y. */
367 bool
368 reg_attr_hasher::equal (reg_attrs *x, reg_attrs *y)
370 const reg_attrs *const p = x;
371 const reg_attrs *const q = y;
373 return (p->decl == q->decl && p->offset == q->offset);
375 /* Allocate a new reg_attrs structure and insert it into the hash table if
376 one identical to it is not already in the table. We are doing this for
377 MEM of mode MODE. */
379 static reg_attrs *
380 get_reg_attrs (tree decl, int offset)
382 reg_attrs attrs;
384 /* If everything is the default, we can just return zero. */
385 if (decl == 0 && offset == 0)
386 return 0;
388 attrs.decl = decl;
389 attrs.offset = offset;
391 reg_attrs **slot = reg_attrs_htab->find_slot (&attrs, INSERT);
392 if (*slot == 0)
394 *slot = ggc_alloc<reg_attrs> ();
395 memcpy (*slot, &attrs, sizeof (reg_attrs));
398 return *slot;
402 #if !HAVE_blockage
403 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
404 and to block register equivalences to be seen across this insn. */
407 gen_blockage (void)
409 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
410 MEM_VOLATILE_P (x) = true;
411 return x;
413 #endif
416 /* Set the mode and register number of X to MODE and REGNO. */
418 void
419 set_mode_and_regno (rtx x, machine_mode mode, unsigned int regno)
421 unsigned int nregs = (HARD_REGISTER_NUM_P (regno)
422 ? hard_regno_nregs (regno, mode)
423 : 1);
424 PUT_MODE_RAW (x, mode);
425 set_regno_raw (x, regno, nregs);
428 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
429 don't attempt to share with the various global pieces of rtl (such as
430 frame_pointer_rtx). */
433 gen_raw_REG (machine_mode mode, unsigned int regno)
435 rtx x = rtx_alloc (REG MEM_STAT_INFO);
436 set_mode_and_regno (x, mode, regno);
437 REG_ATTRS (x) = NULL;
438 ORIGINAL_REGNO (x) = regno;
439 return x;
442 /* There are some RTL codes that require special attention; the generation
443 functions do the raw handling. If you add to this list, modify
444 special_rtx in gengenrtl.c as well. */
446 rtx_expr_list *
447 gen_rtx_EXPR_LIST (machine_mode mode, rtx expr, rtx expr_list)
449 return as_a <rtx_expr_list *> (gen_rtx_fmt_ee (EXPR_LIST, mode, expr,
450 expr_list));
453 rtx_insn_list *
454 gen_rtx_INSN_LIST (machine_mode mode, rtx insn, rtx insn_list)
456 return as_a <rtx_insn_list *> (gen_rtx_fmt_ue (INSN_LIST, mode, insn,
457 insn_list));
460 rtx_insn *
461 gen_rtx_INSN (machine_mode mode, rtx_insn *prev_insn, rtx_insn *next_insn,
462 basic_block bb, rtx pattern, int location, int code,
463 rtx reg_notes)
465 return as_a <rtx_insn *> (gen_rtx_fmt_uuBeiie (INSN, mode,
466 prev_insn, next_insn,
467 bb, pattern, location, code,
468 reg_notes));
472 gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
474 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
475 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
477 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
478 if (const_true_rtx && arg == STORE_FLAG_VALUE)
479 return const_true_rtx;
480 #endif
482 /* Look up the CONST_INT in the hash table. */
483 rtx *slot = const_int_htab->find_slot_with_hash (arg, (hashval_t) arg,
484 INSERT);
485 if (*slot == 0)
486 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
488 return *slot;
492 gen_int_mode (HOST_WIDE_INT c, machine_mode mode)
494 return GEN_INT (trunc_int_for_mode (c, mode));
497 /* CONST_DOUBLEs might be created from pairs of integers, or from
498 REAL_VALUE_TYPEs. Also, their length is known only at run time,
499 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
501 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
502 hash table. If so, return its counterpart; otherwise add it
503 to the hash table and return it. */
504 static rtx
505 lookup_const_double (rtx real)
507 rtx *slot = const_double_htab->find_slot (real, INSERT);
508 if (*slot == 0)
509 *slot = real;
511 return *slot;
514 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
515 VALUE in mode MODE. */
517 const_double_from_real_value (REAL_VALUE_TYPE value, machine_mode mode)
519 rtx real = rtx_alloc (CONST_DOUBLE);
520 PUT_MODE (real, mode);
522 real->u.rv = value;
524 return lookup_const_double (real);
527 /* Determine whether FIXED, a CONST_FIXED, already exists in the
528 hash table. If so, return its counterpart; otherwise add it
529 to the hash table and return it. */
531 static rtx
532 lookup_const_fixed (rtx fixed)
534 rtx *slot = const_fixed_htab->find_slot (fixed, INSERT);
535 if (*slot == 0)
536 *slot = fixed;
538 return *slot;
541 /* Return a CONST_FIXED rtx for a fixed-point value specified by
542 VALUE in mode MODE. */
545 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, machine_mode mode)
547 rtx fixed = rtx_alloc (CONST_FIXED);
548 PUT_MODE (fixed, mode);
550 fixed->u.fv = value;
552 return lookup_const_fixed (fixed);
555 #if TARGET_SUPPORTS_WIDE_INT == 0
556 /* Constructs double_int from rtx CST. */
558 double_int
559 rtx_to_double_int (const_rtx cst)
561 double_int r;
563 if (CONST_INT_P (cst))
564 r = double_int::from_shwi (INTVAL (cst));
565 else if (CONST_DOUBLE_AS_INT_P (cst))
567 r.low = CONST_DOUBLE_LOW (cst);
568 r.high = CONST_DOUBLE_HIGH (cst);
570 else
571 gcc_unreachable ();
573 return r;
575 #endif
577 #if TARGET_SUPPORTS_WIDE_INT
578 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
579 If so, return its counterpart; otherwise add it to the hash table and
580 return it. */
582 static rtx
583 lookup_const_wide_int (rtx wint)
585 rtx *slot = const_wide_int_htab->find_slot (wint, INSERT);
586 if (*slot == 0)
587 *slot = wint;
589 return *slot;
591 #endif
593 /* Return an rtx constant for V, given that the constant has mode MODE.
594 The returned rtx will be a CONST_INT if V fits, otherwise it will be
595 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
596 (if TARGET_SUPPORTS_WIDE_INT). */
599 immed_wide_int_const (const wide_int_ref &v, machine_mode mode)
601 unsigned int len = v.get_len ();
602 /* Not scalar_int_mode because we also allow pointer bound modes. */
603 unsigned int prec = GET_MODE_PRECISION (as_a <scalar_mode> (mode));
605 /* Allow truncation but not extension since we do not know if the
606 number is signed or unsigned. */
607 gcc_assert (prec <= v.get_precision ());
609 if (len < 2 || prec <= HOST_BITS_PER_WIDE_INT)
610 return gen_int_mode (v.elt (0), mode);
612 #if TARGET_SUPPORTS_WIDE_INT
614 unsigned int i;
615 rtx value;
616 unsigned int blocks_needed
617 = (prec + HOST_BITS_PER_WIDE_INT - 1) / HOST_BITS_PER_WIDE_INT;
619 if (len > blocks_needed)
620 len = blocks_needed;
622 value = const_wide_int_alloc (len);
624 /* It is so tempting to just put the mode in here. Must control
625 myself ... */
626 PUT_MODE (value, VOIDmode);
627 CWI_PUT_NUM_ELEM (value, len);
629 for (i = 0; i < len; i++)
630 CONST_WIDE_INT_ELT (value, i) = v.elt (i);
632 return lookup_const_wide_int (value);
634 #else
635 return immed_double_const (v.elt (0), v.elt (1), mode);
636 #endif
639 #if TARGET_SUPPORTS_WIDE_INT == 0
640 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
641 of ints: I0 is the low-order word and I1 is the high-order word.
642 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
643 implied upper bits are copies of the high bit of i1. The value
644 itself is neither signed nor unsigned. Do not use this routine for
645 non-integer modes; convert to REAL_VALUE_TYPE and use
646 const_double_from_real_value. */
649 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, machine_mode mode)
651 rtx value;
652 unsigned int i;
654 /* There are the following cases (note that there are no modes with
655 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
657 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
658 gen_int_mode.
659 2) If the value of the integer fits into HOST_WIDE_INT anyway
660 (i.e., i1 consists only from copies of the sign bit, and sign
661 of i0 and i1 are the same), then we return a CONST_INT for i0.
662 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
663 scalar_mode smode;
664 if (is_a <scalar_mode> (mode, &smode)
665 && GET_MODE_BITSIZE (smode) <= HOST_BITS_PER_WIDE_INT)
666 return gen_int_mode (i0, mode);
668 /* If this integer fits in one word, return a CONST_INT. */
669 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
670 return GEN_INT (i0);
672 /* We use VOIDmode for integers. */
673 value = rtx_alloc (CONST_DOUBLE);
674 PUT_MODE (value, VOIDmode);
676 CONST_DOUBLE_LOW (value) = i0;
677 CONST_DOUBLE_HIGH (value) = i1;
679 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
680 XWINT (value, i) = 0;
682 return lookup_const_double (value);
684 #endif
687 gen_rtx_REG (machine_mode mode, unsigned int regno)
689 /* In case the MD file explicitly references the frame pointer, have
690 all such references point to the same frame pointer. This is
691 used during frame pointer elimination to distinguish the explicit
692 references to these registers from pseudos that happened to be
693 assigned to them.
695 If we have eliminated the frame pointer or arg pointer, we will
696 be using it as a normal register, for example as a spill
697 register. In such cases, we might be accessing it in a mode that
698 is not Pmode and therefore cannot use the pre-allocated rtx.
700 Also don't do this when we are making new REGs in reload, since
701 we don't want to get confused with the real pointers. */
703 if (mode == Pmode && !reload_in_progress && !lra_in_progress)
705 if (regno == FRAME_POINTER_REGNUM
706 && (!reload_completed || frame_pointer_needed))
707 return frame_pointer_rtx;
709 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
710 && regno == HARD_FRAME_POINTER_REGNUM
711 && (!reload_completed || frame_pointer_needed))
712 return hard_frame_pointer_rtx;
713 #if !HARD_FRAME_POINTER_IS_ARG_POINTER
714 if (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
715 && regno == ARG_POINTER_REGNUM)
716 return arg_pointer_rtx;
717 #endif
718 #ifdef RETURN_ADDRESS_POINTER_REGNUM
719 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
720 return return_address_pointer_rtx;
721 #endif
722 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
723 && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
724 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
725 return pic_offset_table_rtx;
726 if (regno == STACK_POINTER_REGNUM)
727 return stack_pointer_rtx;
730 #if 0
731 /* If the per-function register table has been set up, try to re-use
732 an existing entry in that table to avoid useless generation of RTL.
734 This code is disabled for now until we can fix the various backends
735 which depend on having non-shared hard registers in some cases. Long
736 term we want to re-enable this code as it can significantly cut down
737 on the amount of useless RTL that gets generated.
739 We'll also need to fix some code that runs after reload that wants to
740 set ORIGINAL_REGNO. */
742 if (cfun
743 && cfun->emit
744 && regno_reg_rtx
745 && regno < FIRST_PSEUDO_REGISTER
746 && reg_raw_mode[regno] == mode)
747 return regno_reg_rtx[regno];
748 #endif
750 return gen_raw_REG (mode, regno);
754 gen_rtx_MEM (machine_mode mode, rtx addr)
756 rtx rt = gen_rtx_raw_MEM (mode, addr);
758 /* This field is not cleared by the mere allocation of the rtx, so
759 we clear it here. */
760 MEM_ATTRS (rt) = 0;
762 return rt;
765 /* Generate a memory referring to non-trapping constant memory. */
768 gen_const_mem (machine_mode mode, rtx addr)
770 rtx mem = gen_rtx_MEM (mode, addr);
771 MEM_READONLY_P (mem) = 1;
772 MEM_NOTRAP_P (mem) = 1;
773 return mem;
776 /* Generate a MEM referring to fixed portions of the frame, e.g., register
777 save areas. */
780 gen_frame_mem (machine_mode mode, rtx addr)
782 rtx mem = gen_rtx_MEM (mode, addr);
783 MEM_NOTRAP_P (mem) = 1;
784 set_mem_alias_set (mem, get_frame_alias_set ());
785 return mem;
788 /* Generate a MEM referring to a temporary use of the stack, not part
789 of the fixed stack frame. For example, something which is pushed
790 by a target splitter. */
792 gen_tmp_stack_mem (machine_mode mode, rtx addr)
794 rtx mem = gen_rtx_MEM (mode, addr);
795 MEM_NOTRAP_P (mem) = 1;
796 if (!cfun->calls_alloca)
797 set_mem_alias_set (mem, get_frame_alias_set ());
798 return mem;
801 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
802 this construct would be valid, and false otherwise. */
804 bool
805 validate_subreg (machine_mode omode, machine_mode imode,
806 const_rtx reg, unsigned int offset)
808 unsigned int isize = GET_MODE_SIZE (imode);
809 unsigned int osize = GET_MODE_SIZE (omode);
811 /* All subregs must be aligned. */
812 if (offset % osize != 0)
813 return false;
815 /* The subreg offset cannot be outside the inner object. */
816 if (offset >= isize)
817 return false;
819 /* ??? This should not be here. Temporarily continue to allow word_mode
820 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
821 Generally, backends are doing something sketchy but it'll take time to
822 fix them all. */
823 if (omode == word_mode)
825 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
826 is the culprit here, and not the backends. */
827 else if (osize >= UNITS_PER_WORD && isize >= osize)
829 /* Allow component subregs of complex and vector. Though given the below
830 extraction rules, it's not always clear what that means. */
831 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
832 && GET_MODE_INNER (imode) == omode)
834 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
835 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
836 represent this. It's questionable if this ought to be represented at
837 all -- why can't this all be hidden in post-reload splitters that make
838 arbitrarily mode changes to the registers themselves. */
839 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
841 /* Subregs involving floating point modes are not allowed to
842 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
843 (subreg:SI (reg:DF) 0) isn't. */
844 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
846 if (! (isize == osize
847 /* LRA can use subreg to store a floating point value in
848 an integer mode. Although the floating point and the
849 integer modes need the same number of hard registers,
850 the size of floating point mode can be less than the
851 integer mode. LRA also uses subregs for a register
852 should be used in different mode in on insn. */
853 || lra_in_progress))
854 return false;
857 /* Paradoxical subregs must have offset zero. */
858 if (osize > isize)
859 return offset == 0;
861 /* This is a normal subreg. Verify that the offset is representable. */
863 /* For hard registers, we already have most of these rules collected in
864 subreg_offset_representable_p. */
865 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
867 unsigned int regno = REGNO (reg);
869 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
870 && GET_MODE_INNER (imode) == omode)
872 else if (!REG_CAN_CHANGE_MODE_P (regno, imode, omode))
873 return false;
875 return subreg_offset_representable_p (regno, imode, offset, omode);
878 /* For pseudo registers, we want most of the same checks. Namely:
879 If the register no larger than a word, the subreg must be lowpart.
880 If the register is larger than a word, the subreg must be the lowpart
881 of a subword. A subreg does *not* perform arbitrary bit extraction.
882 Given that we've already checked mode/offset alignment, we only have
883 to check subword subregs here. */
884 if (osize < UNITS_PER_WORD
885 && ! (lra_in_progress && (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))))
887 machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
888 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
889 if (offset % UNITS_PER_WORD != low_off)
890 return false;
892 return true;
896 gen_rtx_SUBREG (machine_mode mode, rtx reg, int offset)
898 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
899 return gen_rtx_raw_SUBREG (mode, reg, offset);
902 /* Generate a SUBREG representing the least-significant part of REG if MODE
903 is smaller than mode of REG, otherwise paradoxical SUBREG. */
906 gen_lowpart_SUBREG (machine_mode mode, rtx reg)
908 machine_mode inmode;
910 inmode = GET_MODE (reg);
911 if (inmode == VOIDmode)
912 inmode = mode;
913 return gen_rtx_SUBREG (mode, reg,
914 subreg_lowpart_offset (mode, inmode));
918 gen_rtx_VAR_LOCATION (machine_mode mode, tree decl, rtx loc,
919 enum var_init_status status)
921 rtx x = gen_rtx_fmt_te (VAR_LOCATION, mode, decl, loc);
922 PAT_VAR_LOCATION_STATUS (x) = status;
923 return x;
927 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
929 rtvec
930 gen_rtvec (int n, ...)
932 int i;
933 rtvec rt_val;
934 va_list p;
936 va_start (p, n);
938 /* Don't allocate an empty rtvec... */
939 if (n == 0)
941 va_end (p);
942 return NULL_RTVEC;
945 rt_val = rtvec_alloc (n);
947 for (i = 0; i < n; i++)
948 rt_val->elem[i] = va_arg (p, rtx);
950 va_end (p);
951 return rt_val;
954 rtvec
955 gen_rtvec_v (int n, rtx *argp)
957 int i;
958 rtvec rt_val;
960 /* Don't allocate an empty rtvec... */
961 if (n == 0)
962 return NULL_RTVEC;
964 rt_val = rtvec_alloc (n);
966 for (i = 0; i < n; i++)
967 rt_val->elem[i] = *argp++;
969 return rt_val;
972 rtvec
973 gen_rtvec_v (int n, rtx_insn **argp)
975 int i;
976 rtvec rt_val;
978 /* Don't allocate an empty rtvec... */
979 if (n == 0)
980 return NULL_RTVEC;
982 rt_val = rtvec_alloc (n);
984 for (i = 0; i < n; i++)
985 rt_val->elem[i] = *argp++;
987 return rt_val;
991 /* Return the number of bytes between the start of an OUTER_MODE
992 in-memory value and the start of an INNER_MODE in-memory value,
993 given that the former is a lowpart of the latter. It may be a
994 paradoxical lowpart, in which case the offset will be negative
995 on big-endian targets. */
998 byte_lowpart_offset (machine_mode outer_mode,
999 machine_mode inner_mode)
1001 if (paradoxical_subreg_p (outer_mode, inner_mode))
1002 return -subreg_lowpart_offset (inner_mode, outer_mode);
1003 else
1004 return subreg_lowpart_offset (outer_mode, inner_mode);
1007 /* Return the offset of (subreg:OUTER_MODE (mem:INNER_MODE X) OFFSET)
1008 from address X. For paradoxical big-endian subregs this is a
1009 negative value, otherwise it's the same as OFFSET. */
1012 subreg_memory_offset (machine_mode outer_mode, machine_mode inner_mode,
1013 unsigned int offset)
1015 if (paradoxical_subreg_p (outer_mode, inner_mode))
1017 gcc_assert (offset == 0);
1018 return -subreg_lowpart_offset (inner_mode, outer_mode);
1020 return offset;
1023 /* As above, but return the offset that existing subreg X would have
1024 if SUBREG_REG (X) were stored in memory. The only significant thing
1025 about the current SUBREG_REG is its mode. */
1028 subreg_memory_offset (const_rtx x)
1030 return subreg_memory_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)),
1031 SUBREG_BYTE (x));
1034 /* Generate a REG rtx for a new pseudo register of mode MODE.
1035 This pseudo is assigned the next sequential register number. */
1038 gen_reg_rtx (machine_mode mode)
1040 rtx val;
1041 unsigned int align = GET_MODE_ALIGNMENT (mode);
1043 gcc_assert (can_create_pseudo_p ());
1045 /* If a virtual register with bigger mode alignment is generated,
1046 increase stack alignment estimation because it might be spilled
1047 to stack later. */
1048 if (SUPPORTS_STACK_ALIGNMENT
1049 && crtl->stack_alignment_estimated < align
1050 && !crtl->stack_realign_processed)
1052 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
1053 if (crtl->stack_alignment_estimated < min_align)
1054 crtl->stack_alignment_estimated = min_align;
1057 if (generating_concat_p
1058 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
1059 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
1061 /* For complex modes, don't make a single pseudo.
1062 Instead, make a CONCAT of two pseudos.
1063 This allows noncontiguous allocation of the real and imaginary parts,
1064 which makes much better code. Besides, allocating DCmode
1065 pseudos overstrains reload on some machines like the 386. */
1066 rtx realpart, imagpart;
1067 machine_mode partmode = GET_MODE_INNER (mode);
1069 realpart = gen_reg_rtx (partmode);
1070 imagpart = gen_reg_rtx (partmode);
1071 return gen_rtx_CONCAT (mode, realpart, imagpart);
1074 /* Do not call gen_reg_rtx with uninitialized crtl. */
1075 gcc_assert (crtl->emit.regno_pointer_align_length);
1077 crtl->emit.ensure_regno_capacity ();
1078 gcc_assert (reg_rtx_no < crtl->emit.regno_pointer_align_length);
1080 val = gen_raw_REG (mode, reg_rtx_no);
1081 regno_reg_rtx[reg_rtx_no++] = val;
1082 return val;
1085 /* Make sure m_regno_pointer_align, and regno_reg_rtx are large
1086 enough to have elements in the range 0 <= idx <= reg_rtx_no. */
1088 void
1089 emit_status::ensure_regno_capacity ()
1091 int old_size = regno_pointer_align_length;
1093 if (reg_rtx_no < old_size)
1094 return;
1096 int new_size = old_size * 2;
1097 while (reg_rtx_no >= new_size)
1098 new_size *= 2;
1100 char *tmp = XRESIZEVEC (char, regno_pointer_align, new_size);
1101 memset (tmp + old_size, 0, new_size - old_size);
1102 regno_pointer_align = (unsigned char *) tmp;
1104 rtx *new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, new_size);
1105 memset (new1 + old_size, 0, (new_size - old_size) * sizeof (rtx));
1106 regno_reg_rtx = new1;
1108 crtl->emit.regno_pointer_align_length = new_size;
1111 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1113 bool
1114 reg_is_parm_p (rtx reg)
1116 tree decl;
1118 gcc_assert (REG_P (reg));
1119 decl = REG_EXPR (reg);
1120 return (decl && TREE_CODE (decl) == PARM_DECL);
1123 /* Update NEW with the same attributes as REG, but with OFFSET added
1124 to the REG_OFFSET. */
1126 static void
1127 update_reg_offset (rtx new_rtx, rtx reg, int offset)
1129 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
1130 REG_OFFSET (reg) + offset);
1133 /* Generate a register with same attributes as REG, but with OFFSET
1134 added to the REG_OFFSET. */
1137 gen_rtx_REG_offset (rtx reg, machine_mode mode, unsigned int regno,
1138 int offset)
1140 rtx new_rtx = gen_rtx_REG (mode, regno);
1142 update_reg_offset (new_rtx, reg, offset);
1143 return new_rtx;
1146 /* Generate a new pseudo-register with the same attributes as REG, but
1147 with OFFSET added to the REG_OFFSET. */
1150 gen_reg_rtx_offset (rtx reg, machine_mode mode, int offset)
1152 rtx new_rtx = gen_reg_rtx (mode);
1154 update_reg_offset (new_rtx, reg, offset);
1155 return new_rtx;
1158 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1159 new register is a (possibly paradoxical) lowpart of the old one. */
1161 void
1162 adjust_reg_mode (rtx reg, machine_mode mode)
1164 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
1165 PUT_MODE (reg, mode);
1168 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1169 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1171 void
1172 set_reg_attrs_from_value (rtx reg, rtx x)
1174 int offset;
1175 bool can_be_reg_pointer = true;
1177 /* Don't call mark_reg_pointer for incompatible pointer sign
1178 extension. */
1179 while (GET_CODE (x) == SIGN_EXTEND
1180 || GET_CODE (x) == ZERO_EXTEND
1181 || GET_CODE (x) == TRUNCATE
1182 || (GET_CODE (x) == SUBREG && subreg_lowpart_p (x)))
1184 #if defined(POINTERS_EXTEND_UNSIGNED)
1185 if (((GET_CODE (x) == SIGN_EXTEND && POINTERS_EXTEND_UNSIGNED)
1186 || (GET_CODE (x) == ZERO_EXTEND && ! POINTERS_EXTEND_UNSIGNED)
1187 || (paradoxical_subreg_p (x)
1188 && ! (SUBREG_PROMOTED_VAR_P (x)
1189 && SUBREG_CHECK_PROMOTED_SIGN (x,
1190 POINTERS_EXTEND_UNSIGNED))))
1191 && !targetm.have_ptr_extend ())
1192 can_be_reg_pointer = false;
1193 #endif
1194 x = XEXP (x, 0);
1197 /* Hard registers can be reused for multiple purposes within the same
1198 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1199 on them is wrong. */
1200 if (HARD_REGISTER_P (reg))
1201 return;
1203 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
1204 if (MEM_P (x))
1206 if (MEM_OFFSET_KNOWN_P (x))
1207 REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
1208 MEM_OFFSET (x) + offset);
1209 if (can_be_reg_pointer && MEM_POINTER (x))
1210 mark_reg_pointer (reg, 0);
1212 else if (REG_P (x))
1214 if (REG_ATTRS (x))
1215 update_reg_offset (reg, x, offset);
1216 if (can_be_reg_pointer && REG_POINTER (x))
1217 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
1221 /* Generate a REG rtx for a new pseudo register, copying the mode
1222 and attributes from X. */
1225 gen_reg_rtx_and_attrs (rtx x)
1227 rtx reg = gen_reg_rtx (GET_MODE (x));
1228 set_reg_attrs_from_value (reg, x);
1229 return reg;
1232 /* Set the register attributes for registers contained in PARM_RTX.
1233 Use needed values from memory attributes of MEM. */
1235 void
1236 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1238 if (REG_P (parm_rtx))
1239 set_reg_attrs_from_value (parm_rtx, mem);
1240 else if (GET_CODE (parm_rtx) == PARALLEL)
1242 /* Check for a NULL entry in the first slot, used to indicate that the
1243 parameter goes both on the stack and in registers. */
1244 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1245 for (; i < XVECLEN (parm_rtx, 0); i++)
1247 rtx x = XVECEXP (parm_rtx, 0, i);
1248 if (REG_P (XEXP (x, 0)))
1249 REG_ATTRS (XEXP (x, 0))
1250 = get_reg_attrs (MEM_EXPR (mem),
1251 INTVAL (XEXP (x, 1)));
1256 /* Set the REG_ATTRS for registers in value X, given that X represents
1257 decl T. */
1259 void
1260 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1262 if (!t)
1263 return;
1264 tree tdecl = t;
1265 if (GET_CODE (x) == SUBREG)
1267 gcc_assert (subreg_lowpart_p (x));
1268 x = SUBREG_REG (x);
1270 if (REG_P (x))
1271 REG_ATTRS (x)
1272 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1273 DECL_P (tdecl)
1274 ? DECL_MODE (tdecl)
1275 : TYPE_MODE (TREE_TYPE (tdecl))));
1276 if (GET_CODE (x) == CONCAT)
1278 if (REG_P (XEXP (x, 0)))
1279 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1280 if (REG_P (XEXP (x, 1)))
1281 REG_ATTRS (XEXP (x, 1))
1282 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1284 if (GET_CODE (x) == PARALLEL)
1286 int i, start;
1288 /* Check for a NULL entry, used to indicate that the parameter goes
1289 both on the stack and in registers. */
1290 if (XEXP (XVECEXP (x, 0, 0), 0))
1291 start = 0;
1292 else
1293 start = 1;
1295 for (i = start; i < XVECLEN (x, 0); i++)
1297 rtx y = XVECEXP (x, 0, i);
1298 if (REG_P (XEXP (y, 0)))
1299 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1304 /* Assign the RTX X to declaration T. */
1306 void
1307 set_decl_rtl (tree t, rtx x)
1309 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1310 if (x)
1311 set_reg_attrs_for_decl_rtl (t, x);
1314 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1315 if the ABI requires the parameter to be passed by reference. */
1317 void
1318 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1320 DECL_INCOMING_RTL (t) = x;
1321 if (x && !by_reference_p)
1322 set_reg_attrs_for_decl_rtl (t, x);
1325 /* Identify REG (which may be a CONCAT) as a user register. */
1327 void
1328 mark_user_reg (rtx reg)
1330 if (GET_CODE (reg) == CONCAT)
1332 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1333 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1335 else
1337 gcc_assert (REG_P (reg));
1338 REG_USERVAR_P (reg) = 1;
1342 /* Identify REG as a probable pointer register and show its alignment
1343 as ALIGN, if nonzero. */
1345 void
1346 mark_reg_pointer (rtx reg, int align)
1348 if (! REG_POINTER (reg))
1350 REG_POINTER (reg) = 1;
1352 if (align)
1353 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1355 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1356 /* We can no-longer be sure just how aligned this pointer is. */
1357 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1360 /* Return 1 plus largest pseudo reg number used in the current function. */
1363 max_reg_num (void)
1365 return reg_rtx_no;
1368 /* Return 1 + the largest label number used so far in the current function. */
1371 max_label_num (void)
1373 return label_num;
1376 /* Return first label number used in this function (if any were used). */
1379 get_first_label_num (void)
1381 return first_label_num;
1384 /* If the rtx for label was created during the expansion of a nested
1385 function, then first_label_num won't include this label number.
1386 Fix this now so that array indices work later. */
1388 void
1389 maybe_set_first_label_num (rtx_code_label *x)
1391 if (CODE_LABEL_NUMBER (x) < first_label_num)
1392 first_label_num = CODE_LABEL_NUMBER (x);
1395 /* For use by the RTL function loader, when mingling with normal
1396 functions.
1397 Ensure that label_num is greater than the label num of X, to avoid
1398 duplicate labels in the generated assembler. */
1400 void
1401 maybe_set_max_label_num (rtx_code_label *x)
1403 if (CODE_LABEL_NUMBER (x) >= label_num)
1404 label_num = CODE_LABEL_NUMBER (x) + 1;
1408 /* Return a value representing some low-order bits of X, where the number
1409 of low-order bits is given by MODE. Note that no conversion is done
1410 between floating-point and fixed-point values, rather, the bit
1411 representation is returned.
1413 This function handles the cases in common between gen_lowpart, below,
1414 and two variants in cse.c and combine.c. These are the cases that can
1415 be safely handled at all points in the compilation.
1417 If this is not a case we can handle, return 0. */
1420 gen_lowpart_common (machine_mode mode, rtx x)
1422 int msize = GET_MODE_SIZE (mode);
1423 int xsize;
1424 machine_mode innermode;
1426 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1427 so we have to make one up. Yuk. */
1428 innermode = GET_MODE (x);
1429 if (CONST_INT_P (x)
1430 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1431 innermode = int_mode_for_size (HOST_BITS_PER_WIDE_INT, 0).require ();
1432 else if (innermode == VOIDmode)
1433 innermode = int_mode_for_size (HOST_BITS_PER_DOUBLE_INT, 0).require ();
1435 xsize = GET_MODE_SIZE (innermode);
1437 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1439 if (innermode == mode)
1440 return x;
1442 /* MODE must occupy no more words than the mode of X. */
1443 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1444 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1445 return 0;
1447 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1448 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1449 return 0;
1451 scalar_int_mode int_mode, int_innermode, from_mode;
1452 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1453 && is_a <scalar_int_mode> (mode, &int_mode)
1454 && is_a <scalar_int_mode> (innermode, &int_innermode)
1455 && is_a <scalar_int_mode> (GET_MODE (XEXP (x, 0)), &from_mode))
1457 /* If we are getting the low-order part of something that has been
1458 sign- or zero-extended, we can either just use the object being
1459 extended or make a narrower extension. If we want an even smaller
1460 piece than the size of the object being extended, call ourselves
1461 recursively.
1463 This case is used mostly by combine and cse. */
1465 if (from_mode == int_mode)
1466 return XEXP (x, 0);
1467 else if (GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (from_mode))
1468 return gen_lowpart_common (int_mode, XEXP (x, 0));
1469 else if (GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (int_innermode))
1470 return gen_rtx_fmt_e (GET_CODE (x), int_mode, XEXP (x, 0));
1472 else if (GET_CODE (x) == SUBREG || REG_P (x)
1473 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1474 || CONST_DOUBLE_AS_FLOAT_P (x) || CONST_SCALAR_INT_P (x))
1475 return lowpart_subreg (mode, x, innermode);
1477 /* Otherwise, we can't do this. */
1478 return 0;
1482 gen_highpart (machine_mode mode, rtx x)
1484 unsigned int msize = GET_MODE_SIZE (mode);
1485 rtx result;
1487 /* This case loses if X is a subreg. To catch bugs early,
1488 complain if an invalid MODE is used even in other cases. */
1489 gcc_assert (msize <= UNITS_PER_WORD
1490 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1492 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1493 subreg_highpart_offset (mode, GET_MODE (x)));
1494 gcc_assert (result);
1496 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1497 the target if we have a MEM. gen_highpart must return a valid operand,
1498 emitting code if necessary to do so. */
1499 if (MEM_P (result))
1501 result = validize_mem (result);
1502 gcc_assert (result);
1505 return result;
1508 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1509 be VOIDmode constant. */
1511 gen_highpart_mode (machine_mode outermode, machine_mode innermode, rtx exp)
1513 if (GET_MODE (exp) != VOIDmode)
1515 gcc_assert (GET_MODE (exp) == innermode);
1516 return gen_highpart (outermode, exp);
1518 return simplify_gen_subreg (outermode, exp, innermode,
1519 subreg_highpart_offset (outermode, innermode));
1522 /* Return the SUBREG_BYTE for a lowpart subreg whose outer mode has
1523 OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1525 unsigned int
1526 subreg_size_lowpart_offset (unsigned int outer_bytes, unsigned int inner_bytes)
1528 if (outer_bytes > inner_bytes)
1529 /* Paradoxical subregs always have a SUBREG_BYTE of 0. */
1530 return 0;
1532 if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1533 return inner_bytes - outer_bytes;
1534 else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1535 return 0;
1536 else
1537 return subreg_size_offset_from_lsb (outer_bytes, inner_bytes, 0);
1540 /* Return the SUBREG_BYTE for a highpart subreg whose outer mode has
1541 OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1543 unsigned int
1544 subreg_size_highpart_offset (unsigned int outer_bytes,
1545 unsigned int inner_bytes)
1547 gcc_assert (inner_bytes >= outer_bytes);
1549 if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1550 return 0;
1551 else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1552 return inner_bytes - outer_bytes;
1553 else
1554 return subreg_size_offset_from_lsb (outer_bytes, inner_bytes,
1555 (inner_bytes - outer_bytes)
1556 * BITS_PER_UNIT);
1559 /* Return 1 iff X, assumed to be a SUBREG,
1560 refers to the least significant part of its containing reg.
1561 If X is not a SUBREG, always return 1 (it is its own low part!). */
1564 subreg_lowpart_p (const_rtx x)
1566 if (GET_CODE (x) != SUBREG)
1567 return 1;
1568 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1569 return 0;
1571 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1572 == SUBREG_BYTE (x));
1575 /* Return subword OFFSET of operand OP.
1576 The word number, OFFSET, is interpreted as the word number starting
1577 at the low-order address. OFFSET 0 is the low-order word if not
1578 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1580 If we cannot extract the required word, we return zero. Otherwise,
1581 an rtx corresponding to the requested word will be returned.
1583 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1584 reload has completed, a valid address will always be returned. After
1585 reload, if a valid address cannot be returned, we return zero.
1587 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1588 it is the responsibility of the caller.
1590 MODE is the mode of OP in case it is a CONST_INT.
1592 ??? This is still rather broken for some cases. The problem for the
1593 moment is that all callers of this thing provide no 'goal mode' to
1594 tell us to work with. This exists because all callers were written
1595 in a word based SUBREG world.
1596 Now use of this function can be deprecated by simplify_subreg in most
1597 cases.
1601 operand_subword (rtx op, unsigned int offset, int validate_address, machine_mode mode)
1603 if (mode == VOIDmode)
1604 mode = GET_MODE (op);
1606 gcc_assert (mode != VOIDmode);
1608 /* If OP is narrower than a word, fail. */
1609 if (mode != BLKmode
1610 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1611 return 0;
1613 /* If we want a word outside OP, return zero. */
1614 if (mode != BLKmode
1615 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1616 return const0_rtx;
1618 /* Form a new MEM at the requested address. */
1619 if (MEM_P (op))
1621 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1623 if (! validate_address)
1624 return new_rtx;
1626 else if (reload_completed)
1628 if (! strict_memory_address_addr_space_p (word_mode,
1629 XEXP (new_rtx, 0),
1630 MEM_ADDR_SPACE (op)))
1631 return 0;
1633 else
1634 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1637 /* Rest can be handled by simplify_subreg. */
1638 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1641 /* Similar to `operand_subword', but never return 0. If we can't
1642 extract the required subword, put OP into a register and try again.
1643 The second attempt must succeed. We always validate the address in
1644 this case.
1646 MODE is the mode of OP, in case it is CONST_INT. */
1649 operand_subword_force (rtx op, unsigned int offset, machine_mode mode)
1651 rtx result = operand_subword (op, offset, 1, mode);
1653 if (result)
1654 return result;
1656 if (mode != BLKmode && mode != VOIDmode)
1658 /* If this is a register which can not be accessed by words, copy it
1659 to a pseudo register. */
1660 if (REG_P (op))
1661 op = copy_to_reg (op);
1662 else
1663 op = force_reg (mode, op);
1666 result = operand_subword (op, offset, 1, mode);
1667 gcc_assert (result);
1669 return result;
1672 /* Returns 1 if both MEM_EXPR can be considered equal
1673 and 0 otherwise. */
1676 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1678 if (expr1 == expr2)
1679 return 1;
1681 if (! expr1 || ! expr2)
1682 return 0;
1684 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1685 return 0;
1687 return operand_equal_p (expr1, expr2, 0);
1690 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1691 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1692 -1 if not known. */
1695 get_mem_align_offset (rtx mem, unsigned int align)
1697 tree expr;
1698 unsigned HOST_WIDE_INT offset;
1700 /* This function can't use
1701 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1702 || (MAX (MEM_ALIGN (mem),
1703 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1704 < align))
1705 return -1;
1706 else
1707 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1708 for two reasons:
1709 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1710 for <variable>. get_inner_reference doesn't handle it and
1711 even if it did, the alignment in that case needs to be determined
1712 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1713 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1714 isn't sufficiently aligned, the object it is in might be. */
1715 gcc_assert (MEM_P (mem));
1716 expr = MEM_EXPR (mem);
1717 if (expr == NULL_TREE || !MEM_OFFSET_KNOWN_P (mem))
1718 return -1;
1720 offset = MEM_OFFSET (mem);
1721 if (DECL_P (expr))
1723 if (DECL_ALIGN (expr) < align)
1724 return -1;
1726 else if (INDIRECT_REF_P (expr))
1728 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1729 return -1;
1731 else if (TREE_CODE (expr) == COMPONENT_REF)
1733 while (1)
1735 tree inner = TREE_OPERAND (expr, 0);
1736 tree field = TREE_OPERAND (expr, 1);
1737 tree byte_offset = component_ref_field_offset (expr);
1738 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1740 if (!byte_offset
1741 || !tree_fits_uhwi_p (byte_offset)
1742 || !tree_fits_uhwi_p (bit_offset))
1743 return -1;
1745 offset += tree_to_uhwi (byte_offset);
1746 offset += tree_to_uhwi (bit_offset) / BITS_PER_UNIT;
1748 if (inner == NULL_TREE)
1750 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1751 < (unsigned int) align)
1752 return -1;
1753 break;
1755 else if (DECL_P (inner))
1757 if (DECL_ALIGN (inner) < align)
1758 return -1;
1759 break;
1761 else if (TREE_CODE (inner) != COMPONENT_REF)
1762 return -1;
1763 expr = inner;
1766 else
1767 return -1;
1769 return offset & ((align / BITS_PER_UNIT) - 1);
1772 /* Given REF (a MEM) and T, either the type of X or the expression
1773 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1774 if we are making a new object of this type. BITPOS is nonzero if
1775 there is an offset outstanding on T that will be applied later. */
1777 void
1778 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1779 HOST_WIDE_INT bitpos)
1781 HOST_WIDE_INT apply_bitpos = 0;
1782 tree type;
1783 struct mem_attrs attrs, *defattrs, *refattrs;
1784 addr_space_t as;
1786 /* It can happen that type_for_mode was given a mode for which there
1787 is no language-level type. In which case it returns NULL, which
1788 we can see here. */
1789 if (t == NULL_TREE)
1790 return;
1792 type = TYPE_P (t) ? t : TREE_TYPE (t);
1793 if (type == error_mark_node)
1794 return;
1796 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1797 wrong answer, as it assumes that DECL_RTL already has the right alias
1798 info. Callers should not set DECL_RTL until after the call to
1799 set_mem_attributes. */
1800 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1802 memset (&attrs, 0, sizeof (attrs));
1804 /* Get the alias set from the expression or type (perhaps using a
1805 front-end routine) and use it. */
1806 attrs.alias = get_alias_set (t);
1808 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1809 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1811 /* Default values from pre-existing memory attributes if present. */
1812 refattrs = MEM_ATTRS (ref);
1813 if (refattrs)
1815 /* ??? Can this ever happen? Calling this routine on a MEM that
1816 already carries memory attributes should probably be invalid. */
1817 attrs.expr = refattrs->expr;
1818 attrs.offset_known_p = refattrs->offset_known_p;
1819 attrs.offset = refattrs->offset;
1820 attrs.size_known_p = refattrs->size_known_p;
1821 attrs.size = refattrs->size;
1822 attrs.align = refattrs->align;
1825 /* Otherwise, default values from the mode of the MEM reference. */
1826 else
1828 defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
1829 gcc_assert (!defattrs->expr);
1830 gcc_assert (!defattrs->offset_known_p);
1832 /* Respect mode size. */
1833 attrs.size_known_p = defattrs->size_known_p;
1834 attrs.size = defattrs->size;
1835 /* ??? Is this really necessary? We probably should always get
1836 the size from the type below. */
1838 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1839 if T is an object, always compute the object alignment below. */
1840 if (TYPE_P (t))
1841 attrs.align = defattrs->align;
1842 else
1843 attrs.align = BITS_PER_UNIT;
1844 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1845 e.g. if the type carries an alignment attribute. Should we be
1846 able to simply always use TYPE_ALIGN? */
1849 /* We can set the alignment from the type if we are making an object or if
1850 this is an INDIRECT_REF. */
1851 if (objectp || TREE_CODE (t) == INDIRECT_REF)
1852 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1854 /* If the size is known, we can set that. */
1855 tree new_size = TYPE_SIZE_UNIT (type);
1857 /* The address-space is that of the type. */
1858 as = TYPE_ADDR_SPACE (type);
1860 /* If T is not a type, we may be able to deduce some more information about
1861 the expression. */
1862 if (! TYPE_P (t))
1864 tree base;
1866 if (TREE_THIS_VOLATILE (t))
1867 MEM_VOLATILE_P (ref) = 1;
1869 /* Now remove any conversions: they don't change what the underlying
1870 object is. Likewise for SAVE_EXPR. */
1871 while (CONVERT_EXPR_P (t)
1872 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1873 || TREE_CODE (t) == SAVE_EXPR)
1874 t = TREE_OPERAND (t, 0);
1876 /* Note whether this expression can trap. */
1877 MEM_NOTRAP_P (ref) = !tree_could_trap_p (t);
1879 base = get_base_address (t);
1880 if (base)
1882 if (DECL_P (base)
1883 && TREE_READONLY (base)
1884 && (TREE_STATIC (base) || DECL_EXTERNAL (base))
1885 && !TREE_THIS_VOLATILE (base))
1886 MEM_READONLY_P (ref) = 1;
1888 /* Mark static const strings readonly as well. */
1889 if (TREE_CODE (base) == STRING_CST
1890 && TREE_READONLY (base)
1891 && TREE_STATIC (base))
1892 MEM_READONLY_P (ref) = 1;
1894 /* Address-space information is on the base object. */
1895 if (TREE_CODE (base) == MEM_REF
1896 || TREE_CODE (base) == TARGET_MEM_REF)
1897 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base,
1898 0))));
1899 else
1900 as = TYPE_ADDR_SPACE (TREE_TYPE (base));
1903 /* If this expression uses it's parent's alias set, mark it such
1904 that we won't change it. */
1905 if (component_uses_parent_alias_set_from (t) != NULL_TREE)
1906 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1908 /* If this is a decl, set the attributes of the MEM from it. */
1909 if (DECL_P (t))
1911 attrs.expr = t;
1912 attrs.offset_known_p = true;
1913 attrs.offset = 0;
1914 apply_bitpos = bitpos;
1915 new_size = DECL_SIZE_UNIT (t);
1918 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1919 else if (CONSTANT_CLASS_P (t))
1922 /* If this is a field reference, record it. */
1923 else if (TREE_CODE (t) == COMPONENT_REF)
1925 attrs.expr = t;
1926 attrs.offset_known_p = true;
1927 attrs.offset = 0;
1928 apply_bitpos = bitpos;
1929 if (DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1930 new_size = DECL_SIZE_UNIT (TREE_OPERAND (t, 1));
1933 /* If this is an array reference, look for an outer field reference. */
1934 else if (TREE_CODE (t) == ARRAY_REF)
1936 tree off_tree = size_zero_node;
1937 /* We can't modify t, because we use it at the end of the
1938 function. */
1939 tree t2 = t;
1943 tree index = TREE_OPERAND (t2, 1);
1944 tree low_bound = array_ref_low_bound (t2);
1945 tree unit_size = array_ref_element_size (t2);
1947 /* We assume all arrays have sizes that are a multiple of a byte.
1948 First subtract the lower bound, if any, in the type of the
1949 index, then convert to sizetype and multiply by the size of
1950 the array element. */
1951 if (! integer_zerop (low_bound))
1952 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1953 index, low_bound);
1955 off_tree = size_binop (PLUS_EXPR,
1956 size_binop (MULT_EXPR,
1957 fold_convert (sizetype,
1958 index),
1959 unit_size),
1960 off_tree);
1961 t2 = TREE_OPERAND (t2, 0);
1963 while (TREE_CODE (t2) == ARRAY_REF);
1965 if (DECL_P (t2)
1966 || (TREE_CODE (t2) == COMPONENT_REF
1967 /* For trailing arrays t2 doesn't have a size that
1968 covers all valid accesses. */
1969 && ! array_at_struct_end_p (t)))
1971 attrs.expr = t2;
1972 attrs.offset_known_p = false;
1973 if (tree_fits_uhwi_p (off_tree))
1975 attrs.offset_known_p = true;
1976 attrs.offset = tree_to_uhwi (off_tree);
1977 apply_bitpos = bitpos;
1980 /* Else do not record a MEM_EXPR. */
1983 /* If this is an indirect reference, record it. */
1984 else if (TREE_CODE (t) == MEM_REF
1985 || TREE_CODE (t) == TARGET_MEM_REF)
1987 attrs.expr = t;
1988 attrs.offset_known_p = true;
1989 attrs.offset = 0;
1990 apply_bitpos = bitpos;
1993 /* Compute the alignment. */
1994 unsigned int obj_align;
1995 unsigned HOST_WIDE_INT obj_bitpos;
1996 get_object_alignment_1 (t, &obj_align, &obj_bitpos);
1997 obj_bitpos = (obj_bitpos - bitpos) & (obj_align - 1);
1998 if (obj_bitpos != 0)
1999 obj_align = least_bit_hwi (obj_bitpos);
2000 attrs.align = MAX (attrs.align, obj_align);
2003 if (tree_fits_uhwi_p (new_size))
2005 attrs.size_known_p = true;
2006 attrs.size = tree_to_uhwi (new_size);
2009 /* If we modified OFFSET based on T, then subtract the outstanding
2010 bit position offset. Similarly, increase the size of the accessed
2011 object to contain the negative offset. */
2012 if (apply_bitpos)
2014 gcc_assert (attrs.offset_known_p);
2015 attrs.offset -= apply_bitpos / BITS_PER_UNIT;
2016 if (attrs.size_known_p)
2017 attrs.size += apply_bitpos / BITS_PER_UNIT;
2020 /* Now set the attributes we computed above. */
2021 attrs.addrspace = as;
2022 set_mem_attrs (ref, &attrs);
2025 void
2026 set_mem_attributes (rtx ref, tree t, int objectp)
2028 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2031 /* Set the alias set of MEM to SET. */
2033 void
2034 set_mem_alias_set (rtx mem, alias_set_type set)
2036 struct mem_attrs attrs;
2038 /* If the new and old alias sets don't conflict, something is wrong. */
2039 gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
2040 attrs = *get_mem_attrs (mem);
2041 attrs.alias = set;
2042 set_mem_attrs (mem, &attrs);
2045 /* Set the address space of MEM to ADDRSPACE (target-defined). */
2047 void
2048 set_mem_addr_space (rtx mem, addr_space_t addrspace)
2050 struct mem_attrs attrs;
2052 attrs = *get_mem_attrs (mem);
2053 attrs.addrspace = addrspace;
2054 set_mem_attrs (mem, &attrs);
2057 /* Set the alignment of MEM to ALIGN bits. */
2059 void
2060 set_mem_align (rtx mem, unsigned int align)
2062 struct mem_attrs attrs;
2064 attrs = *get_mem_attrs (mem);
2065 attrs.align = align;
2066 set_mem_attrs (mem, &attrs);
2069 /* Set the expr for MEM to EXPR. */
2071 void
2072 set_mem_expr (rtx mem, tree expr)
2074 struct mem_attrs attrs;
2076 attrs = *get_mem_attrs (mem);
2077 attrs.expr = expr;
2078 set_mem_attrs (mem, &attrs);
2081 /* Set the offset of MEM to OFFSET. */
2083 void
2084 set_mem_offset (rtx mem, HOST_WIDE_INT offset)
2086 struct mem_attrs attrs;
2088 attrs = *get_mem_attrs (mem);
2089 attrs.offset_known_p = true;
2090 attrs.offset = offset;
2091 set_mem_attrs (mem, &attrs);
2094 /* Clear the offset of MEM. */
2096 void
2097 clear_mem_offset (rtx mem)
2099 struct mem_attrs attrs;
2101 attrs = *get_mem_attrs (mem);
2102 attrs.offset_known_p = false;
2103 set_mem_attrs (mem, &attrs);
2106 /* Set the size of MEM to SIZE. */
2108 void
2109 set_mem_size (rtx mem, HOST_WIDE_INT size)
2111 struct mem_attrs attrs;
2113 attrs = *get_mem_attrs (mem);
2114 attrs.size_known_p = true;
2115 attrs.size = size;
2116 set_mem_attrs (mem, &attrs);
2119 /* Clear the size of MEM. */
2121 void
2122 clear_mem_size (rtx mem)
2124 struct mem_attrs attrs;
2126 attrs = *get_mem_attrs (mem);
2127 attrs.size_known_p = false;
2128 set_mem_attrs (mem, &attrs);
2131 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2132 and its address changed to ADDR. (VOIDmode means don't change the mode.
2133 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2134 returned memory location is required to be valid. INPLACE is true if any
2135 changes can be made directly to MEMREF or false if MEMREF must be treated
2136 as immutable.
2138 The memory attributes are not changed. */
2140 static rtx
2141 change_address_1 (rtx memref, machine_mode mode, rtx addr, int validate,
2142 bool inplace)
2144 addr_space_t as;
2145 rtx new_rtx;
2147 gcc_assert (MEM_P (memref));
2148 as = MEM_ADDR_SPACE (memref);
2149 if (mode == VOIDmode)
2150 mode = GET_MODE (memref);
2151 if (addr == 0)
2152 addr = XEXP (memref, 0);
2153 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
2154 && (!validate || memory_address_addr_space_p (mode, addr, as)))
2155 return memref;
2157 /* Don't validate address for LRA. LRA can make the address valid
2158 by itself in most efficient way. */
2159 if (validate && !lra_in_progress)
2161 if (reload_in_progress || reload_completed)
2162 gcc_assert (memory_address_addr_space_p (mode, addr, as));
2163 else
2164 addr = memory_address_addr_space (mode, addr, as);
2167 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2168 return memref;
2170 if (inplace)
2172 XEXP (memref, 0) = addr;
2173 return memref;
2176 new_rtx = gen_rtx_MEM (mode, addr);
2177 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2178 return new_rtx;
2181 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2182 way we are changing MEMREF, so we only preserve the alias set. */
2185 change_address (rtx memref, machine_mode mode, rtx addr)
2187 rtx new_rtx = change_address_1 (memref, mode, addr, 1, false);
2188 machine_mode mmode = GET_MODE (new_rtx);
2189 struct mem_attrs attrs, *defattrs;
2191 attrs = *get_mem_attrs (memref);
2192 defattrs = mode_mem_attrs[(int) mmode];
2193 attrs.expr = NULL_TREE;
2194 attrs.offset_known_p = false;
2195 attrs.size_known_p = defattrs->size_known_p;
2196 attrs.size = defattrs->size;
2197 attrs.align = defattrs->align;
2199 /* If there are no changes, just return the original memory reference. */
2200 if (new_rtx == memref)
2202 if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
2203 return new_rtx;
2205 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
2206 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2209 set_mem_attrs (new_rtx, &attrs);
2210 return new_rtx;
2213 /* Return a memory reference like MEMREF, but with its mode changed
2214 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2215 nonzero, the memory address is forced to be valid.
2216 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2217 and the caller is responsible for adjusting MEMREF base register.
2218 If ADJUST_OBJECT is zero, the underlying object associated with the
2219 memory reference is left unchanged and the caller is responsible for
2220 dealing with it. Otherwise, if the new memory reference is outside
2221 the underlying object, even partially, then the object is dropped.
2222 SIZE, if nonzero, is the size of an access in cases where MODE
2223 has no inherent size. */
2226 adjust_address_1 (rtx memref, machine_mode mode, HOST_WIDE_INT offset,
2227 int validate, int adjust_address, int adjust_object,
2228 HOST_WIDE_INT size)
2230 rtx addr = XEXP (memref, 0);
2231 rtx new_rtx;
2232 scalar_int_mode address_mode;
2233 int pbits;
2234 struct mem_attrs attrs = *get_mem_attrs (memref), *defattrs;
2235 unsigned HOST_WIDE_INT max_align;
2236 #ifdef POINTERS_EXTEND_UNSIGNED
2237 scalar_int_mode pointer_mode
2238 = targetm.addr_space.pointer_mode (attrs.addrspace);
2239 #endif
2241 /* VOIDmode means no mode change for change_address_1. */
2242 if (mode == VOIDmode)
2243 mode = GET_MODE (memref);
2245 /* Take the size of non-BLKmode accesses from the mode. */
2246 defattrs = mode_mem_attrs[(int) mode];
2247 if (defattrs->size_known_p)
2248 size = defattrs->size;
2250 /* If there are no changes, just return the original memory reference. */
2251 if (mode == GET_MODE (memref) && !offset
2252 && (size == 0 || (attrs.size_known_p && attrs.size == size))
2253 && (!validate || memory_address_addr_space_p (mode, addr,
2254 attrs.addrspace)))
2255 return memref;
2257 /* ??? Prefer to create garbage instead of creating shared rtl.
2258 This may happen even if offset is nonzero -- consider
2259 (plus (plus reg reg) const_int) -- so do this always. */
2260 addr = copy_rtx (addr);
2262 /* Convert a possibly large offset to a signed value within the
2263 range of the target address space. */
2264 address_mode = get_address_mode (memref);
2265 pbits = GET_MODE_BITSIZE (address_mode);
2266 if (HOST_BITS_PER_WIDE_INT > pbits)
2268 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2269 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2270 >> shift);
2273 if (adjust_address)
2275 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2276 object, we can merge it into the LO_SUM. */
2277 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2278 && offset >= 0
2279 && (unsigned HOST_WIDE_INT) offset
2280 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2281 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2282 plus_constant (address_mode,
2283 XEXP (addr, 1), offset));
2284 #ifdef POINTERS_EXTEND_UNSIGNED
2285 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2286 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2287 the fact that pointers are not allowed to overflow. */
2288 else if (POINTERS_EXTEND_UNSIGNED > 0
2289 && GET_CODE (addr) == ZERO_EXTEND
2290 && GET_MODE (XEXP (addr, 0)) == pointer_mode
2291 && trunc_int_for_mode (offset, pointer_mode) == offset)
2292 addr = gen_rtx_ZERO_EXTEND (address_mode,
2293 plus_constant (pointer_mode,
2294 XEXP (addr, 0), offset));
2295 #endif
2296 else
2297 addr = plus_constant (address_mode, addr, offset);
2300 new_rtx = change_address_1 (memref, mode, addr, validate, false);
2302 /* If the address is a REG, change_address_1 rightfully returns memref,
2303 but this would destroy memref's MEM_ATTRS. */
2304 if (new_rtx == memref && offset != 0)
2305 new_rtx = copy_rtx (new_rtx);
2307 /* Conservatively drop the object if we don't know where we start from. */
2308 if (adjust_object && (!attrs.offset_known_p || !attrs.size_known_p))
2310 attrs.expr = NULL_TREE;
2311 attrs.alias = 0;
2314 /* Compute the new values of the memory attributes due to this adjustment.
2315 We add the offsets and update the alignment. */
2316 if (attrs.offset_known_p)
2318 attrs.offset += offset;
2320 /* Drop the object if the new left end is not within its bounds. */
2321 if (adjust_object && attrs.offset < 0)
2323 attrs.expr = NULL_TREE;
2324 attrs.alias = 0;
2328 /* Compute the new alignment by taking the MIN of the alignment and the
2329 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2330 if zero. */
2331 if (offset != 0)
2333 max_align = least_bit_hwi (offset) * BITS_PER_UNIT;
2334 attrs.align = MIN (attrs.align, max_align);
2337 if (size)
2339 /* Drop the object if the new right end is not within its bounds. */
2340 if (adjust_object && (offset + size) > attrs.size)
2342 attrs.expr = NULL_TREE;
2343 attrs.alias = 0;
2345 attrs.size_known_p = true;
2346 attrs.size = size;
2348 else if (attrs.size_known_p)
2350 gcc_assert (!adjust_object);
2351 attrs.size -= offset;
2352 /* ??? The store_by_pieces machinery generates negative sizes,
2353 so don't assert for that here. */
2356 set_mem_attrs (new_rtx, &attrs);
2358 return new_rtx;
2361 /* Return a memory reference like MEMREF, but with its mode changed
2362 to MODE and its address changed to ADDR, which is assumed to be
2363 MEMREF offset by OFFSET bytes. If VALIDATE is
2364 nonzero, the memory address is forced to be valid. */
2367 adjust_automodify_address_1 (rtx memref, machine_mode mode, rtx addr,
2368 HOST_WIDE_INT offset, int validate)
2370 memref = change_address_1 (memref, VOIDmode, addr, validate, false);
2371 return adjust_address_1 (memref, mode, offset, validate, 0, 0, 0);
2374 /* Return a memory reference like MEMREF, but whose address is changed by
2375 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2376 known to be in OFFSET (possibly 1). */
2379 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2381 rtx new_rtx, addr = XEXP (memref, 0);
2382 machine_mode address_mode;
2383 struct mem_attrs attrs, *defattrs;
2385 attrs = *get_mem_attrs (memref);
2386 address_mode = get_address_mode (memref);
2387 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2389 /* At this point we don't know _why_ the address is invalid. It
2390 could have secondary memory references, multiplies or anything.
2392 However, if we did go and rearrange things, we can wind up not
2393 being able to recognize the magic around pic_offset_table_rtx.
2394 This stuff is fragile, and is yet another example of why it is
2395 bad to expose PIC machinery too early. */
2396 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2397 attrs.addrspace)
2398 && GET_CODE (addr) == PLUS
2399 && XEXP (addr, 0) == pic_offset_table_rtx)
2401 addr = force_reg (GET_MODE (addr), addr);
2402 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2405 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2406 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1, false);
2408 /* If there are no changes, just return the original memory reference. */
2409 if (new_rtx == memref)
2410 return new_rtx;
2412 /* Update the alignment to reflect the offset. Reset the offset, which
2413 we don't know. */
2414 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2415 attrs.offset_known_p = false;
2416 attrs.size_known_p = defattrs->size_known_p;
2417 attrs.size = defattrs->size;
2418 attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2419 set_mem_attrs (new_rtx, &attrs);
2420 return new_rtx;
2423 /* Return a memory reference like MEMREF, but with its address changed to
2424 ADDR. The caller is asserting that the actual piece of memory pointed
2425 to is the same, just the form of the address is being changed, such as
2426 by putting something into a register. INPLACE is true if any changes
2427 can be made directly to MEMREF or false if MEMREF must be treated as
2428 immutable. */
2431 replace_equiv_address (rtx memref, rtx addr, bool inplace)
2433 /* change_address_1 copies the memory attribute structure without change
2434 and that's exactly what we want here. */
2435 update_temp_slot_address (XEXP (memref, 0), addr);
2436 return change_address_1 (memref, VOIDmode, addr, 1, inplace);
2439 /* Likewise, but the reference is not required to be valid. */
2442 replace_equiv_address_nv (rtx memref, rtx addr, bool inplace)
2444 return change_address_1 (memref, VOIDmode, addr, 0, inplace);
2447 /* Return a memory reference like MEMREF, but with its mode widened to
2448 MODE and offset by OFFSET. This would be used by targets that e.g.
2449 cannot issue QImode memory operations and have to use SImode memory
2450 operations plus masking logic. */
2453 widen_memory_access (rtx memref, machine_mode mode, HOST_WIDE_INT offset)
2455 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1, 0, 0);
2456 struct mem_attrs attrs;
2457 unsigned int size = GET_MODE_SIZE (mode);
2459 /* If there are no changes, just return the original memory reference. */
2460 if (new_rtx == memref)
2461 return new_rtx;
2463 attrs = *get_mem_attrs (new_rtx);
2465 /* If we don't know what offset we were at within the expression, then
2466 we can't know if we've overstepped the bounds. */
2467 if (! attrs.offset_known_p)
2468 attrs.expr = NULL_TREE;
2470 while (attrs.expr)
2472 if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2474 tree field = TREE_OPERAND (attrs.expr, 1);
2475 tree offset = component_ref_field_offset (attrs.expr);
2477 if (! DECL_SIZE_UNIT (field))
2479 attrs.expr = NULL_TREE;
2480 break;
2483 /* Is the field at least as large as the access? If so, ok,
2484 otherwise strip back to the containing structure. */
2485 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2486 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2487 && attrs.offset >= 0)
2488 break;
2490 if (! tree_fits_uhwi_p (offset))
2492 attrs.expr = NULL_TREE;
2493 break;
2496 attrs.expr = TREE_OPERAND (attrs.expr, 0);
2497 attrs.offset += tree_to_uhwi (offset);
2498 attrs.offset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
2499 / BITS_PER_UNIT);
2501 /* Similarly for the decl. */
2502 else if (DECL_P (attrs.expr)
2503 && DECL_SIZE_UNIT (attrs.expr)
2504 && TREE_CODE (DECL_SIZE_UNIT (attrs.expr)) == INTEGER_CST
2505 && compare_tree_int (DECL_SIZE_UNIT (attrs.expr), size) >= 0
2506 && (! attrs.offset_known_p || attrs.offset >= 0))
2507 break;
2508 else
2510 /* The widened memory access overflows the expression, which means
2511 that it could alias another expression. Zap it. */
2512 attrs.expr = NULL_TREE;
2513 break;
2517 if (! attrs.expr)
2518 attrs.offset_known_p = false;
2520 /* The widened memory may alias other stuff, so zap the alias set. */
2521 /* ??? Maybe use get_alias_set on any remaining expression. */
2522 attrs.alias = 0;
2523 attrs.size_known_p = true;
2524 attrs.size = size;
2525 set_mem_attrs (new_rtx, &attrs);
2526 return new_rtx;
2529 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2530 static GTY(()) tree spill_slot_decl;
2532 tree
2533 get_spill_slot_decl (bool force_build_p)
2535 tree d = spill_slot_decl;
2536 rtx rd;
2537 struct mem_attrs attrs;
2539 if (d || !force_build_p)
2540 return d;
2542 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2543 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2544 DECL_ARTIFICIAL (d) = 1;
2545 DECL_IGNORED_P (d) = 1;
2546 TREE_USED (d) = 1;
2547 spill_slot_decl = d;
2549 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2550 MEM_NOTRAP_P (rd) = 1;
2551 attrs = *mode_mem_attrs[(int) BLKmode];
2552 attrs.alias = new_alias_set ();
2553 attrs.expr = d;
2554 set_mem_attrs (rd, &attrs);
2555 SET_DECL_RTL (d, rd);
2557 return d;
2560 /* Given MEM, a result from assign_stack_local, fill in the memory
2561 attributes as appropriate for a register allocator spill slot.
2562 These slots are not aliasable by other memory. We arrange for
2563 them all to use a single MEM_EXPR, so that the aliasing code can
2564 work properly in the case of shared spill slots. */
2566 void
2567 set_mem_attrs_for_spill (rtx mem)
2569 struct mem_attrs attrs;
2570 rtx addr;
2572 attrs = *get_mem_attrs (mem);
2573 attrs.expr = get_spill_slot_decl (true);
2574 attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2575 attrs.addrspace = ADDR_SPACE_GENERIC;
2577 /* We expect the incoming memory to be of the form:
2578 (mem:MODE (plus (reg sfp) (const_int offset)))
2579 with perhaps the plus missing for offset = 0. */
2580 addr = XEXP (mem, 0);
2581 attrs.offset_known_p = true;
2582 attrs.offset = 0;
2583 if (GET_CODE (addr) == PLUS
2584 && CONST_INT_P (XEXP (addr, 1)))
2585 attrs.offset = INTVAL (XEXP (addr, 1));
2587 set_mem_attrs (mem, &attrs);
2588 MEM_NOTRAP_P (mem) = 1;
2591 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2593 rtx_code_label *
2594 gen_label_rtx (void)
2596 return as_a <rtx_code_label *> (
2597 gen_rtx_CODE_LABEL (VOIDmode, NULL_RTX, NULL_RTX,
2598 NULL, label_num++, NULL));
2601 /* For procedure integration. */
2603 /* Install new pointers to the first and last insns in the chain.
2604 Also, set cur_insn_uid to one higher than the last in use.
2605 Used for an inline-procedure after copying the insn chain. */
2607 void
2608 set_new_first_and_last_insn (rtx_insn *first, rtx_insn *last)
2610 rtx_insn *insn;
2612 set_first_insn (first);
2613 set_last_insn (last);
2614 cur_insn_uid = 0;
2616 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2618 int debug_count = 0;
2620 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2621 cur_debug_insn_uid = 0;
2623 for (insn = first; insn; insn = NEXT_INSN (insn))
2624 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2625 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2626 else
2628 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2629 if (DEBUG_INSN_P (insn))
2630 debug_count++;
2633 if (debug_count)
2634 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2635 else
2636 cur_debug_insn_uid++;
2638 else
2639 for (insn = first; insn; insn = NEXT_INSN (insn))
2640 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2642 cur_insn_uid++;
2645 /* Go through all the RTL insn bodies and copy any invalid shared
2646 structure. This routine should only be called once. */
2648 static void
2649 unshare_all_rtl_1 (rtx_insn *insn)
2651 /* Unshare just about everything else. */
2652 unshare_all_rtl_in_chain (insn);
2654 /* Make sure the addresses of stack slots found outside the insn chain
2655 (such as, in DECL_RTL of a variable) are not shared
2656 with the insn chain.
2658 This special care is necessary when the stack slot MEM does not
2659 actually appear in the insn chain. If it does appear, its address
2660 is unshared from all else at that point. */
2661 unsigned int i;
2662 rtx temp;
2663 FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
2664 (*stack_slot_list)[i] = copy_rtx_if_shared (temp);
2667 /* Go through all the RTL insn bodies and copy any invalid shared
2668 structure, again. This is a fairly expensive thing to do so it
2669 should be done sparingly. */
2671 void
2672 unshare_all_rtl_again (rtx_insn *insn)
2674 rtx_insn *p;
2675 tree decl;
2677 for (p = insn; p; p = NEXT_INSN (p))
2678 if (INSN_P (p))
2680 reset_used_flags (PATTERN (p));
2681 reset_used_flags (REG_NOTES (p));
2682 if (CALL_P (p))
2683 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2686 /* Make sure that virtual stack slots are not shared. */
2687 set_used_decls (DECL_INITIAL (cfun->decl));
2689 /* Make sure that virtual parameters are not shared. */
2690 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2691 set_used_flags (DECL_RTL (decl));
2693 rtx temp;
2694 unsigned int i;
2695 FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
2696 reset_used_flags (temp);
2698 unshare_all_rtl_1 (insn);
2701 unsigned int
2702 unshare_all_rtl (void)
2704 unshare_all_rtl_1 (get_insns ());
2706 for (tree decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2708 if (DECL_RTL_SET_P (decl))
2709 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2710 DECL_INCOMING_RTL (decl) = copy_rtx_if_shared (DECL_INCOMING_RTL (decl));
2713 return 0;
2717 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2718 Recursively does the same for subexpressions. */
2720 static void
2721 verify_rtx_sharing (rtx orig, rtx insn)
2723 rtx x = orig;
2724 int i;
2725 enum rtx_code code;
2726 const char *format_ptr;
2728 if (x == 0)
2729 return;
2731 code = GET_CODE (x);
2733 /* These types may be freely shared. */
2735 switch (code)
2737 case REG:
2738 case DEBUG_EXPR:
2739 case VALUE:
2740 CASE_CONST_ANY:
2741 case SYMBOL_REF:
2742 case LABEL_REF:
2743 case CODE_LABEL:
2744 case PC:
2745 case CC0:
2746 case RETURN:
2747 case SIMPLE_RETURN:
2748 case SCRATCH:
2749 /* SCRATCH must be shared because they represent distinct values. */
2750 return;
2751 case CLOBBER:
2752 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2753 clobbers or clobbers of hard registers that originated as pseudos.
2754 This is needed to allow safe register renaming. */
2755 if (REG_P (XEXP (x, 0))
2756 && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
2757 && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
2758 return;
2759 break;
2761 case CONST:
2762 if (shared_const_p (orig))
2763 return;
2764 break;
2766 case MEM:
2767 /* A MEM is allowed to be shared if its address is constant. */
2768 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2769 || reload_completed || reload_in_progress)
2770 return;
2772 break;
2774 default:
2775 break;
2778 /* This rtx may not be shared. If it has already been seen,
2779 replace it with a copy of itself. */
2780 if (flag_checking && RTX_FLAG (x, used))
2782 error ("invalid rtl sharing found in the insn");
2783 debug_rtx (insn);
2784 error ("shared rtx");
2785 debug_rtx (x);
2786 internal_error ("internal consistency failure");
2788 gcc_assert (!RTX_FLAG (x, used));
2790 RTX_FLAG (x, used) = 1;
2792 /* Now scan the subexpressions recursively. */
2794 format_ptr = GET_RTX_FORMAT (code);
2796 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2798 switch (*format_ptr++)
2800 case 'e':
2801 verify_rtx_sharing (XEXP (x, i), insn);
2802 break;
2804 case 'E':
2805 if (XVEC (x, i) != NULL)
2807 int j;
2808 int len = XVECLEN (x, i);
2810 for (j = 0; j < len; j++)
2812 /* We allow sharing of ASM_OPERANDS inside single
2813 instruction. */
2814 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2815 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2816 == ASM_OPERANDS))
2817 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2818 else
2819 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2822 break;
2825 return;
2828 /* Reset used-flags for INSN. */
2830 static void
2831 reset_insn_used_flags (rtx insn)
2833 gcc_assert (INSN_P (insn));
2834 reset_used_flags (PATTERN (insn));
2835 reset_used_flags (REG_NOTES (insn));
2836 if (CALL_P (insn))
2837 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn));
2840 /* Go through all the RTL insn bodies and clear all the USED bits. */
2842 static void
2843 reset_all_used_flags (void)
2845 rtx_insn *p;
2847 for (p = get_insns (); p; p = NEXT_INSN (p))
2848 if (INSN_P (p))
2850 rtx pat = PATTERN (p);
2851 if (GET_CODE (pat) != SEQUENCE)
2852 reset_insn_used_flags (p);
2853 else
2855 gcc_assert (REG_NOTES (p) == NULL);
2856 for (int i = 0; i < XVECLEN (pat, 0); i++)
2858 rtx insn = XVECEXP (pat, 0, i);
2859 if (INSN_P (insn))
2860 reset_insn_used_flags (insn);
2866 /* Verify sharing in INSN. */
2868 static void
2869 verify_insn_sharing (rtx insn)
2871 gcc_assert (INSN_P (insn));
2872 verify_rtx_sharing (PATTERN (insn), insn);
2873 verify_rtx_sharing (REG_NOTES (insn), insn);
2874 if (CALL_P (insn))
2875 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (insn), insn);
2878 /* Go through all the RTL insn bodies and check that there is no unexpected
2879 sharing in between the subexpressions. */
2881 DEBUG_FUNCTION void
2882 verify_rtl_sharing (void)
2884 rtx_insn *p;
2886 timevar_push (TV_VERIFY_RTL_SHARING);
2888 reset_all_used_flags ();
2890 for (p = get_insns (); p; p = NEXT_INSN (p))
2891 if (INSN_P (p))
2893 rtx pat = PATTERN (p);
2894 if (GET_CODE (pat) != SEQUENCE)
2895 verify_insn_sharing (p);
2896 else
2897 for (int i = 0; i < XVECLEN (pat, 0); i++)
2899 rtx insn = XVECEXP (pat, 0, i);
2900 if (INSN_P (insn))
2901 verify_insn_sharing (insn);
2905 reset_all_used_flags ();
2907 timevar_pop (TV_VERIFY_RTL_SHARING);
2910 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2911 Assumes the mark bits are cleared at entry. */
2913 void
2914 unshare_all_rtl_in_chain (rtx_insn *insn)
2916 for (; insn; insn = NEXT_INSN (insn))
2917 if (INSN_P (insn))
2919 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2920 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2921 if (CALL_P (insn))
2922 CALL_INSN_FUNCTION_USAGE (insn)
2923 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn));
2927 /* Go through all virtual stack slots of a function and mark them as
2928 shared. We never replace the DECL_RTLs themselves with a copy,
2929 but expressions mentioned into a DECL_RTL cannot be shared with
2930 expressions in the instruction stream.
2932 Note that reload may convert pseudo registers into memories in-place.
2933 Pseudo registers are always shared, but MEMs never are. Thus if we
2934 reset the used flags on MEMs in the instruction stream, we must set
2935 them again on MEMs that appear in DECL_RTLs. */
2937 static void
2938 set_used_decls (tree blk)
2940 tree t;
2942 /* Mark decls. */
2943 for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
2944 if (DECL_RTL_SET_P (t))
2945 set_used_flags (DECL_RTL (t));
2947 /* Now process sub-blocks. */
2948 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2949 set_used_decls (t);
2952 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2953 Recursively does the same for subexpressions. Uses
2954 copy_rtx_if_shared_1 to reduce stack space. */
2957 copy_rtx_if_shared (rtx orig)
2959 copy_rtx_if_shared_1 (&orig);
2960 return orig;
2963 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2964 use. Recursively does the same for subexpressions. */
2966 static void
2967 copy_rtx_if_shared_1 (rtx *orig1)
2969 rtx x;
2970 int i;
2971 enum rtx_code code;
2972 rtx *last_ptr;
2973 const char *format_ptr;
2974 int copied = 0;
2975 int length;
2977 /* Repeat is used to turn tail-recursion into iteration. */
2978 repeat:
2979 x = *orig1;
2981 if (x == 0)
2982 return;
2984 code = GET_CODE (x);
2986 /* These types may be freely shared. */
2988 switch (code)
2990 case REG:
2991 case DEBUG_EXPR:
2992 case VALUE:
2993 CASE_CONST_ANY:
2994 case SYMBOL_REF:
2995 case LABEL_REF:
2996 case CODE_LABEL:
2997 case PC:
2998 case CC0:
2999 case RETURN:
3000 case SIMPLE_RETURN:
3001 case SCRATCH:
3002 /* SCRATCH must be shared because they represent distinct values. */
3003 return;
3004 case CLOBBER:
3005 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
3006 clobbers or clobbers of hard registers that originated as pseudos.
3007 This is needed to allow safe register renaming. */
3008 if (REG_P (XEXP (x, 0))
3009 && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
3010 && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
3011 return;
3012 break;
3014 case CONST:
3015 if (shared_const_p (x))
3016 return;
3017 break;
3019 case DEBUG_INSN:
3020 case INSN:
3021 case JUMP_INSN:
3022 case CALL_INSN:
3023 case NOTE:
3024 case BARRIER:
3025 /* The chain of insns is not being copied. */
3026 return;
3028 default:
3029 break;
3032 /* This rtx may not be shared. If it has already been seen,
3033 replace it with a copy of itself. */
3035 if (RTX_FLAG (x, used))
3037 x = shallow_copy_rtx (x);
3038 copied = 1;
3040 RTX_FLAG (x, used) = 1;
3042 /* Now scan the subexpressions recursively.
3043 We can store any replaced subexpressions directly into X
3044 since we know X is not shared! Any vectors in X
3045 must be copied if X was copied. */
3047 format_ptr = GET_RTX_FORMAT (code);
3048 length = GET_RTX_LENGTH (code);
3049 last_ptr = NULL;
3051 for (i = 0; i < length; i++)
3053 switch (*format_ptr++)
3055 case 'e':
3056 if (last_ptr)
3057 copy_rtx_if_shared_1 (last_ptr);
3058 last_ptr = &XEXP (x, i);
3059 break;
3061 case 'E':
3062 if (XVEC (x, i) != NULL)
3064 int j;
3065 int len = XVECLEN (x, i);
3067 /* Copy the vector iff I copied the rtx and the length
3068 is nonzero. */
3069 if (copied && len > 0)
3070 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
3072 /* Call recursively on all inside the vector. */
3073 for (j = 0; j < len; j++)
3075 if (last_ptr)
3076 copy_rtx_if_shared_1 (last_ptr);
3077 last_ptr = &XVECEXP (x, i, j);
3080 break;
3083 *orig1 = x;
3084 if (last_ptr)
3086 orig1 = last_ptr;
3087 goto repeat;
3089 return;
3092 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3094 static void
3095 mark_used_flags (rtx x, int flag)
3097 int i, j;
3098 enum rtx_code code;
3099 const char *format_ptr;
3100 int length;
3102 /* Repeat is used to turn tail-recursion into iteration. */
3103 repeat:
3104 if (x == 0)
3105 return;
3107 code = GET_CODE (x);
3109 /* These types may be freely shared so we needn't do any resetting
3110 for them. */
3112 switch (code)
3114 case REG:
3115 case DEBUG_EXPR:
3116 case VALUE:
3117 CASE_CONST_ANY:
3118 case SYMBOL_REF:
3119 case CODE_LABEL:
3120 case PC:
3121 case CC0:
3122 case RETURN:
3123 case SIMPLE_RETURN:
3124 return;
3126 case DEBUG_INSN:
3127 case INSN:
3128 case JUMP_INSN:
3129 case CALL_INSN:
3130 case NOTE:
3131 case LABEL_REF:
3132 case BARRIER:
3133 /* The chain of insns is not being copied. */
3134 return;
3136 default:
3137 break;
3140 RTX_FLAG (x, used) = flag;
3142 format_ptr = GET_RTX_FORMAT (code);
3143 length = GET_RTX_LENGTH (code);
3145 for (i = 0; i < length; i++)
3147 switch (*format_ptr++)
3149 case 'e':
3150 if (i == length-1)
3152 x = XEXP (x, i);
3153 goto repeat;
3155 mark_used_flags (XEXP (x, i), flag);
3156 break;
3158 case 'E':
3159 for (j = 0; j < XVECLEN (x, i); j++)
3160 mark_used_flags (XVECEXP (x, i, j), flag);
3161 break;
3166 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3167 to look for shared sub-parts. */
3169 void
3170 reset_used_flags (rtx x)
3172 mark_used_flags (x, 0);
3175 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3176 to look for shared sub-parts. */
3178 void
3179 set_used_flags (rtx x)
3181 mark_used_flags (x, 1);
3184 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3185 Return X or the rtx for the pseudo reg the value of X was copied into.
3186 OTHER must be valid as a SET_DEST. */
3189 make_safe_from (rtx x, rtx other)
3191 while (1)
3192 switch (GET_CODE (other))
3194 case SUBREG:
3195 other = SUBREG_REG (other);
3196 break;
3197 case STRICT_LOW_PART:
3198 case SIGN_EXTEND:
3199 case ZERO_EXTEND:
3200 other = XEXP (other, 0);
3201 break;
3202 default:
3203 goto done;
3205 done:
3206 if ((MEM_P (other)
3207 && ! CONSTANT_P (x)
3208 && !REG_P (x)
3209 && GET_CODE (x) != SUBREG)
3210 || (REG_P (other)
3211 && (REGNO (other) < FIRST_PSEUDO_REGISTER
3212 || reg_mentioned_p (other, x))))
3214 rtx temp = gen_reg_rtx (GET_MODE (x));
3215 emit_move_insn (temp, x);
3216 return temp;
3218 return x;
3221 /* Emission of insns (adding them to the doubly-linked list). */
3223 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3225 rtx_insn *
3226 get_last_insn_anywhere (void)
3228 struct sequence_stack *seq;
3229 for (seq = get_current_sequence (); seq; seq = seq->next)
3230 if (seq->last != 0)
3231 return seq->last;
3232 return 0;
3235 /* Return the first nonnote insn emitted in current sequence or current
3236 function. This routine looks inside SEQUENCEs. */
3238 rtx_insn *
3239 get_first_nonnote_insn (void)
3241 rtx_insn *insn = get_insns ();
3243 if (insn)
3245 if (NOTE_P (insn))
3246 for (insn = next_insn (insn);
3247 insn && NOTE_P (insn);
3248 insn = next_insn (insn))
3249 continue;
3250 else
3252 if (NONJUMP_INSN_P (insn)
3253 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3254 insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3258 return insn;
3261 /* Return the last nonnote insn emitted in current sequence or current
3262 function. This routine looks inside SEQUENCEs. */
3264 rtx_insn *
3265 get_last_nonnote_insn (void)
3267 rtx_insn *insn = get_last_insn ();
3269 if (insn)
3271 if (NOTE_P (insn))
3272 for (insn = previous_insn (insn);
3273 insn && NOTE_P (insn);
3274 insn = previous_insn (insn))
3275 continue;
3276 else
3278 if (NONJUMP_INSN_P (insn))
3279 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3280 insn = seq->insn (seq->len () - 1);
3284 return insn;
3287 /* Return the number of actual (non-debug) insns emitted in this
3288 function. */
3291 get_max_insn_count (void)
3293 int n = cur_insn_uid;
3295 /* The table size must be stable across -g, to avoid codegen
3296 differences due to debug insns, and not be affected by
3297 -fmin-insn-uid, to avoid excessive table size and to simplify
3298 debugging of -fcompare-debug failures. */
3299 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3300 n -= cur_debug_insn_uid;
3301 else
3302 n -= MIN_NONDEBUG_INSN_UID;
3304 return n;
3308 /* Return the next insn. If it is a SEQUENCE, return the first insn
3309 of the sequence. */
3311 rtx_insn *
3312 next_insn (rtx_insn *insn)
3314 if (insn)
3316 insn = NEXT_INSN (insn);
3317 if (insn && NONJUMP_INSN_P (insn)
3318 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3319 insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3322 return insn;
3325 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3326 of the sequence. */
3328 rtx_insn *
3329 previous_insn (rtx_insn *insn)
3331 if (insn)
3333 insn = PREV_INSN (insn);
3334 if (insn && NONJUMP_INSN_P (insn))
3335 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3336 insn = seq->insn (seq->len () - 1);
3339 return insn;
3342 /* Return the next insn after INSN that is not a NOTE. This routine does not
3343 look inside SEQUENCEs. */
3345 rtx_insn *
3346 next_nonnote_insn (rtx_insn *insn)
3348 while (insn)
3350 insn = NEXT_INSN (insn);
3351 if (insn == 0 || !NOTE_P (insn))
3352 break;
3355 return insn;
3358 /* Return the next insn after INSN that is not a NOTE, but stop the
3359 search before we enter another basic block. This routine does not
3360 look inside SEQUENCEs. */
3362 rtx_insn *
3363 next_nonnote_insn_bb (rtx_insn *insn)
3365 while (insn)
3367 insn = NEXT_INSN (insn);
3368 if (insn == 0 || !NOTE_P (insn))
3369 break;
3370 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3371 return NULL;
3374 return insn;
3377 /* Return the previous insn before INSN that is not a NOTE. This routine does
3378 not look inside SEQUENCEs. */
3380 rtx_insn *
3381 prev_nonnote_insn (rtx_insn *insn)
3383 while (insn)
3385 insn = PREV_INSN (insn);
3386 if (insn == 0 || !NOTE_P (insn))
3387 break;
3390 return insn;
3393 /* Return the previous insn before INSN that is not a NOTE, but stop
3394 the search before we enter another basic block. This routine does
3395 not look inside SEQUENCEs. */
3397 rtx_insn *
3398 prev_nonnote_insn_bb (rtx_insn *insn)
3401 while (insn)
3403 insn = PREV_INSN (insn);
3404 if (insn == 0 || !NOTE_P (insn))
3405 break;
3406 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3407 return NULL;
3410 return insn;
3413 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3414 routine does not look inside SEQUENCEs. */
3416 rtx_insn *
3417 next_nondebug_insn (rtx_insn *insn)
3419 while (insn)
3421 insn = NEXT_INSN (insn);
3422 if (insn == 0 || !DEBUG_INSN_P (insn))
3423 break;
3426 return insn;
3429 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3430 This routine does not look inside SEQUENCEs. */
3432 rtx_insn *
3433 prev_nondebug_insn (rtx_insn *insn)
3435 while (insn)
3437 insn = PREV_INSN (insn);
3438 if (insn == 0 || !DEBUG_INSN_P (insn))
3439 break;
3442 return insn;
3445 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3446 This routine does not look inside SEQUENCEs. */
3448 rtx_insn *
3449 next_nonnote_nondebug_insn (rtx_insn *insn)
3451 while (insn)
3453 insn = NEXT_INSN (insn);
3454 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3455 break;
3458 return insn;
3461 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3462 This routine does not look inside SEQUENCEs. */
3464 rtx_insn *
3465 prev_nonnote_nondebug_insn (rtx_insn *insn)
3467 while (insn)
3469 insn = PREV_INSN (insn);
3470 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3471 break;
3474 return insn;
3477 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3478 or 0, if there is none. This routine does not look inside
3479 SEQUENCEs. */
3481 rtx_insn *
3482 next_real_insn (rtx uncast_insn)
3484 rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
3486 while (insn)
3488 insn = NEXT_INSN (insn);
3489 if (insn == 0 || INSN_P (insn))
3490 break;
3493 return insn;
3496 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3497 or 0, if there is none. This routine does not look inside
3498 SEQUENCEs. */
3500 rtx_insn *
3501 prev_real_insn (rtx_insn *insn)
3503 while (insn)
3505 insn = PREV_INSN (insn);
3506 if (insn == 0 || INSN_P (insn))
3507 break;
3510 return insn;
3513 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3514 This routine does not look inside SEQUENCEs. */
3516 rtx_call_insn *
3517 last_call_insn (void)
3519 rtx_insn *insn;
3521 for (insn = get_last_insn ();
3522 insn && !CALL_P (insn);
3523 insn = PREV_INSN (insn))
3526 return safe_as_a <rtx_call_insn *> (insn);
3529 /* Find the next insn after INSN that really does something. This routine
3530 does not look inside SEQUENCEs. After reload this also skips over
3531 standalone USE and CLOBBER insn. */
3534 active_insn_p (const rtx_insn *insn)
3536 return (CALL_P (insn) || JUMP_P (insn)
3537 || JUMP_TABLE_DATA_P (insn) /* FIXME */
3538 || (NONJUMP_INSN_P (insn)
3539 && (! reload_completed
3540 || (GET_CODE (PATTERN (insn)) != USE
3541 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3544 rtx_insn *
3545 next_active_insn (rtx_insn *insn)
3547 while (insn)
3549 insn = NEXT_INSN (insn);
3550 if (insn == 0 || active_insn_p (insn))
3551 break;
3554 return insn;
3557 /* Find the last insn before INSN that really does something. This routine
3558 does not look inside SEQUENCEs. After reload this also skips over
3559 standalone USE and CLOBBER insn. */
3561 rtx_insn *
3562 prev_active_insn (rtx_insn *insn)
3564 while (insn)
3566 insn = PREV_INSN (insn);
3567 if (insn == 0 || active_insn_p (insn))
3568 break;
3571 return insn;
3574 /* Return the next insn that uses CC0 after INSN, which is assumed to
3575 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3576 applied to the result of this function should yield INSN).
3578 Normally, this is simply the next insn. However, if a REG_CC_USER note
3579 is present, it contains the insn that uses CC0.
3581 Return 0 if we can't find the insn. */
3583 rtx_insn *
3584 next_cc0_user (rtx_insn *insn)
3586 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3588 if (note)
3589 return safe_as_a <rtx_insn *> (XEXP (note, 0));
3591 insn = next_nonnote_insn (insn);
3592 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3593 insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3595 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3596 return insn;
3598 return 0;
3601 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3602 note, it is the previous insn. */
3604 rtx_insn *
3605 prev_cc0_setter (rtx_insn *insn)
3607 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3609 if (note)
3610 return safe_as_a <rtx_insn *> (XEXP (note, 0));
3612 insn = prev_nonnote_insn (insn);
3613 gcc_assert (sets_cc0_p (PATTERN (insn)));
3615 return insn;
3618 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3620 static int
3621 find_auto_inc (const_rtx x, const_rtx reg)
3623 subrtx_iterator::array_type array;
3624 FOR_EACH_SUBRTX (iter, array, x, NONCONST)
3626 const_rtx x = *iter;
3627 if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC
3628 && rtx_equal_p (reg, XEXP (x, 0)))
3629 return true;
3631 return false;
3634 /* Increment the label uses for all labels present in rtx. */
3636 static void
3637 mark_label_nuses (rtx x)
3639 enum rtx_code code;
3640 int i, j;
3641 const char *fmt;
3643 code = GET_CODE (x);
3644 if (code == LABEL_REF && LABEL_P (label_ref_label (x)))
3645 LABEL_NUSES (label_ref_label (x))++;
3647 fmt = GET_RTX_FORMAT (code);
3648 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3650 if (fmt[i] == 'e')
3651 mark_label_nuses (XEXP (x, i));
3652 else if (fmt[i] == 'E')
3653 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3654 mark_label_nuses (XVECEXP (x, i, j));
3659 /* Try splitting insns that can be split for better scheduling.
3660 PAT is the pattern which might split.
3661 TRIAL is the insn providing PAT.
3662 LAST is nonzero if we should return the last insn of the sequence produced.
3664 If this routine succeeds in splitting, it returns the first or last
3665 replacement insn depending on the value of LAST. Otherwise, it
3666 returns TRIAL. If the insn to be returned can be split, it will be. */
3668 rtx_insn *
3669 try_split (rtx pat, rtx_insn *trial, int last)
3671 rtx_insn *before, *after;
3672 rtx note;
3673 rtx_insn *seq, *tem;
3674 profile_probability probability;
3675 rtx_insn *insn_last, *insn;
3676 int njumps = 0;
3677 rtx_insn *call_insn = NULL;
3679 /* We're not good at redistributing frame information. */
3680 if (RTX_FRAME_RELATED_P (trial))
3681 return trial;
3683 if (any_condjump_p (trial)
3684 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3685 split_branch_probability
3686 = profile_probability::from_reg_br_prob_note (XINT (note, 0));
3687 else
3688 split_branch_probability = profile_probability::uninitialized ();
3690 probability = split_branch_probability;
3692 seq = split_insns (pat, trial);
3694 split_branch_probability = profile_probability::uninitialized ();
3696 if (!seq)
3697 return trial;
3699 /* Avoid infinite loop if any insn of the result matches
3700 the original pattern. */
3701 insn_last = seq;
3702 while (1)
3704 if (INSN_P (insn_last)
3705 && rtx_equal_p (PATTERN (insn_last), pat))
3706 return trial;
3707 if (!NEXT_INSN (insn_last))
3708 break;
3709 insn_last = NEXT_INSN (insn_last);
3712 /* We will be adding the new sequence to the function. The splitters
3713 may have introduced invalid RTL sharing, so unshare the sequence now. */
3714 unshare_all_rtl_in_chain (seq);
3716 /* Mark labels and copy flags. */
3717 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3719 if (JUMP_P (insn))
3721 if (JUMP_P (trial))
3722 CROSSING_JUMP_P (insn) = CROSSING_JUMP_P (trial);
3723 mark_jump_label (PATTERN (insn), insn, 0);
3724 njumps++;
3725 if (probability.initialized_p ()
3726 && any_condjump_p (insn)
3727 && !find_reg_note (insn, REG_BR_PROB, 0))
3729 /* We can preserve the REG_BR_PROB notes only if exactly
3730 one jump is created, otherwise the machine description
3731 is responsible for this step using
3732 split_branch_probability variable. */
3733 gcc_assert (njumps == 1);
3734 add_reg_br_prob_note (insn, probability);
3739 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3740 in SEQ and copy any additional information across. */
3741 if (CALL_P (trial))
3743 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3744 if (CALL_P (insn))
3746 rtx_insn *next;
3747 rtx *p;
3749 gcc_assert (call_insn == NULL_RTX);
3750 call_insn = insn;
3752 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3753 target may have explicitly specified. */
3754 p = &CALL_INSN_FUNCTION_USAGE (insn);
3755 while (*p)
3756 p = &XEXP (*p, 1);
3757 *p = CALL_INSN_FUNCTION_USAGE (trial);
3759 /* If the old call was a sibling call, the new one must
3760 be too. */
3761 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3763 /* If the new call is the last instruction in the sequence,
3764 it will effectively replace the old call in-situ. Otherwise
3765 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3766 so that it comes immediately after the new call. */
3767 if (NEXT_INSN (insn))
3768 for (next = NEXT_INSN (trial);
3769 next && NOTE_P (next);
3770 next = NEXT_INSN (next))
3771 if (NOTE_KIND (next) == NOTE_INSN_CALL_ARG_LOCATION)
3773 remove_insn (next);
3774 add_insn_after (next, insn, NULL);
3775 break;
3780 /* Copy notes, particularly those related to the CFG. */
3781 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3783 switch (REG_NOTE_KIND (note))
3785 case REG_EH_REGION:
3786 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3787 break;
3789 case REG_NORETURN:
3790 case REG_SETJMP:
3791 case REG_TM:
3792 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3794 if (CALL_P (insn))
3795 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3797 break;
3799 case REG_NON_LOCAL_GOTO:
3800 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3802 if (JUMP_P (insn))
3803 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3805 break;
3807 case REG_INC:
3808 if (!AUTO_INC_DEC)
3809 break;
3811 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3813 rtx reg = XEXP (note, 0);
3814 if (!FIND_REG_INC_NOTE (insn, reg)
3815 && find_auto_inc (PATTERN (insn), reg))
3816 add_reg_note (insn, REG_INC, reg);
3818 break;
3820 case REG_ARGS_SIZE:
3821 fixup_args_size_notes (NULL, insn_last, INTVAL (XEXP (note, 0)));
3822 break;
3824 case REG_CALL_DECL:
3825 gcc_assert (call_insn != NULL_RTX);
3826 add_reg_note (call_insn, REG_NOTE_KIND (note), XEXP (note, 0));
3827 break;
3829 default:
3830 break;
3834 /* If there are LABELS inside the split insns increment the
3835 usage count so we don't delete the label. */
3836 if (INSN_P (trial))
3838 insn = insn_last;
3839 while (insn != NULL_RTX)
3841 /* JUMP_P insns have already been "marked" above. */
3842 if (NONJUMP_INSN_P (insn))
3843 mark_label_nuses (PATTERN (insn));
3845 insn = PREV_INSN (insn);
3849 before = PREV_INSN (trial);
3850 after = NEXT_INSN (trial);
3852 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATION (trial));
3854 delete_insn (trial);
3856 /* Recursively call try_split for each new insn created; by the
3857 time control returns here that insn will be fully split, so
3858 set LAST and continue from the insn after the one returned.
3859 We can't use next_active_insn here since AFTER may be a note.
3860 Ignore deleted insns, which can be occur if not optimizing. */
3861 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3862 if (! tem->deleted () && INSN_P (tem))
3863 tem = try_split (PATTERN (tem), tem, 1);
3865 /* Return either the first or the last insn, depending on which was
3866 requested. */
3867 return last
3868 ? (after ? PREV_INSN (after) : get_last_insn ())
3869 : NEXT_INSN (before);
3872 /* Make and return an INSN rtx, initializing all its slots.
3873 Store PATTERN in the pattern slots. */
3875 rtx_insn *
3876 make_insn_raw (rtx pattern)
3878 rtx_insn *insn;
3880 insn = as_a <rtx_insn *> (rtx_alloc (INSN));
3882 INSN_UID (insn) = cur_insn_uid++;
3883 PATTERN (insn) = pattern;
3884 INSN_CODE (insn) = -1;
3885 REG_NOTES (insn) = NULL;
3886 INSN_LOCATION (insn) = curr_insn_location ();
3887 BLOCK_FOR_INSN (insn) = NULL;
3889 #ifdef ENABLE_RTL_CHECKING
3890 if (insn
3891 && INSN_P (insn)
3892 && (returnjump_p (insn)
3893 || (GET_CODE (insn) == SET
3894 && SET_DEST (insn) == pc_rtx)))
3896 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3897 debug_rtx (insn);
3899 #endif
3901 return insn;
3904 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3906 static rtx_insn *
3907 make_debug_insn_raw (rtx pattern)
3909 rtx_debug_insn *insn;
3911 insn = as_a <rtx_debug_insn *> (rtx_alloc (DEBUG_INSN));
3912 INSN_UID (insn) = cur_debug_insn_uid++;
3913 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3914 INSN_UID (insn) = cur_insn_uid++;
3916 PATTERN (insn) = pattern;
3917 INSN_CODE (insn) = -1;
3918 REG_NOTES (insn) = NULL;
3919 INSN_LOCATION (insn) = curr_insn_location ();
3920 BLOCK_FOR_INSN (insn) = NULL;
3922 return insn;
3925 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3927 static rtx_insn *
3928 make_jump_insn_raw (rtx pattern)
3930 rtx_jump_insn *insn;
3932 insn = as_a <rtx_jump_insn *> (rtx_alloc (JUMP_INSN));
3933 INSN_UID (insn) = cur_insn_uid++;
3935 PATTERN (insn) = pattern;
3936 INSN_CODE (insn) = -1;
3937 REG_NOTES (insn) = NULL;
3938 JUMP_LABEL (insn) = NULL;
3939 INSN_LOCATION (insn) = curr_insn_location ();
3940 BLOCK_FOR_INSN (insn) = NULL;
3942 return insn;
3945 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3947 static rtx_insn *
3948 make_call_insn_raw (rtx pattern)
3950 rtx_call_insn *insn;
3952 insn = as_a <rtx_call_insn *> (rtx_alloc (CALL_INSN));
3953 INSN_UID (insn) = cur_insn_uid++;
3955 PATTERN (insn) = pattern;
3956 INSN_CODE (insn) = -1;
3957 REG_NOTES (insn) = NULL;
3958 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3959 INSN_LOCATION (insn) = curr_insn_location ();
3960 BLOCK_FOR_INSN (insn) = NULL;
3962 return insn;
3965 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3967 static rtx_note *
3968 make_note_raw (enum insn_note subtype)
3970 /* Some notes are never created this way at all. These notes are
3971 only created by patching out insns. */
3972 gcc_assert (subtype != NOTE_INSN_DELETED_LABEL
3973 && subtype != NOTE_INSN_DELETED_DEBUG_LABEL);
3975 rtx_note *note = as_a <rtx_note *> (rtx_alloc (NOTE));
3976 INSN_UID (note) = cur_insn_uid++;
3977 NOTE_KIND (note) = subtype;
3978 BLOCK_FOR_INSN (note) = NULL;
3979 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
3980 return note;
3983 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3984 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3985 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3987 static inline void
3988 link_insn_into_chain (rtx_insn *insn, rtx_insn *prev, rtx_insn *next)
3990 SET_PREV_INSN (insn) = prev;
3991 SET_NEXT_INSN (insn) = next;
3992 if (prev != NULL)
3994 SET_NEXT_INSN (prev) = insn;
3995 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3997 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
3998 SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = insn;
4001 if (next != NULL)
4003 SET_PREV_INSN (next) = insn;
4004 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
4006 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
4007 SET_PREV_INSN (sequence->insn (0)) = insn;
4011 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
4013 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (insn));
4014 SET_PREV_INSN (sequence->insn (0)) = prev;
4015 SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4019 /* Add INSN to the end of the doubly-linked list.
4020 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
4022 void
4023 add_insn (rtx_insn *insn)
4025 rtx_insn *prev = get_last_insn ();
4026 link_insn_into_chain (insn, prev, NULL);
4027 if (NULL == get_insns ())
4028 set_first_insn (insn);
4029 set_last_insn (insn);
4032 /* Add INSN into the doubly-linked list after insn AFTER. */
4034 static void
4035 add_insn_after_nobb (rtx_insn *insn, rtx_insn *after)
4037 rtx_insn *next = NEXT_INSN (after);
4039 gcc_assert (!optimize || !after->deleted ());
4041 link_insn_into_chain (insn, after, next);
4043 if (next == NULL)
4045 struct sequence_stack *seq;
4047 for (seq = get_current_sequence (); seq; seq = seq->next)
4048 if (after == seq->last)
4050 seq->last = insn;
4051 break;
4056 /* Add INSN into the doubly-linked list before insn BEFORE. */
4058 static void
4059 add_insn_before_nobb (rtx_insn *insn, rtx_insn *before)
4061 rtx_insn *prev = PREV_INSN (before);
4063 gcc_assert (!optimize || !before->deleted ());
4065 link_insn_into_chain (insn, prev, before);
4067 if (prev == NULL)
4069 struct sequence_stack *seq;
4071 for (seq = get_current_sequence (); seq; seq = seq->next)
4072 if (before == seq->first)
4074 seq->first = insn;
4075 break;
4078 gcc_assert (seq);
4082 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4083 If BB is NULL, an attempt is made to infer the bb from before.
4085 This and the next function should be the only functions called
4086 to insert an insn once delay slots have been filled since only
4087 they know how to update a SEQUENCE. */
4089 void
4090 add_insn_after (rtx uncast_insn, rtx uncast_after, basic_block bb)
4092 rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
4093 rtx_insn *after = as_a <rtx_insn *> (uncast_after);
4094 add_insn_after_nobb (insn, after);
4095 if (!BARRIER_P (after)
4096 && !BARRIER_P (insn)
4097 && (bb = BLOCK_FOR_INSN (after)))
4099 set_block_for_insn (insn, bb);
4100 if (INSN_P (insn))
4101 df_insn_rescan (insn);
4102 /* Should not happen as first in the BB is always
4103 either NOTE or LABEL. */
4104 if (BB_END (bb) == after
4105 /* Avoid clobbering of structure when creating new BB. */
4106 && !BARRIER_P (insn)
4107 && !NOTE_INSN_BASIC_BLOCK_P (insn))
4108 BB_END (bb) = insn;
4112 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4113 If BB is NULL, an attempt is made to infer the bb from before.
4115 This and the previous function should be the only functions called
4116 to insert an insn once delay slots have been filled since only
4117 they know how to update a SEQUENCE. */
4119 void
4120 add_insn_before (rtx uncast_insn, rtx uncast_before, basic_block bb)
4122 rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
4123 rtx_insn *before = as_a <rtx_insn *> (uncast_before);
4124 add_insn_before_nobb (insn, before);
4126 if (!bb
4127 && !BARRIER_P (before)
4128 && !BARRIER_P (insn))
4129 bb = BLOCK_FOR_INSN (before);
4131 if (bb)
4133 set_block_for_insn (insn, bb);
4134 if (INSN_P (insn))
4135 df_insn_rescan (insn);
4136 /* Should not happen as first in the BB is always either NOTE or
4137 LABEL. */
4138 gcc_assert (BB_HEAD (bb) != insn
4139 /* Avoid clobbering of structure when creating new BB. */
4140 || BARRIER_P (insn)
4141 || NOTE_INSN_BASIC_BLOCK_P (insn));
4145 /* Replace insn with an deleted instruction note. */
4147 void
4148 set_insn_deleted (rtx insn)
4150 if (INSN_P (insn))
4151 df_insn_delete (as_a <rtx_insn *> (insn));
4152 PUT_CODE (insn, NOTE);
4153 NOTE_KIND (insn) = NOTE_INSN_DELETED;
4157 /* Unlink INSN from the insn chain.
4159 This function knows how to handle sequences.
4161 This function does not invalidate data flow information associated with
4162 INSN (i.e. does not call df_insn_delete). That makes this function
4163 usable for only disconnecting an insn from the chain, and re-emit it
4164 elsewhere later.
4166 To later insert INSN elsewhere in the insn chain via add_insn and
4167 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4168 the caller. Nullifying them here breaks many insn chain walks.
4170 To really delete an insn and related DF information, use delete_insn. */
4172 void
4173 remove_insn (rtx uncast_insn)
4175 rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
4176 rtx_insn *next = NEXT_INSN (insn);
4177 rtx_insn *prev = PREV_INSN (insn);
4178 basic_block bb;
4180 if (prev)
4182 SET_NEXT_INSN (prev) = next;
4183 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
4185 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
4186 SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4189 else
4191 struct sequence_stack *seq;
4193 for (seq = get_current_sequence (); seq; seq = seq->next)
4194 if (insn == seq->first)
4196 seq->first = next;
4197 break;
4200 gcc_assert (seq);
4203 if (next)
4205 SET_PREV_INSN (next) = prev;
4206 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
4208 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
4209 SET_PREV_INSN (sequence->insn (0)) = prev;
4212 else
4214 struct sequence_stack *seq;
4216 for (seq = get_current_sequence (); seq; seq = seq->next)
4217 if (insn == seq->last)
4219 seq->last = prev;
4220 break;
4223 gcc_assert (seq);
4226 /* Fix up basic block boundaries, if necessary. */
4227 if (!BARRIER_P (insn)
4228 && (bb = BLOCK_FOR_INSN (insn)))
4230 if (BB_HEAD (bb) == insn)
4232 /* Never ever delete the basic block note without deleting whole
4233 basic block. */
4234 gcc_assert (!NOTE_P (insn));
4235 BB_HEAD (bb) = next;
4237 if (BB_END (bb) == insn)
4238 BB_END (bb) = prev;
4242 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4244 void
4245 add_function_usage_to (rtx call_insn, rtx call_fusage)
4247 gcc_assert (call_insn && CALL_P (call_insn));
4249 /* Put the register usage information on the CALL. If there is already
4250 some usage information, put ours at the end. */
4251 if (CALL_INSN_FUNCTION_USAGE (call_insn))
4253 rtx link;
4255 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
4256 link = XEXP (link, 1))
4259 XEXP (link, 1) = call_fusage;
4261 else
4262 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
4265 /* Delete all insns made since FROM.
4266 FROM becomes the new last instruction. */
4268 void
4269 delete_insns_since (rtx_insn *from)
4271 if (from == 0)
4272 set_first_insn (0);
4273 else
4274 SET_NEXT_INSN (from) = 0;
4275 set_last_insn (from);
4278 /* This function is deprecated, please use sequences instead.
4280 Move a consecutive bunch of insns to a different place in the chain.
4281 The insns to be moved are those between FROM and TO.
4282 They are moved to a new position after the insn AFTER.
4283 AFTER must not be FROM or TO or any insn in between.
4285 This function does not know about SEQUENCEs and hence should not be
4286 called after delay-slot filling has been done. */
4288 void
4289 reorder_insns_nobb (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4291 if (flag_checking)
4293 for (rtx_insn *x = from; x != to; x = NEXT_INSN (x))
4294 gcc_assert (after != x);
4295 gcc_assert (after != to);
4298 /* Splice this bunch out of where it is now. */
4299 if (PREV_INSN (from))
4300 SET_NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4301 if (NEXT_INSN (to))
4302 SET_PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4303 if (get_last_insn () == to)
4304 set_last_insn (PREV_INSN (from));
4305 if (get_insns () == from)
4306 set_first_insn (NEXT_INSN (to));
4308 /* Make the new neighbors point to it and it to them. */
4309 if (NEXT_INSN (after))
4310 SET_PREV_INSN (NEXT_INSN (after)) = to;
4312 SET_NEXT_INSN (to) = NEXT_INSN (after);
4313 SET_PREV_INSN (from) = after;
4314 SET_NEXT_INSN (after) = from;
4315 if (after == get_last_insn ())
4316 set_last_insn (to);
4319 /* Same as function above, but take care to update BB boundaries. */
4320 void
4321 reorder_insns (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4323 rtx_insn *prev = PREV_INSN (from);
4324 basic_block bb, bb2;
4326 reorder_insns_nobb (from, to, after);
4328 if (!BARRIER_P (after)
4329 && (bb = BLOCK_FOR_INSN (after)))
4331 rtx_insn *x;
4332 df_set_bb_dirty (bb);
4334 if (!BARRIER_P (from)
4335 && (bb2 = BLOCK_FOR_INSN (from)))
4337 if (BB_END (bb2) == to)
4338 BB_END (bb2) = prev;
4339 df_set_bb_dirty (bb2);
4342 if (BB_END (bb) == after)
4343 BB_END (bb) = to;
4345 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4346 if (!BARRIER_P (x))
4347 df_insn_change_bb (x, bb);
4352 /* Emit insn(s) of given code and pattern
4353 at a specified place within the doubly-linked list.
4355 All of the emit_foo global entry points accept an object
4356 X which is either an insn list or a PATTERN of a single
4357 instruction.
4359 There are thus a few canonical ways to generate code and
4360 emit it at a specific place in the instruction stream. For
4361 example, consider the instruction named SPOT and the fact that
4362 we would like to emit some instructions before SPOT. We might
4363 do it like this:
4365 start_sequence ();
4366 ... emit the new instructions ...
4367 insns_head = get_insns ();
4368 end_sequence ();
4370 emit_insn_before (insns_head, SPOT);
4372 It used to be common to generate SEQUENCE rtl instead, but that
4373 is a relic of the past which no longer occurs. The reason is that
4374 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4375 generated would almost certainly die right after it was created. */
4377 static rtx_insn *
4378 emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
4379 rtx_insn *(*make_raw) (rtx))
4381 rtx_insn *insn;
4383 gcc_assert (before);
4385 if (x == NULL_RTX)
4386 return safe_as_a <rtx_insn *> (last);
4388 switch (GET_CODE (x))
4390 case DEBUG_INSN:
4391 case INSN:
4392 case JUMP_INSN:
4393 case CALL_INSN:
4394 case CODE_LABEL:
4395 case BARRIER:
4396 case NOTE:
4397 insn = as_a <rtx_insn *> (x);
4398 while (insn)
4400 rtx_insn *next = NEXT_INSN (insn);
4401 add_insn_before (insn, before, bb);
4402 last = insn;
4403 insn = next;
4405 break;
4407 #ifdef ENABLE_RTL_CHECKING
4408 case SEQUENCE:
4409 gcc_unreachable ();
4410 break;
4411 #endif
4413 default:
4414 last = (*make_raw) (x);
4415 add_insn_before (last, before, bb);
4416 break;
4419 return safe_as_a <rtx_insn *> (last);
4422 /* Make X be output before the instruction BEFORE. */
4424 rtx_insn *
4425 emit_insn_before_noloc (rtx x, rtx_insn *before, basic_block bb)
4427 return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4430 /* Make an instruction with body X and code JUMP_INSN
4431 and output it before the instruction BEFORE. */
4433 rtx_jump_insn *
4434 emit_jump_insn_before_noloc (rtx x, rtx_insn *before)
4436 return as_a <rtx_jump_insn *> (
4437 emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4438 make_jump_insn_raw));
4441 /* Make an instruction with body X and code CALL_INSN
4442 and output it before the instruction BEFORE. */
4444 rtx_insn *
4445 emit_call_insn_before_noloc (rtx x, rtx_insn *before)
4447 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4448 make_call_insn_raw);
4451 /* Make an instruction with body X and code DEBUG_INSN
4452 and output it before the instruction BEFORE. */
4454 rtx_insn *
4455 emit_debug_insn_before_noloc (rtx x, rtx before)
4457 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4458 make_debug_insn_raw);
4461 /* Make an insn of code BARRIER
4462 and output it before the insn BEFORE. */
4464 rtx_barrier *
4465 emit_barrier_before (rtx before)
4467 rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4469 INSN_UID (insn) = cur_insn_uid++;
4471 add_insn_before (insn, before, NULL);
4472 return insn;
4475 /* Emit the label LABEL before the insn BEFORE. */
4477 rtx_code_label *
4478 emit_label_before (rtx label, rtx_insn *before)
4480 gcc_checking_assert (INSN_UID (label) == 0);
4481 INSN_UID (label) = cur_insn_uid++;
4482 add_insn_before (label, before, NULL);
4483 return as_a <rtx_code_label *> (label);
4486 /* Helper for emit_insn_after, handles lists of instructions
4487 efficiently. */
4489 static rtx_insn *
4490 emit_insn_after_1 (rtx_insn *first, rtx uncast_after, basic_block bb)
4492 rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
4493 rtx_insn *last;
4494 rtx_insn *after_after;
4495 if (!bb && !BARRIER_P (after))
4496 bb = BLOCK_FOR_INSN (after);
4498 if (bb)
4500 df_set_bb_dirty (bb);
4501 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4502 if (!BARRIER_P (last))
4504 set_block_for_insn (last, bb);
4505 df_insn_rescan (last);
4507 if (!BARRIER_P (last))
4509 set_block_for_insn (last, bb);
4510 df_insn_rescan (last);
4512 if (BB_END (bb) == after)
4513 BB_END (bb) = last;
4515 else
4516 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4517 continue;
4519 after_after = NEXT_INSN (after);
4521 SET_NEXT_INSN (after) = first;
4522 SET_PREV_INSN (first) = after;
4523 SET_NEXT_INSN (last) = after_after;
4524 if (after_after)
4525 SET_PREV_INSN (after_after) = last;
4527 if (after == get_last_insn ())
4528 set_last_insn (last);
4530 return last;
4533 static rtx_insn *
4534 emit_pattern_after_noloc (rtx x, rtx uncast_after, basic_block bb,
4535 rtx_insn *(*make_raw)(rtx))
4537 rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
4538 rtx_insn *last = after;
4540 gcc_assert (after);
4542 if (x == NULL_RTX)
4543 return last;
4545 switch (GET_CODE (x))
4547 case DEBUG_INSN:
4548 case INSN:
4549 case JUMP_INSN:
4550 case CALL_INSN:
4551 case CODE_LABEL:
4552 case BARRIER:
4553 case NOTE:
4554 last = emit_insn_after_1 (as_a <rtx_insn *> (x), after, bb);
4555 break;
4557 #ifdef ENABLE_RTL_CHECKING
4558 case SEQUENCE:
4559 gcc_unreachable ();
4560 break;
4561 #endif
4563 default:
4564 last = (*make_raw) (x);
4565 add_insn_after (last, after, bb);
4566 break;
4569 return last;
4572 /* Make X be output after the insn AFTER and set the BB of insn. If
4573 BB is NULL, an attempt is made to infer the BB from AFTER. */
4575 rtx_insn *
4576 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4578 return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4582 /* Make an insn of code JUMP_INSN with body X
4583 and output it after the insn AFTER. */
4585 rtx_jump_insn *
4586 emit_jump_insn_after_noloc (rtx x, rtx after)
4588 return as_a <rtx_jump_insn *> (
4589 emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw));
4592 /* Make an instruction with body X and code CALL_INSN
4593 and output it after the instruction AFTER. */
4595 rtx_insn *
4596 emit_call_insn_after_noloc (rtx x, rtx after)
4598 return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4601 /* Make an instruction with body X and code CALL_INSN
4602 and output it after the instruction AFTER. */
4604 rtx_insn *
4605 emit_debug_insn_after_noloc (rtx x, rtx after)
4607 return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4610 /* Make an insn of code BARRIER
4611 and output it after the insn AFTER. */
4613 rtx_barrier *
4614 emit_barrier_after (rtx after)
4616 rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4618 INSN_UID (insn) = cur_insn_uid++;
4620 add_insn_after (insn, after, NULL);
4621 return insn;
4624 /* Emit the label LABEL after the insn AFTER. */
4626 rtx_insn *
4627 emit_label_after (rtx label, rtx_insn *after)
4629 gcc_checking_assert (INSN_UID (label) == 0);
4630 INSN_UID (label) = cur_insn_uid++;
4631 add_insn_after (label, after, NULL);
4632 return as_a <rtx_insn *> (label);
4635 /* Notes require a bit of special handling: Some notes need to have their
4636 BLOCK_FOR_INSN set, others should never have it set, and some should
4637 have it set or clear depending on the context. */
4639 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4640 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4641 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4643 static bool
4644 note_outside_basic_block_p (enum insn_note subtype, bool on_bb_boundary_p)
4646 switch (subtype)
4648 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4649 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
4650 return true;
4652 /* Notes for var tracking and EH region markers can appear between or
4653 inside basic blocks. If the caller is emitting on the basic block
4654 boundary, do not set BLOCK_FOR_INSN on the new note. */
4655 case NOTE_INSN_VAR_LOCATION:
4656 case NOTE_INSN_CALL_ARG_LOCATION:
4657 case NOTE_INSN_EH_REGION_BEG:
4658 case NOTE_INSN_EH_REGION_END:
4659 return on_bb_boundary_p;
4661 /* Otherwise, BLOCK_FOR_INSN must be set. */
4662 default:
4663 return false;
4667 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4669 rtx_note *
4670 emit_note_after (enum insn_note subtype, rtx_insn *after)
4672 rtx_note *note = make_note_raw (subtype);
4673 basic_block bb = BARRIER_P (after) ? NULL : BLOCK_FOR_INSN (after);
4674 bool on_bb_boundary_p = (bb != NULL && BB_END (bb) == after);
4676 if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4677 add_insn_after_nobb (note, after);
4678 else
4679 add_insn_after (note, after, bb);
4680 return note;
4683 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4685 rtx_note *
4686 emit_note_before (enum insn_note subtype, rtx_insn *before)
4688 rtx_note *note = make_note_raw (subtype);
4689 basic_block bb = BARRIER_P (before) ? NULL : BLOCK_FOR_INSN (before);
4690 bool on_bb_boundary_p = (bb != NULL && BB_HEAD (bb) == before);
4692 if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4693 add_insn_before_nobb (note, before);
4694 else
4695 add_insn_before (note, before, bb);
4696 return note;
4699 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4700 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4702 static rtx_insn *
4703 emit_pattern_after_setloc (rtx pattern, rtx uncast_after, int loc,
4704 rtx_insn *(*make_raw) (rtx))
4706 rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
4707 rtx_insn *last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4709 if (pattern == NULL_RTX || !loc)
4710 return last;
4712 after = NEXT_INSN (after);
4713 while (1)
4715 if (active_insn_p (after)
4716 && !JUMP_TABLE_DATA_P (after) /* FIXME */
4717 && !INSN_LOCATION (after))
4718 INSN_LOCATION (after) = loc;
4719 if (after == last)
4720 break;
4721 after = NEXT_INSN (after);
4723 return last;
4726 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4727 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4728 any DEBUG_INSNs. */
4730 static rtx_insn *
4731 emit_pattern_after (rtx pattern, rtx uncast_after, bool skip_debug_insns,
4732 rtx_insn *(*make_raw) (rtx))
4734 rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
4735 rtx_insn *prev = after;
4737 if (skip_debug_insns)
4738 while (DEBUG_INSN_P (prev))
4739 prev = PREV_INSN (prev);
4741 if (INSN_P (prev))
4742 return emit_pattern_after_setloc (pattern, after, INSN_LOCATION (prev),
4743 make_raw);
4744 else
4745 return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4748 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4749 rtx_insn *
4750 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4752 return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
4755 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4756 rtx_insn *
4757 emit_insn_after (rtx pattern, rtx after)
4759 return emit_pattern_after (pattern, after, true, make_insn_raw);
4762 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4763 rtx_jump_insn *
4764 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4766 return as_a <rtx_jump_insn *> (
4767 emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw));
4770 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4771 rtx_jump_insn *
4772 emit_jump_insn_after (rtx pattern, rtx after)
4774 return as_a <rtx_jump_insn *> (
4775 emit_pattern_after (pattern, after, true, make_jump_insn_raw));
4778 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4779 rtx_insn *
4780 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4782 return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
4785 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4786 rtx_insn *
4787 emit_call_insn_after (rtx pattern, rtx after)
4789 return emit_pattern_after (pattern, after, true, make_call_insn_raw);
4792 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4793 rtx_insn *
4794 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4796 return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
4799 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4800 rtx_insn *
4801 emit_debug_insn_after (rtx pattern, rtx after)
4803 return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
4806 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4807 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4808 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4809 CALL_INSN, etc. */
4811 static rtx_insn *
4812 emit_pattern_before_setloc (rtx pattern, rtx uncast_before, int loc, bool insnp,
4813 rtx_insn *(*make_raw) (rtx))
4815 rtx_insn *before = as_a <rtx_insn *> (uncast_before);
4816 rtx_insn *first = PREV_INSN (before);
4817 rtx_insn *last = emit_pattern_before_noloc (pattern, before,
4818 insnp ? before : NULL_RTX,
4819 NULL, make_raw);
4821 if (pattern == NULL_RTX || !loc)
4822 return last;
4824 if (!first)
4825 first = get_insns ();
4826 else
4827 first = NEXT_INSN (first);
4828 while (1)
4830 if (active_insn_p (first)
4831 && !JUMP_TABLE_DATA_P (first) /* FIXME */
4832 && !INSN_LOCATION (first))
4833 INSN_LOCATION (first) = loc;
4834 if (first == last)
4835 break;
4836 first = NEXT_INSN (first);
4838 return last;
4841 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4842 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4843 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4844 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4846 static rtx_insn *
4847 emit_pattern_before (rtx pattern, rtx uncast_before, bool skip_debug_insns,
4848 bool insnp, rtx_insn *(*make_raw) (rtx))
4850 rtx_insn *before = safe_as_a <rtx_insn *> (uncast_before);
4851 rtx_insn *next = before;
4853 if (skip_debug_insns)
4854 while (DEBUG_INSN_P (next))
4855 next = PREV_INSN (next);
4857 if (INSN_P (next))
4858 return emit_pattern_before_setloc (pattern, before, INSN_LOCATION (next),
4859 insnp, make_raw);
4860 else
4861 return emit_pattern_before_noloc (pattern, before,
4862 insnp ? before : NULL_RTX,
4863 NULL, make_raw);
4866 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4867 rtx_insn *
4868 emit_insn_before_setloc (rtx pattern, rtx_insn *before, int loc)
4870 return emit_pattern_before_setloc (pattern, before, loc, true,
4871 make_insn_raw);
4874 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4875 rtx_insn *
4876 emit_insn_before (rtx pattern, rtx before)
4878 return emit_pattern_before (pattern, before, true, true, make_insn_raw);
4881 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4882 rtx_jump_insn *
4883 emit_jump_insn_before_setloc (rtx pattern, rtx_insn *before, int loc)
4885 return as_a <rtx_jump_insn *> (
4886 emit_pattern_before_setloc (pattern, before, loc, false,
4887 make_jump_insn_raw));
4890 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4891 rtx_jump_insn *
4892 emit_jump_insn_before (rtx pattern, rtx before)
4894 return as_a <rtx_jump_insn *> (
4895 emit_pattern_before (pattern, before, true, false,
4896 make_jump_insn_raw));
4899 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4900 rtx_insn *
4901 emit_call_insn_before_setloc (rtx pattern, rtx_insn *before, int loc)
4903 return emit_pattern_before_setloc (pattern, before, loc, false,
4904 make_call_insn_raw);
4907 /* Like emit_call_insn_before_noloc,
4908 but set insn_location according to BEFORE. */
4909 rtx_insn *
4910 emit_call_insn_before (rtx pattern, rtx_insn *before)
4912 return emit_pattern_before (pattern, before, true, false,
4913 make_call_insn_raw);
4916 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4917 rtx_insn *
4918 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4920 return emit_pattern_before_setloc (pattern, before, loc, false,
4921 make_debug_insn_raw);
4924 /* Like emit_debug_insn_before_noloc,
4925 but set insn_location according to BEFORE. */
4926 rtx_insn *
4927 emit_debug_insn_before (rtx pattern, rtx_insn *before)
4929 return emit_pattern_before (pattern, before, false, false,
4930 make_debug_insn_raw);
4933 /* Take X and emit it at the end of the doubly-linked
4934 INSN list.
4936 Returns the last insn emitted. */
4938 rtx_insn *
4939 emit_insn (rtx x)
4941 rtx_insn *last = get_last_insn ();
4942 rtx_insn *insn;
4944 if (x == NULL_RTX)
4945 return last;
4947 switch (GET_CODE (x))
4949 case DEBUG_INSN:
4950 case INSN:
4951 case JUMP_INSN:
4952 case CALL_INSN:
4953 case CODE_LABEL:
4954 case BARRIER:
4955 case NOTE:
4956 insn = as_a <rtx_insn *> (x);
4957 while (insn)
4959 rtx_insn *next = NEXT_INSN (insn);
4960 add_insn (insn);
4961 last = insn;
4962 insn = next;
4964 break;
4966 #ifdef ENABLE_RTL_CHECKING
4967 case JUMP_TABLE_DATA:
4968 case SEQUENCE:
4969 gcc_unreachable ();
4970 break;
4971 #endif
4973 default:
4974 last = make_insn_raw (x);
4975 add_insn (last);
4976 break;
4979 return last;
4982 /* Make an insn of code DEBUG_INSN with pattern X
4983 and add it to the end of the doubly-linked list. */
4985 rtx_insn *
4986 emit_debug_insn (rtx x)
4988 rtx_insn *last = get_last_insn ();
4989 rtx_insn *insn;
4991 if (x == NULL_RTX)
4992 return last;
4994 switch (GET_CODE (x))
4996 case DEBUG_INSN:
4997 case INSN:
4998 case JUMP_INSN:
4999 case CALL_INSN:
5000 case CODE_LABEL:
5001 case BARRIER:
5002 case NOTE:
5003 insn = as_a <rtx_insn *> (x);
5004 while (insn)
5006 rtx_insn *next = NEXT_INSN (insn);
5007 add_insn (insn);
5008 last = insn;
5009 insn = next;
5011 break;
5013 #ifdef ENABLE_RTL_CHECKING
5014 case JUMP_TABLE_DATA:
5015 case SEQUENCE:
5016 gcc_unreachable ();
5017 break;
5018 #endif
5020 default:
5021 last = make_debug_insn_raw (x);
5022 add_insn (last);
5023 break;
5026 return last;
5029 /* Make an insn of code JUMP_INSN with pattern X
5030 and add it to the end of the doubly-linked list. */
5032 rtx_insn *
5033 emit_jump_insn (rtx x)
5035 rtx_insn *last = NULL;
5036 rtx_insn *insn;
5038 switch (GET_CODE (x))
5040 case DEBUG_INSN:
5041 case INSN:
5042 case JUMP_INSN:
5043 case CALL_INSN:
5044 case CODE_LABEL:
5045 case BARRIER:
5046 case NOTE:
5047 insn = as_a <rtx_insn *> (x);
5048 while (insn)
5050 rtx_insn *next = NEXT_INSN (insn);
5051 add_insn (insn);
5052 last = insn;
5053 insn = next;
5055 break;
5057 #ifdef ENABLE_RTL_CHECKING
5058 case JUMP_TABLE_DATA:
5059 case SEQUENCE:
5060 gcc_unreachable ();
5061 break;
5062 #endif
5064 default:
5065 last = make_jump_insn_raw (x);
5066 add_insn (last);
5067 break;
5070 return last;
5073 /* Make an insn of code CALL_INSN with pattern X
5074 and add it to the end of the doubly-linked list. */
5076 rtx_insn *
5077 emit_call_insn (rtx x)
5079 rtx_insn *insn;
5081 switch (GET_CODE (x))
5083 case DEBUG_INSN:
5084 case INSN:
5085 case JUMP_INSN:
5086 case CALL_INSN:
5087 case CODE_LABEL:
5088 case BARRIER:
5089 case NOTE:
5090 insn = emit_insn (x);
5091 break;
5093 #ifdef ENABLE_RTL_CHECKING
5094 case SEQUENCE:
5095 case JUMP_TABLE_DATA:
5096 gcc_unreachable ();
5097 break;
5098 #endif
5100 default:
5101 insn = make_call_insn_raw (x);
5102 add_insn (insn);
5103 break;
5106 return insn;
5109 /* Add the label LABEL to the end of the doubly-linked list. */
5111 rtx_code_label *
5112 emit_label (rtx uncast_label)
5114 rtx_code_label *label = as_a <rtx_code_label *> (uncast_label);
5116 gcc_checking_assert (INSN_UID (label) == 0);
5117 INSN_UID (label) = cur_insn_uid++;
5118 add_insn (label);
5119 return label;
5122 /* Make an insn of code JUMP_TABLE_DATA
5123 and add it to the end of the doubly-linked list. */
5125 rtx_jump_table_data *
5126 emit_jump_table_data (rtx table)
5128 rtx_jump_table_data *jump_table_data =
5129 as_a <rtx_jump_table_data *> (rtx_alloc (JUMP_TABLE_DATA));
5130 INSN_UID (jump_table_data) = cur_insn_uid++;
5131 PATTERN (jump_table_data) = table;
5132 BLOCK_FOR_INSN (jump_table_data) = NULL;
5133 add_insn (jump_table_data);
5134 return jump_table_data;
5137 /* Make an insn of code BARRIER
5138 and add it to the end of the doubly-linked list. */
5140 rtx_barrier *
5141 emit_barrier (void)
5143 rtx_barrier *barrier = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
5144 INSN_UID (barrier) = cur_insn_uid++;
5145 add_insn (barrier);
5146 return barrier;
5149 /* Emit a copy of note ORIG. */
5151 rtx_note *
5152 emit_note_copy (rtx_note *orig)
5154 enum insn_note kind = (enum insn_note) NOTE_KIND (orig);
5155 rtx_note *note = make_note_raw (kind);
5156 NOTE_DATA (note) = NOTE_DATA (orig);
5157 add_insn (note);
5158 return note;
5161 /* Make an insn of code NOTE or type NOTE_NO
5162 and add it to the end of the doubly-linked list. */
5164 rtx_note *
5165 emit_note (enum insn_note kind)
5167 rtx_note *note = make_note_raw (kind);
5168 add_insn (note);
5169 return note;
5172 /* Emit a clobber of lvalue X. */
5174 rtx_insn *
5175 emit_clobber (rtx x)
5177 /* CONCATs should not appear in the insn stream. */
5178 if (GET_CODE (x) == CONCAT)
5180 emit_clobber (XEXP (x, 0));
5181 return emit_clobber (XEXP (x, 1));
5183 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5186 /* Return a sequence of insns to clobber lvalue X. */
5188 rtx_insn *
5189 gen_clobber (rtx x)
5191 rtx_insn *seq;
5193 start_sequence ();
5194 emit_clobber (x);
5195 seq = get_insns ();
5196 end_sequence ();
5197 return seq;
5200 /* Emit a use of rvalue X. */
5202 rtx_insn *
5203 emit_use (rtx x)
5205 /* CONCATs should not appear in the insn stream. */
5206 if (GET_CODE (x) == CONCAT)
5208 emit_use (XEXP (x, 0));
5209 return emit_use (XEXP (x, 1));
5211 return emit_insn (gen_rtx_USE (VOIDmode, x));
5214 /* Return a sequence of insns to use rvalue X. */
5216 rtx_insn *
5217 gen_use (rtx x)
5219 rtx_insn *seq;
5221 start_sequence ();
5222 emit_use (x);
5223 seq = get_insns ();
5224 end_sequence ();
5225 return seq;
5228 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5229 Return the set in INSN that such notes describe, or NULL if the notes
5230 have no meaning for INSN. */
5233 set_for_reg_notes (rtx insn)
5235 rtx pat, reg;
5237 if (!INSN_P (insn))
5238 return NULL_RTX;
5240 pat = PATTERN (insn);
5241 if (GET_CODE (pat) == PARALLEL)
5243 /* We do not use single_set because that ignores SETs of unused
5244 registers. REG_EQUAL and REG_EQUIV notes really do require the
5245 PARALLEL to have a single SET. */
5246 if (multiple_sets (insn))
5247 return NULL_RTX;
5248 pat = XVECEXP (pat, 0, 0);
5251 if (GET_CODE (pat) != SET)
5252 return NULL_RTX;
5254 reg = SET_DEST (pat);
5256 /* Notes apply to the contents of a STRICT_LOW_PART. */
5257 if (GET_CODE (reg) == STRICT_LOW_PART
5258 || GET_CODE (reg) == ZERO_EXTRACT)
5259 reg = XEXP (reg, 0);
5261 /* Check that we have a register. */
5262 if (!(REG_P (reg) || GET_CODE (reg) == SUBREG))
5263 return NULL_RTX;
5265 return pat;
5268 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5269 note of this type already exists, remove it first. */
5272 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5274 rtx note = find_reg_note (insn, kind, NULL_RTX);
5276 switch (kind)
5278 case REG_EQUAL:
5279 case REG_EQUIV:
5280 /* We need to support the REG_EQUAL on USE trick of find_reloads. */
5281 if (!set_for_reg_notes (insn) && GET_CODE (PATTERN (insn)) != USE)
5282 return NULL_RTX;
5284 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5285 It serves no useful purpose and breaks eliminate_regs. */
5286 if (GET_CODE (datum) == ASM_OPERANDS)
5287 return NULL_RTX;
5289 /* Notes with side effects are dangerous. Even if the side-effect
5290 initially mirrors one in PATTERN (INSN), later optimizations
5291 might alter the way that the final register value is calculated
5292 and so move or alter the side-effect in some way. The note would
5293 then no longer be a valid substitution for SET_SRC. */
5294 if (side_effects_p (datum))
5295 return NULL_RTX;
5296 break;
5298 default:
5299 break;
5302 if (note)
5303 XEXP (note, 0) = datum;
5304 else
5306 add_reg_note (insn, kind, datum);
5307 note = REG_NOTES (insn);
5310 switch (kind)
5312 case REG_EQUAL:
5313 case REG_EQUIV:
5314 df_notes_rescan (as_a <rtx_insn *> (insn));
5315 break;
5316 default:
5317 break;
5320 return note;
5323 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5325 set_dst_reg_note (rtx insn, enum reg_note kind, rtx datum, rtx dst)
5327 rtx set = set_for_reg_notes (insn);
5329 if (set && SET_DEST (set) == dst)
5330 return set_unique_reg_note (insn, kind, datum);
5331 return NULL_RTX;
5334 /* Emit the rtl pattern X as an appropriate kind of insn. Also emit a
5335 following barrier if the instruction needs one and if ALLOW_BARRIER_P
5336 is true.
5338 If X is a label, it is simply added into the insn chain. */
5340 rtx_insn *
5341 emit (rtx x, bool allow_barrier_p)
5343 enum rtx_code code = classify_insn (x);
5345 switch (code)
5347 case CODE_LABEL:
5348 return emit_label (x);
5349 case INSN:
5350 return emit_insn (x);
5351 case JUMP_INSN:
5353 rtx_insn *insn = emit_jump_insn (x);
5354 if (allow_barrier_p
5355 && (any_uncondjump_p (insn) || GET_CODE (x) == RETURN))
5356 return emit_barrier ();
5357 return insn;
5359 case CALL_INSN:
5360 return emit_call_insn (x);
5361 case DEBUG_INSN:
5362 return emit_debug_insn (x);
5363 default:
5364 gcc_unreachable ();
5368 /* Space for free sequence stack entries. */
5369 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5371 /* Begin emitting insns to a sequence. If this sequence will contain
5372 something that might cause the compiler to pop arguments to function
5373 calls (because those pops have previously been deferred; see
5374 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5375 before calling this function. That will ensure that the deferred
5376 pops are not accidentally emitted in the middle of this sequence. */
5378 void
5379 start_sequence (void)
5381 struct sequence_stack *tem;
5383 if (free_sequence_stack != NULL)
5385 tem = free_sequence_stack;
5386 free_sequence_stack = tem->next;
5388 else
5389 tem = ggc_alloc<sequence_stack> ();
5391 tem->next = get_current_sequence ()->next;
5392 tem->first = get_insns ();
5393 tem->last = get_last_insn ();
5394 get_current_sequence ()->next = tem;
5396 set_first_insn (0);
5397 set_last_insn (0);
5400 /* Set up the insn chain starting with FIRST as the current sequence,
5401 saving the previously current one. See the documentation for
5402 start_sequence for more information about how to use this function. */
5404 void
5405 push_to_sequence (rtx_insn *first)
5407 rtx_insn *last;
5409 start_sequence ();
5411 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5414 set_first_insn (first);
5415 set_last_insn (last);
5418 /* Like push_to_sequence, but take the last insn as an argument to avoid
5419 looping through the list. */
5421 void
5422 push_to_sequence2 (rtx_insn *first, rtx_insn *last)
5424 start_sequence ();
5426 set_first_insn (first);
5427 set_last_insn (last);
5430 /* Set up the outer-level insn chain
5431 as the current sequence, saving the previously current one. */
5433 void
5434 push_topmost_sequence (void)
5436 struct sequence_stack *top;
5438 start_sequence ();
5440 top = get_topmost_sequence ();
5441 set_first_insn (top->first);
5442 set_last_insn (top->last);
5445 /* After emitting to the outer-level insn chain, update the outer-level
5446 insn chain, and restore the previous saved state. */
5448 void
5449 pop_topmost_sequence (void)
5451 struct sequence_stack *top;
5453 top = get_topmost_sequence ();
5454 top->first = get_insns ();
5455 top->last = get_last_insn ();
5457 end_sequence ();
5460 /* After emitting to a sequence, restore previous saved state.
5462 To get the contents of the sequence just made, you must call
5463 `get_insns' *before* calling here.
5465 If the compiler might have deferred popping arguments while
5466 generating this sequence, and this sequence will not be immediately
5467 inserted into the instruction stream, use do_pending_stack_adjust
5468 before calling get_insns. That will ensure that the deferred
5469 pops are inserted into this sequence, and not into some random
5470 location in the instruction stream. See INHIBIT_DEFER_POP for more
5471 information about deferred popping of arguments. */
5473 void
5474 end_sequence (void)
5476 struct sequence_stack *tem = get_current_sequence ()->next;
5478 set_first_insn (tem->first);
5479 set_last_insn (tem->last);
5480 get_current_sequence ()->next = tem->next;
5482 memset (tem, 0, sizeof (*tem));
5483 tem->next = free_sequence_stack;
5484 free_sequence_stack = tem;
5487 /* Return 1 if currently emitting into a sequence. */
5490 in_sequence_p (void)
5492 return get_current_sequence ()->next != 0;
5495 /* Put the various virtual registers into REGNO_REG_RTX. */
5497 static void
5498 init_virtual_regs (void)
5500 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5501 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5502 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5503 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5504 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5505 regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5506 = virtual_preferred_stack_boundary_rtx;
5510 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5511 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5512 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5513 static int copy_insn_n_scratches;
5515 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5516 copied an ASM_OPERANDS.
5517 In that case, it is the original input-operand vector. */
5518 static rtvec orig_asm_operands_vector;
5520 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5521 copied an ASM_OPERANDS.
5522 In that case, it is the copied input-operand vector. */
5523 static rtvec copy_asm_operands_vector;
5525 /* Likewise for the constraints vector. */
5526 static rtvec orig_asm_constraints_vector;
5527 static rtvec copy_asm_constraints_vector;
5529 /* Recursively create a new copy of an rtx for copy_insn.
5530 This function differs from copy_rtx in that it handles SCRATCHes and
5531 ASM_OPERANDs properly.
5532 Normally, this function is not used directly; use copy_insn as front end.
5533 However, you could first copy an insn pattern with copy_insn and then use
5534 this function afterwards to properly copy any REG_NOTEs containing
5535 SCRATCHes. */
5538 copy_insn_1 (rtx orig)
5540 rtx copy;
5541 int i, j;
5542 RTX_CODE code;
5543 const char *format_ptr;
5545 if (orig == NULL)
5546 return NULL;
5548 code = GET_CODE (orig);
5550 switch (code)
5552 case REG:
5553 case DEBUG_EXPR:
5554 CASE_CONST_ANY:
5555 case SYMBOL_REF:
5556 case CODE_LABEL:
5557 case PC:
5558 case CC0:
5559 case RETURN:
5560 case SIMPLE_RETURN:
5561 return orig;
5562 case CLOBBER:
5563 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5564 clobbers or clobbers of hard registers that originated as pseudos.
5565 This is needed to allow safe register renaming. */
5566 if (REG_P (XEXP (orig, 0))
5567 && HARD_REGISTER_NUM_P (REGNO (XEXP (orig, 0)))
5568 && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (orig, 0))))
5569 return orig;
5570 break;
5572 case SCRATCH:
5573 for (i = 0; i < copy_insn_n_scratches; i++)
5574 if (copy_insn_scratch_in[i] == orig)
5575 return copy_insn_scratch_out[i];
5576 break;
5578 case CONST:
5579 if (shared_const_p (orig))
5580 return orig;
5581 break;
5583 /* A MEM with a constant address is not sharable. The problem is that
5584 the constant address may need to be reloaded. If the mem is shared,
5585 then reloading one copy of this mem will cause all copies to appear
5586 to have been reloaded. */
5588 default:
5589 break;
5592 /* Copy the various flags, fields, and other information. We assume
5593 that all fields need copying, and then clear the fields that should
5594 not be copied. That is the sensible default behavior, and forces
5595 us to explicitly document why we are *not* copying a flag. */
5596 copy = shallow_copy_rtx (orig);
5598 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5599 if (INSN_P (orig))
5601 RTX_FLAG (copy, jump) = 0;
5602 RTX_FLAG (copy, call) = 0;
5603 RTX_FLAG (copy, frame_related) = 0;
5606 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5608 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5609 switch (*format_ptr++)
5611 case 'e':
5612 if (XEXP (orig, i) != NULL)
5613 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5614 break;
5616 case 'E':
5617 case 'V':
5618 if (XVEC (orig, i) == orig_asm_constraints_vector)
5619 XVEC (copy, i) = copy_asm_constraints_vector;
5620 else if (XVEC (orig, i) == orig_asm_operands_vector)
5621 XVEC (copy, i) = copy_asm_operands_vector;
5622 else if (XVEC (orig, i) != NULL)
5624 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5625 for (j = 0; j < XVECLEN (copy, i); j++)
5626 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5628 break;
5630 case 't':
5631 case 'w':
5632 case 'i':
5633 case 's':
5634 case 'S':
5635 case 'u':
5636 case '0':
5637 /* These are left unchanged. */
5638 break;
5640 default:
5641 gcc_unreachable ();
5644 if (code == SCRATCH)
5646 i = copy_insn_n_scratches++;
5647 gcc_assert (i < MAX_RECOG_OPERANDS);
5648 copy_insn_scratch_in[i] = orig;
5649 copy_insn_scratch_out[i] = copy;
5651 else if (code == ASM_OPERANDS)
5653 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5654 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5655 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5656 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5659 return copy;
5662 /* Create a new copy of an rtx.
5663 This function differs from copy_rtx in that it handles SCRATCHes and
5664 ASM_OPERANDs properly.
5665 INSN doesn't really have to be a full INSN; it could be just the
5666 pattern. */
5668 copy_insn (rtx insn)
5670 copy_insn_n_scratches = 0;
5671 orig_asm_operands_vector = 0;
5672 orig_asm_constraints_vector = 0;
5673 copy_asm_operands_vector = 0;
5674 copy_asm_constraints_vector = 0;
5675 return copy_insn_1 (insn);
5678 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5679 on that assumption that INSN itself remains in its original place. */
5681 rtx_insn *
5682 copy_delay_slot_insn (rtx_insn *insn)
5684 /* Copy INSN with its rtx_code, all its notes, location etc. */
5685 insn = as_a <rtx_insn *> (copy_rtx (insn));
5686 INSN_UID (insn) = cur_insn_uid++;
5687 return insn;
5690 /* Initialize data structures and variables in this file
5691 before generating rtl for each function. */
5693 void
5694 init_emit (void)
5696 set_first_insn (NULL);
5697 set_last_insn (NULL);
5698 if (MIN_NONDEBUG_INSN_UID)
5699 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5700 else
5701 cur_insn_uid = 1;
5702 cur_debug_insn_uid = 1;
5703 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5704 first_label_num = label_num;
5705 get_current_sequence ()->next = NULL;
5707 /* Init the tables that describe all the pseudo regs. */
5709 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5711 crtl->emit.regno_pointer_align
5712 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5714 regno_reg_rtx
5715 = ggc_cleared_vec_alloc<rtx> (crtl->emit.regno_pointer_align_length);
5717 /* Put copies of all the hard registers into regno_reg_rtx. */
5718 memcpy (regno_reg_rtx,
5719 initial_regno_reg_rtx,
5720 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5722 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5723 init_virtual_regs ();
5725 /* Indicate that the virtual registers and stack locations are
5726 all pointers. */
5727 REG_POINTER (stack_pointer_rtx) = 1;
5728 REG_POINTER (frame_pointer_rtx) = 1;
5729 REG_POINTER (hard_frame_pointer_rtx) = 1;
5730 REG_POINTER (arg_pointer_rtx) = 1;
5732 REG_POINTER (virtual_incoming_args_rtx) = 1;
5733 REG_POINTER (virtual_stack_vars_rtx) = 1;
5734 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5735 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5736 REG_POINTER (virtual_cfa_rtx) = 1;
5738 #ifdef STACK_BOUNDARY
5739 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5740 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5741 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5742 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5744 /* ??? These are problematic (for example, 3 out of 4 are wrong on
5745 32-bit SPARC and cannot be all fixed because of the ABI). */
5746 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5747 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5748 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5749 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5751 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5752 #endif
5754 #ifdef INIT_EXPANDERS
5755 INIT_EXPANDERS;
5756 #endif
5759 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5761 static rtx
5762 gen_const_vector (machine_mode mode, int constant)
5764 rtx tem;
5765 rtvec v;
5766 int units, i;
5767 machine_mode inner;
5769 units = GET_MODE_NUNITS (mode);
5770 inner = GET_MODE_INNER (mode);
5772 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5774 v = rtvec_alloc (units);
5776 /* We need to call this function after we set the scalar const_tiny_rtx
5777 entries. */
5778 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5780 for (i = 0; i < units; ++i)
5781 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5783 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5784 return tem;
5787 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5788 all elements are zero, and the one vector when all elements are one. */
5790 gen_rtx_CONST_VECTOR (machine_mode mode, rtvec v)
5792 machine_mode inner = GET_MODE_INNER (mode);
5793 int nunits = GET_MODE_NUNITS (mode);
5794 rtx x;
5795 int i;
5797 /* Check to see if all of the elements have the same value. */
5798 x = RTVEC_ELT (v, nunits - 1);
5799 for (i = nunits - 2; i >= 0; i--)
5800 if (RTVEC_ELT (v, i) != x)
5801 break;
5803 /* If the values are all the same, check to see if we can use one of the
5804 standard constant vectors. */
5805 if (i == -1)
5807 if (x == CONST0_RTX (inner))
5808 return CONST0_RTX (mode);
5809 else if (x == CONST1_RTX (inner))
5810 return CONST1_RTX (mode);
5811 else if (x == CONSTM1_RTX (inner))
5812 return CONSTM1_RTX (mode);
5815 return gen_rtx_raw_CONST_VECTOR (mode, v);
5818 /* Initialise global register information required by all functions. */
5820 void
5821 init_emit_regs (void)
5823 int i;
5824 machine_mode mode;
5825 mem_attrs *attrs;
5827 /* Reset register attributes */
5828 reg_attrs_htab->empty ();
5830 /* We need reg_raw_mode, so initialize the modes now. */
5831 init_reg_modes_target ();
5833 /* Assign register numbers to the globally defined register rtx. */
5834 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5835 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5836 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5837 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5838 virtual_incoming_args_rtx =
5839 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5840 virtual_stack_vars_rtx =
5841 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5842 virtual_stack_dynamic_rtx =
5843 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5844 virtual_outgoing_args_rtx =
5845 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5846 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5847 virtual_preferred_stack_boundary_rtx =
5848 gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
5850 /* Initialize RTL for commonly used hard registers. These are
5851 copied into regno_reg_rtx as we begin to compile each function. */
5852 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5853 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5855 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5856 return_address_pointer_rtx
5857 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5858 #endif
5860 pic_offset_table_rtx = NULL_RTX;
5861 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5862 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5864 for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
5866 mode = (machine_mode) i;
5867 attrs = ggc_cleared_alloc<mem_attrs> ();
5868 attrs->align = BITS_PER_UNIT;
5869 attrs->addrspace = ADDR_SPACE_GENERIC;
5870 if (mode != BLKmode)
5872 attrs->size_known_p = true;
5873 attrs->size = GET_MODE_SIZE (mode);
5874 if (STRICT_ALIGNMENT)
5875 attrs->align = GET_MODE_ALIGNMENT (mode);
5877 mode_mem_attrs[i] = attrs;
5881 /* Initialize global machine_mode variables. */
5883 void
5884 init_derived_machine_modes (void)
5886 opt_scalar_int_mode mode_iter, opt_byte_mode, opt_word_mode;
5887 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
5889 scalar_int_mode mode = mode_iter.require ();
5891 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5892 && !opt_byte_mode.exists ())
5893 opt_byte_mode = mode;
5895 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5896 && !opt_word_mode.exists ())
5897 opt_word_mode = mode;
5900 byte_mode = opt_byte_mode.require ();
5901 word_mode = opt_word_mode.require ();
5902 ptr_mode = int_mode_for_size (POINTER_SIZE, 0).require ();
5905 /* Create some permanent unique rtl objects shared between all functions. */
5907 void
5908 init_emit_once (void)
5910 int i;
5911 machine_mode mode;
5912 scalar_float_mode double_mode;
5913 opt_scalar_mode smode_iter;
5915 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5916 CONST_FIXED, and memory attribute hash tables. */
5917 const_int_htab = hash_table<const_int_hasher>::create_ggc (37);
5919 #if TARGET_SUPPORTS_WIDE_INT
5920 const_wide_int_htab = hash_table<const_wide_int_hasher>::create_ggc (37);
5921 #endif
5922 const_double_htab = hash_table<const_double_hasher>::create_ggc (37);
5924 const_fixed_htab = hash_table<const_fixed_hasher>::create_ggc (37);
5926 reg_attrs_htab = hash_table<reg_attr_hasher>::create_ggc (37);
5928 #ifdef INIT_EXPANDERS
5929 /* This is to initialize {init|mark|free}_machine_status before the first
5930 call to push_function_context_to. This is needed by the Chill front
5931 end which calls push_function_context_to before the first call to
5932 init_function_start. */
5933 INIT_EXPANDERS;
5934 #endif
5936 /* Create the unique rtx's for certain rtx codes and operand values. */
5938 /* Process stack-limiting command-line options. */
5939 if (opt_fstack_limit_symbol_arg != NULL)
5940 stack_limit_rtx
5941 = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (opt_fstack_limit_symbol_arg));
5942 if (opt_fstack_limit_register_no >= 0)
5943 stack_limit_rtx = gen_rtx_REG (Pmode, opt_fstack_limit_register_no);
5945 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5946 tries to use these variables. */
5947 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5948 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5949 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5951 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5952 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5953 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5954 else
5955 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5957 double_mode = float_mode_for_size (DOUBLE_TYPE_SIZE).require ();
5959 real_from_integer (&dconst0, double_mode, 0, SIGNED);
5960 real_from_integer (&dconst1, double_mode, 1, SIGNED);
5961 real_from_integer (&dconst2, double_mode, 2, SIGNED);
5963 dconstm1 = dconst1;
5964 dconstm1.sign = 1;
5966 dconsthalf = dconst1;
5967 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5969 for (i = 0; i < 3; i++)
5971 const REAL_VALUE_TYPE *const r =
5972 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5974 FOR_EACH_MODE_IN_CLASS (mode, MODE_FLOAT)
5975 const_tiny_rtx[i][(int) mode] =
5976 const_double_from_real_value (*r, mode);
5978 FOR_EACH_MODE_IN_CLASS (mode, MODE_DECIMAL_FLOAT)
5979 const_tiny_rtx[i][(int) mode] =
5980 const_double_from_real_value (*r, mode);
5982 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5984 FOR_EACH_MODE_IN_CLASS (mode, MODE_INT)
5985 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5987 for (mode = MIN_MODE_PARTIAL_INT;
5988 mode <= MAX_MODE_PARTIAL_INT;
5989 mode = (machine_mode)((int)(mode) + 1))
5990 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5993 const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
5995 FOR_EACH_MODE_IN_CLASS (mode, MODE_INT)
5996 const_tiny_rtx[3][(int) mode] = constm1_rtx;
5998 for (mode = MIN_MODE_PARTIAL_INT;
5999 mode <= MAX_MODE_PARTIAL_INT;
6000 mode = (machine_mode)((int)(mode) + 1))
6001 const_tiny_rtx[3][(int) mode] = constm1_rtx;
6003 FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_INT)
6005 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6006 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6009 FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_FLOAT)
6011 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6012 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6015 FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_INT)
6017 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6018 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6019 const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
6022 FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_FLOAT)
6024 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6025 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6028 FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_FRACT)
6030 scalar_mode smode = smode_iter.require ();
6031 FCONST0 (smode).data.high = 0;
6032 FCONST0 (smode).data.low = 0;
6033 FCONST0 (smode).mode = smode;
6034 const_tiny_rtx[0][(int) smode]
6035 = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6038 FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_UFRACT)
6040 scalar_mode smode = smode_iter.require ();
6041 FCONST0 (smode).data.high = 0;
6042 FCONST0 (smode).data.low = 0;
6043 FCONST0 (smode).mode = smode;
6044 const_tiny_rtx[0][(int) smode]
6045 = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6048 FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_ACCUM)
6050 scalar_mode smode = smode_iter.require ();
6051 FCONST0 (smode).data.high = 0;
6052 FCONST0 (smode).data.low = 0;
6053 FCONST0 (smode).mode = smode;
6054 const_tiny_rtx[0][(int) smode]
6055 = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6057 /* We store the value 1. */
6058 FCONST1 (smode).data.high = 0;
6059 FCONST1 (smode).data.low = 0;
6060 FCONST1 (smode).mode = smode;
6061 FCONST1 (smode).data
6062 = double_int_one.lshift (GET_MODE_FBIT (smode),
6063 HOST_BITS_PER_DOUBLE_INT,
6064 SIGNED_FIXED_POINT_MODE_P (smode));
6065 const_tiny_rtx[1][(int) smode]
6066 = CONST_FIXED_FROM_FIXED_VALUE (FCONST1 (smode), smode);
6069 FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_UACCUM)
6071 scalar_mode smode = smode_iter.require ();
6072 FCONST0 (smode).data.high = 0;
6073 FCONST0 (smode).data.low = 0;
6074 FCONST0 (smode).mode = smode;
6075 const_tiny_rtx[0][(int) smode]
6076 = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6078 /* We store the value 1. */
6079 FCONST1 (smode).data.high = 0;
6080 FCONST1 (smode).data.low = 0;
6081 FCONST1 (smode).mode = smode;
6082 FCONST1 (smode).data
6083 = double_int_one.lshift (GET_MODE_FBIT (smode),
6084 HOST_BITS_PER_DOUBLE_INT,
6085 SIGNED_FIXED_POINT_MODE_P (smode));
6086 const_tiny_rtx[1][(int) smode]
6087 = CONST_FIXED_FROM_FIXED_VALUE (FCONST1 (smode), smode);
6090 FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_FRACT)
6092 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6095 FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_UFRACT)
6097 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6100 FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_ACCUM)
6102 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6103 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6106 FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_UACCUM)
6108 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6109 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6112 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
6113 if (GET_MODE_CLASS ((machine_mode) i) == MODE_CC)
6114 const_tiny_rtx[0][i] = const0_rtx;
6116 const_tiny_rtx[0][(int) BImode] = const0_rtx;
6117 if (STORE_FLAG_VALUE == 1)
6118 const_tiny_rtx[1][(int) BImode] = const1_rtx;
6120 FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_POINTER_BOUNDS)
6122 scalar_mode smode = smode_iter.require ();
6123 wide_int wi_zero = wi::zero (GET_MODE_PRECISION (smode));
6124 const_tiny_rtx[0][smode] = immed_wide_int_const (wi_zero, smode);
6127 pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
6128 ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
6129 simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
6130 cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
6131 invalid_insn_rtx = gen_rtx_INSN (VOIDmode,
6132 /*prev_insn=*/NULL,
6133 /*next_insn=*/NULL,
6134 /*bb=*/NULL,
6135 /*pattern=*/NULL_RTX,
6136 /*location=*/-1,
6137 CODE_FOR_nothing,
6138 /*reg_notes=*/NULL_RTX);
6141 /* Produce exact duplicate of insn INSN after AFTER.
6142 Care updating of libcall regions if present. */
6144 rtx_insn *
6145 emit_copy_of_insn_after (rtx_insn *insn, rtx_insn *after)
6147 rtx_insn *new_rtx;
6148 rtx link;
6150 switch (GET_CODE (insn))
6152 case INSN:
6153 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
6154 break;
6156 case JUMP_INSN:
6157 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
6158 CROSSING_JUMP_P (new_rtx) = CROSSING_JUMP_P (insn);
6159 break;
6161 case DEBUG_INSN:
6162 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
6163 break;
6165 case CALL_INSN:
6166 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
6167 if (CALL_INSN_FUNCTION_USAGE (insn))
6168 CALL_INSN_FUNCTION_USAGE (new_rtx)
6169 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
6170 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
6171 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
6172 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
6173 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
6174 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
6175 break;
6177 default:
6178 gcc_unreachable ();
6181 /* Update LABEL_NUSES. */
6182 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6184 INSN_LOCATION (new_rtx) = INSN_LOCATION (insn);
6186 /* If the old insn is frame related, then so is the new one. This is
6187 primarily needed for IA-64 unwind info which marks epilogue insns,
6188 which may be duplicated by the basic block reordering code. */
6189 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6191 /* Locate the end of existing REG_NOTES in NEW_RTX. */
6192 rtx *ptail = &REG_NOTES (new_rtx);
6193 while (*ptail != NULL_RTX)
6194 ptail = &XEXP (*ptail, 1);
6196 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6197 will make them. REG_LABEL_TARGETs are created there too, but are
6198 supposed to be sticky, so we copy them. */
6199 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6200 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6202 *ptail = duplicate_reg_note (link);
6203 ptail = &XEXP (*ptail, 1);
6206 INSN_CODE (new_rtx) = INSN_CODE (insn);
6207 return new_rtx;
6210 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6212 gen_hard_reg_clobber (machine_mode mode, unsigned int regno)
6214 if (hard_reg_clobbers[mode][regno])
6215 return hard_reg_clobbers[mode][regno];
6216 else
6217 return (hard_reg_clobbers[mode][regno] =
6218 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6221 location_t prologue_location;
6222 location_t epilogue_location;
6224 /* Hold current location information and last location information, so the
6225 datastructures are built lazily only when some instructions in given
6226 place are needed. */
6227 static location_t curr_location;
6229 /* Allocate insn location datastructure. */
6230 void
6231 insn_locations_init (void)
6233 prologue_location = epilogue_location = 0;
6234 curr_location = UNKNOWN_LOCATION;
6237 /* At the end of emit stage, clear current location. */
6238 void
6239 insn_locations_finalize (void)
6241 epilogue_location = curr_location;
6242 curr_location = UNKNOWN_LOCATION;
6245 /* Set current location. */
6246 void
6247 set_curr_insn_location (location_t location)
6249 curr_location = location;
6252 /* Get current location. */
6253 location_t
6254 curr_insn_location (void)
6256 return curr_location;
6259 /* Return lexical scope block insn belongs to. */
6260 tree
6261 insn_scope (const rtx_insn *insn)
6263 return LOCATION_BLOCK (INSN_LOCATION (insn));
6266 /* Return line number of the statement that produced this insn. */
6268 insn_line (const rtx_insn *insn)
6270 return LOCATION_LINE (INSN_LOCATION (insn));
6273 /* Return source file of the statement that produced this insn. */
6274 const char *
6275 insn_file (const rtx_insn *insn)
6277 return LOCATION_FILE (INSN_LOCATION (insn));
6280 /* Return expanded location of the statement that produced this insn. */
6281 expanded_location
6282 insn_location (const rtx_insn *insn)
6284 return expand_location (INSN_LOCATION (insn));
6287 /* Return true if memory model MODEL requires a pre-operation (release-style)
6288 barrier or a post-operation (acquire-style) barrier. While not universal,
6289 this function matches behavior of several targets. */
6291 bool
6292 need_atomic_barrier_p (enum memmodel model, bool pre)
6294 switch (model & MEMMODEL_BASE_MASK)
6296 case MEMMODEL_RELAXED:
6297 case MEMMODEL_CONSUME:
6298 return false;
6299 case MEMMODEL_RELEASE:
6300 return pre;
6301 case MEMMODEL_ACQUIRE:
6302 return !pre;
6303 case MEMMODEL_ACQ_REL:
6304 case MEMMODEL_SEQ_CST:
6305 return true;
6306 default:
6307 gcc_unreachable ();
6311 /* Initialize fields of rtl_data related to stack alignment. */
6313 void
6314 rtl_data::init_stack_alignment ()
6316 stack_alignment_needed = STACK_BOUNDARY;
6317 max_used_stack_slot_alignment = STACK_BOUNDARY;
6318 stack_alignment_estimated = 0;
6319 preferred_stack_boundary = STACK_BOUNDARY;
6323 #include "gt-emit-rtl.h"